xref: /qemu/linux-headers/linux/vfio.h (revision 226419d6)
1 /*
2  * VFIO API definition
3  *
4  * Copyright (C) 2012 Red Hat, Inc.  All rights reserved.
5  *     Author: Alex Williamson <alex.williamson@redhat.com>
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10  */
11 #ifndef VFIO_H
12 #define VFIO_H
13 
14 #include <linux/types.h>
15 #include <linux/ioctl.h>
16 
17 #define VFIO_API_VERSION	0
18 
19 
20 /* Kernel & User level defines for VFIO IOCTLs. */
21 
22 /* Extensions */
23 
24 #define VFIO_TYPE1_IOMMU		1
25 #define VFIO_SPAPR_TCE_IOMMU		2
26 #define VFIO_TYPE1v2_IOMMU		3
27 /*
28  * IOMMU enforces DMA cache coherence (ex. PCIe NoSnoop stripping).  This
29  * capability is subject to change as groups are added or removed.
30  */
31 #define VFIO_DMA_CC_IOMMU		4
32 
33 /* Check if EEH is supported */
34 #define VFIO_EEH			5
35 
36 /* Two-stage IOMMU */
37 #define VFIO_TYPE1_NESTING_IOMMU	6	/* Implies v2 */
38 
39 #define VFIO_SPAPR_TCE_v2_IOMMU		7
40 
41 /*
42  * The No-IOMMU IOMMU offers no translation or isolation for devices and
43  * supports no ioctls outside of VFIO_CHECK_EXTENSION.  Use of VFIO's No-IOMMU
44  * code will taint the host kernel and should be used with extreme caution.
45  */
46 #define VFIO_NOIOMMU_IOMMU		8
47 
48 /*
49  * The IOCTL interface is designed for extensibility by embedding the
50  * structure length (argsz) and flags into structures passed between
51  * kernel and userspace.  We therefore use the _IO() macro for these
52  * defines to avoid implicitly embedding a size into the ioctl request.
53  * As structure fields are added, argsz will increase to match and flag
54  * bits will be defined to indicate additional fields with valid data.
55  * It's *always* the caller's responsibility to indicate the size of
56  * the structure passed by setting argsz appropriately.
57  */
58 
59 #define VFIO_TYPE	(';')
60 #define VFIO_BASE	100
61 
62 /* -------- IOCTLs for VFIO file descriptor (/dev/vfio/vfio) -------- */
63 
64 /**
65  * VFIO_GET_API_VERSION - _IO(VFIO_TYPE, VFIO_BASE + 0)
66  *
67  * Report the version of the VFIO API.  This allows us to bump the entire
68  * API version should we later need to add or change features in incompatible
69  * ways.
70  * Return: VFIO_API_VERSION
71  * Availability: Always
72  */
73 #define VFIO_GET_API_VERSION		_IO(VFIO_TYPE, VFIO_BASE + 0)
74 
75 /**
76  * VFIO_CHECK_EXTENSION - _IOW(VFIO_TYPE, VFIO_BASE + 1, __u32)
77  *
78  * Check whether an extension is supported.
79  * Return: 0 if not supported, 1 (or some other positive integer) if supported.
80  * Availability: Always
81  */
82 #define VFIO_CHECK_EXTENSION		_IO(VFIO_TYPE, VFIO_BASE + 1)
83 
84 /**
85  * VFIO_SET_IOMMU - _IOW(VFIO_TYPE, VFIO_BASE + 2, __s32)
86  *
87  * Set the iommu to the given type.  The type must be supported by an
88  * iommu driver as verified by calling CHECK_EXTENSION using the same
89  * type.  A group must be set to this file descriptor before this
90  * ioctl is available.  The IOMMU interfaces enabled by this call are
91  * specific to the value set.
92  * Return: 0 on success, -errno on failure
93  * Availability: When VFIO group attached
94  */
95 #define VFIO_SET_IOMMU			_IO(VFIO_TYPE, VFIO_BASE + 2)
96 
97 /* -------- IOCTLs for GROUP file descriptors (/dev/vfio/$GROUP) -------- */
98 
99 /**
100  * VFIO_GROUP_GET_STATUS - _IOR(VFIO_TYPE, VFIO_BASE + 3,
101  *						struct vfio_group_status)
102  *
103  * Retrieve information about the group.  Fills in provided
104  * struct vfio_group_info.  Caller sets argsz.
105  * Return: 0 on succes, -errno on failure.
106  * Availability: Always
107  */
108 struct vfio_group_status {
109 	__u32	argsz;
110 	__u32	flags;
111 #define VFIO_GROUP_FLAGS_VIABLE		(1 << 0)
112 #define VFIO_GROUP_FLAGS_CONTAINER_SET	(1 << 1)
113 };
114 #define VFIO_GROUP_GET_STATUS		_IO(VFIO_TYPE, VFIO_BASE + 3)
115 
116 /**
117  * VFIO_GROUP_SET_CONTAINER - _IOW(VFIO_TYPE, VFIO_BASE + 4, __s32)
118  *
119  * Set the container for the VFIO group to the open VFIO file
120  * descriptor provided.  Groups may only belong to a single
121  * container.  Containers may, at their discretion, support multiple
122  * groups.  Only when a container is set are all of the interfaces
123  * of the VFIO file descriptor and the VFIO group file descriptor
124  * available to the user.
125  * Return: 0 on success, -errno on failure.
126  * Availability: Always
127  */
128 #define VFIO_GROUP_SET_CONTAINER	_IO(VFIO_TYPE, VFIO_BASE + 4)
129 
130 /**
131  * VFIO_GROUP_UNSET_CONTAINER - _IO(VFIO_TYPE, VFIO_BASE + 5)
132  *
133  * Remove the group from the attached container.  This is the
134  * opposite of the SET_CONTAINER call and returns the group to
135  * an initial state.  All device file descriptors must be released
136  * prior to calling this interface.  When removing the last group
137  * from a container, the IOMMU will be disabled and all state lost,
138  * effectively also returning the VFIO file descriptor to an initial
139  * state.
140  * Return: 0 on success, -errno on failure.
141  * Availability: When attached to container
142  */
143 #define VFIO_GROUP_UNSET_CONTAINER	_IO(VFIO_TYPE, VFIO_BASE + 5)
144 
145 /**
146  * VFIO_GROUP_GET_DEVICE_FD - _IOW(VFIO_TYPE, VFIO_BASE + 6, char)
147  *
148  * Return a new file descriptor for the device object described by
149  * the provided string.  The string should match a device listed in
150  * the devices subdirectory of the IOMMU group sysfs entry.  The
151  * group containing the device must already be added to this context.
152  * Return: new file descriptor on success, -errno on failure.
153  * Availability: When attached to container
154  */
155 #define VFIO_GROUP_GET_DEVICE_FD	_IO(VFIO_TYPE, VFIO_BASE + 6)
156 
157 /* --------------- IOCTLs for DEVICE file descriptors --------------- */
158 
159 /**
160  * VFIO_DEVICE_GET_INFO - _IOR(VFIO_TYPE, VFIO_BASE + 7,
161  *						struct vfio_device_info)
162  *
163  * Retrieve information about the device.  Fills in provided
164  * struct vfio_device_info.  Caller sets argsz.
165  * Return: 0 on success, -errno on failure.
166  */
167 struct vfio_device_info {
168 	__u32	argsz;
169 	__u32	flags;
170 #define VFIO_DEVICE_FLAGS_RESET	(1 << 0)	/* Device supports reset */
171 #define VFIO_DEVICE_FLAGS_PCI	(1 << 1)	/* vfio-pci device */
172 #define VFIO_DEVICE_FLAGS_PLATFORM (1 << 2)	/* vfio-platform device */
173 #define VFIO_DEVICE_FLAGS_AMBA  (1 << 3)	/* vfio-amba device */
174 	__u32	num_regions;	/* Max region index + 1 */
175 	__u32	num_irqs;	/* Max IRQ index + 1 */
176 };
177 #define VFIO_DEVICE_GET_INFO		_IO(VFIO_TYPE, VFIO_BASE + 7)
178 
179 /**
180  * VFIO_DEVICE_GET_REGION_INFO - _IOWR(VFIO_TYPE, VFIO_BASE + 8,
181  *				       struct vfio_region_info)
182  *
183  * Retrieve information about a device region.  Caller provides
184  * struct vfio_region_info with index value set.  Caller sets argsz.
185  * Implementation of region mapping is bus driver specific.  This is
186  * intended to describe MMIO, I/O port, as well as bus specific
187  * regions (ex. PCI config space).  Zero sized regions may be used
188  * to describe unimplemented regions (ex. unimplemented PCI BARs).
189  * Return: 0 on success, -errno on failure.
190  */
191 struct vfio_region_info {
192 	__u32	argsz;
193 	__u32	flags;
194 #define VFIO_REGION_INFO_FLAG_READ	(1 << 0) /* Region supports read */
195 #define VFIO_REGION_INFO_FLAG_WRITE	(1 << 1) /* Region supports write */
196 #define VFIO_REGION_INFO_FLAG_MMAP	(1 << 2) /* Region supports mmap */
197 	__u32	index;		/* Region index */
198 	__u32	resv;		/* Reserved for alignment */
199 	__u64	size;		/* Region size (bytes) */
200 	__u64	offset;		/* Region offset from start of device fd */
201 };
202 #define VFIO_DEVICE_GET_REGION_INFO	_IO(VFIO_TYPE, VFIO_BASE + 8)
203 
204 /**
205  * VFIO_DEVICE_GET_IRQ_INFO - _IOWR(VFIO_TYPE, VFIO_BASE + 9,
206  *				    struct vfio_irq_info)
207  *
208  * Retrieve information about a device IRQ.  Caller provides
209  * struct vfio_irq_info with index value set.  Caller sets argsz.
210  * Implementation of IRQ mapping is bus driver specific.  Indexes
211  * using multiple IRQs are primarily intended to support MSI-like
212  * interrupt blocks.  Zero count irq blocks may be used to describe
213  * unimplemented interrupt types.
214  *
215  * The EVENTFD flag indicates the interrupt index supports eventfd based
216  * signaling.
217  *
218  * The MASKABLE flags indicates the index supports MASK and UNMASK
219  * actions described below.
220  *
221  * AUTOMASKED indicates that after signaling, the interrupt line is
222  * automatically masked by VFIO and the user needs to unmask the line
223  * to receive new interrupts.  This is primarily intended to distinguish
224  * level triggered interrupts.
225  *
226  * The NORESIZE flag indicates that the interrupt lines within the index
227  * are setup as a set and new subindexes cannot be enabled without first
228  * disabling the entire index.  This is used for interrupts like PCI MSI
229  * and MSI-X where the driver may only use a subset of the available
230  * indexes, but VFIO needs to enable a specific number of vectors
231  * upfront.  In the case of MSI-X, where the user can enable MSI-X and
232  * then add and unmask vectors, it's up to userspace to make the decision
233  * whether to allocate the maximum supported number of vectors or tear
234  * down setup and incrementally increase the vectors as each is enabled.
235  */
236 struct vfio_irq_info {
237 	__u32	argsz;
238 	__u32	flags;
239 #define VFIO_IRQ_INFO_EVENTFD		(1 << 0)
240 #define VFIO_IRQ_INFO_MASKABLE		(1 << 1)
241 #define VFIO_IRQ_INFO_AUTOMASKED	(1 << 2)
242 #define VFIO_IRQ_INFO_NORESIZE		(1 << 3)
243 	__u32	index;		/* IRQ index */
244 	__u32	count;		/* Number of IRQs within this index */
245 };
246 #define VFIO_DEVICE_GET_IRQ_INFO	_IO(VFIO_TYPE, VFIO_BASE + 9)
247 
248 /**
249  * VFIO_DEVICE_SET_IRQS - _IOW(VFIO_TYPE, VFIO_BASE + 10, struct vfio_irq_set)
250  *
251  * Set signaling, masking, and unmasking of interrupts.  Caller provides
252  * struct vfio_irq_set with all fields set.  'start' and 'count' indicate
253  * the range of subindexes being specified.
254  *
255  * The DATA flags specify the type of data provided.  If DATA_NONE, the
256  * operation performs the specified action immediately on the specified
257  * interrupt(s).  For example, to unmask AUTOMASKED interrupt [0,0]:
258  * flags = (DATA_NONE|ACTION_UNMASK), index = 0, start = 0, count = 1.
259  *
260  * DATA_BOOL allows sparse support for the same on arrays of interrupts.
261  * For example, to mask interrupts [0,1] and [0,3] (but not [0,2]):
262  * flags = (DATA_BOOL|ACTION_MASK), index = 0, start = 1, count = 3,
263  * data = {1,0,1}
264  *
265  * DATA_EVENTFD binds the specified ACTION to the provided __s32 eventfd.
266  * A value of -1 can be used to either de-assign interrupts if already
267  * assigned or skip un-assigned interrupts.  For example, to set an eventfd
268  * to be trigger for interrupts [0,0] and [0,2]:
269  * flags = (DATA_EVENTFD|ACTION_TRIGGER), index = 0, start = 0, count = 3,
270  * data = {fd1, -1, fd2}
271  * If index [0,1] is previously set, two count = 1 ioctls calls would be
272  * required to set [0,0] and [0,2] without changing [0,1].
273  *
274  * Once a signaling mechanism is set, DATA_BOOL or DATA_NONE can be used
275  * with ACTION_TRIGGER to perform kernel level interrupt loopback testing
276  * from userspace (ie. simulate hardware triggering).
277  *
278  * Setting of an event triggering mechanism to userspace for ACTION_TRIGGER
279  * enables the interrupt index for the device.  Individual subindex interrupts
280  * can be disabled using the -1 value for DATA_EVENTFD or the index can be
281  * disabled as a whole with: flags = (DATA_NONE|ACTION_TRIGGER), count = 0.
282  *
283  * Note that ACTION_[UN]MASK specify user->kernel signaling (irqfds) while
284  * ACTION_TRIGGER specifies kernel->user signaling.
285  */
286 struct vfio_irq_set {
287 	__u32	argsz;
288 	__u32	flags;
289 #define VFIO_IRQ_SET_DATA_NONE		(1 << 0) /* Data not present */
290 #define VFIO_IRQ_SET_DATA_BOOL		(1 << 1) /* Data is bool (u8) */
291 #define VFIO_IRQ_SET_DATA_EVENTFD	(1 << 2) /* Data is eventfd (s32) */
292 #define VFIO_IRQ_SET_ACTION_MASK	(1 << 3) /* Mask interrupt */
293 #define VFIO_IRQ_SET_ACTION_UNMASK	(1 << 4) /* Unmask interrupt */
294 #define VFIO_IRQ_SET_ACTION_TRIGGER	(1 << 5) /* Trigger interrupt */
295 	__u32	index;
296 	__u32	start;
297 	__u32	count;
298 	__u8	data[];
299 };
300 #define VFIO_DEVICE_SET_IRQS		_IO(VFIO_TYPE, VFIO_BASE + 10)
301 
302 #define VFIO_IRQ_SET_DATA_TYPE_MASK	(VFIO_IRQ_SET_DATA_NONE | \
303 					 VFIO_IRQ_SET_DATA_BOOL | \
304 					 VFIO_IRQ_SET_DATA_EVENTFD)
305 #define VFIO_IRQ_SET_ACTION_TYPE_MASK	(VFIO_IRQ_SET_ACTION_MASK | \
306 					 VFIO_IRQ_SET_ACTION_UNMASK | \
307 					 VFIO_IRQ_SET_ACTION_TRIGGER)
308 /**
309  * VFIO_DEVICE_RESET - _IO(VFIO_TYPE, VFIO_BASE + 11)
310  *
311  * Reset a device.
312  */
313 #define VFIO_DEVICE_RESET		_IO(VFIO_TYPE, VFIO_BASE + 11)
314 
315 /*
316  * The VFIO-PCI bus driver makes use of the following fixed region and
317  * IRQ index mapping.  Unimplemented regions return a size of zero.
318  * Unimplemented IRQ types return a count of zero.
319  */
320 
321 enum {
322 	VFIO_PCI_BAR0_REGION_INDEX,
323 	VFIO_PCI_BAR1_REGION_INDEX,
324 	VFIO_PCI_BAR2_REGION_INDEX,
325 	VFIO_PCI_BAR3_REGION_INDEX,
326 	VFIO_PCI_BAR4_REGION_INDEX,
327 	VFIO_PCI_BAR5_REGION_INDEX,
328 	VFIO_PCI_ROM_REGION_INDEX,
329 	VFIO_PCI_CONFIG_REGION_INDEX,
330 	/*
331 	 * Expose VGA regions defined for PCI base class 03, subclass 00.
332 	 * This includes I/O port ranges 0x3b0 to 0x3bb and 0x3c0 to 0x3df
333 	 * as well as the MMIO range 0xa0000 to 0xbffff.  Each implemented
334 	 * range is found at it's identity mapped offset from the region
335 	 * offset, for example 0x3b0 is region_info.offset + 0x3b0.  Areas
336 	 * between described ranges are unimplemented.
337 	 */
338 	VFIO_PCI_VGA_REGION_INDEX,
339 	VFIO_PCI_NUM_REGIONS
340 };
341 
342 enum {
343 	VFIO_PCI_INTX_IRQ_INDEX,
344 	VFIO_PCI_MSI_IRQ_INDEX,
345 	VFIO_PCI_MSIX_IRQ_INDEX,
346 	VFIO_PCI_ERR_IRQ_INDEX,
347 	VFIO_PCI_REQ_IRQ_INDEX,
348 	VFIO_PCI_NUM_IRQS
349 };
350 
351 /**
352  * VFIO_DEVICE_GET_PCI_HOT_RESET_INFO - _IORW(VFIO_TYPE, VFIO_BASE + 12,
353  *					      struct vfio_pci_hot_reset_info)
354  *
355  * Return: 0 on success, -errno on failure:
356  *	-enospc = insufficient buffer, -enodev = unsupported for device.
357  */
358 struct vfio_pci_dependent_device {
359 	__u32	group_id;
360 	__u16	segment;
361 	__u8	bus;
362 	__u8	devfn; /* Use PCI_SLOT/PCI_FUNC */
363 };
364 
365 struct vfio_pci_hot_reset_info {
366 	__u32	argsz;
367 	__u32	flags;
368 	__u32	count;
369 	struct vfio_pci_dependent_device	devices[];
370 };
371 
372 #define VFIO_DEVICE_GET_PCI_HOT_RESET_INFO	_IO(VFIO_TYPE, VFIO_BASE + 12)
373 
374 /**
375  * VFIO_DEVICE_PCI_HOT_RESET - _IOW(VFIO_TYPE, VFIO_BASE + 13,
376  *				    struct vfio_pci_hot_reset)
377  *
378  * Return: 0 on success, -errno on failure.
379  */
380 struct vfio_pci_hot_reset {
381 	__u32	argsz;
382 	__u32	flags;
383 	__u32	count;
384 	__s32	group_fds[];
385 };
386 
387 #define VFIO_DEVICE_PCI_HOT_RESET	_IO(VFIO_TYPE, VFIO_BASE + 13)
388 
389 /* -------- API for Type1 VFIO IOMMU -------- */
390 
391 /**
392  * VFIO_IOMMU_GET_INFO - _IOR(VFIO_TYPE, VFIO_BASE + 12, struct vfio_iommu_info)
393  *
394  * Retrieve information about the IOMMU object. Fills in provided
395  * struct vfio_iommu_info. Caller sets argsz.
396  *
397  * XXX Should we do these by CHECK_EXTENSION too?
398  */
399 struct vfio_iommu_type1_info {
400 	__u32	argsz;
401 	__u32	flags;
402 #define VFIO_IOMMU_INFO_PGSIZES (1 << 0)	/* supported page sizes info */
403 	__u64	iova_pgsizes;		/* Bitmap of supported page sizes */
404 };
405 
406 #define VFIO_IOMMU_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12)
407 
408 /**
409  * VFIO_IOMMU_MAP_DMA - _IOW(VFIO_TYPE, VFIO_BASE + 13, struct vfio_dma_map)
410  *
411  * Map process virtual addresses to IO virtual addresses using the
412  * provided struct vfio_dma_map. Caller sets argsz. READ &/ WRITE required.
413  */
414 struct vfio_iommu_type1_dma_map {
415 	__u32	argsz;
416 	__u32	flags;
417 #define VFIO_DMA_MAP_FLAG_READ (1 << 0)		/* readable from device */
418 #define VFIO_DMA_MAP_FLAG_WRITE (1 << 1)	/* writable from device */
419 	__u64	vaddr;				/* Process virtual address */
420 	__u64	iova;				/* IO virtual address */
421 	__u64	size;				/* Size of mapping (bytes) */
422 };
423 
424 #define VFIO_IOMMU_MAP_DMA _IO(VFIO_TYPE, VFIO_BASE + 13)
425 
426 /**
427  * VFIO_IOMMU_UNMAP_DMA - _IOWR(VFIO_TYPE, VFIO_BASE + 14,
428  *							struct vfio_dma_unmap)
429  *
430  * Unmap IO virtual addresses using the provided struct vfio_dma_unmap.
431  * Caller sets argsz.  The actual unmapped size is returned in the size
432  * field.  No guarantee is made to the user that arbitrary unmaps of iova
433  * or size different from those used in the original mapping call will
434  * succeed.
435  */
436 struct vfio_iommu_type1_dma_unmap {
437 	__u32	argsz;
438 	__u32	flags;
439 	__u64	iova;				/* IO virtual address */
440 	__u64	size;				/* Size of mapping (bytes) */
441 };
442 
443 #define VFIO_IOMMU_UNMAP_DMA _IO(VFIO_TYPE, VFIO_BASE + 14)
444 
445 /*
446  * IOCTLs to enable/disable IOMMU container usage.
447  * No parameters are supported.
448  */
449 #define VFIO_IOMMU_ENABLE	_IO(VFIO_TYPE, VFIO_BASE + 15)
450 #define VFIO_IOMMU_DISABLE	_IO(VFIO_TYPE, VFIO_BASE + 16)
451 
452 /* -------- Additional API for SPAPR TCE (Server POWERPC) IOMMU -------- */
453 
454 /*
455  * The SPAPR TCE DDW info struct provides the information about
456  * the details of Dynamic DMA window capability.
457  *
458  * @pgsizes contains a page size bitmask, 4K/64K/16M are supported.
459  * @max_dynamic_windows_supported tells the maximum number of windows
460  * which the platform can create.
461  * @levels tells the maximum number of levels in multi-level IOMMU tables;
462  * this allows splitting a table into smaller chunks which reduces
463  * the amount of physically contiguous memory required for the table.
464  */
465 struct vfio_iommu_spapr_tce_ddw_info {
466 	__u64 pgsizes;			/* Bitmap of supported page sizes */
467 	__u32 max_dynamic_windows_supported;
468 	__u32 levels;
469 };
470 
471 /*
472  * The SPAPR TCE info struct provides the information about the PCI bus
473  * address ranges available for DMA, these values are programmed into
474  * the hardware so the guest has to know that information.
475  *
476  * The DMA 32 bit window start is an absolute PCI bus address.
477  * The IOVA address passed via map/unmap ioctls are absolute PCI bus
478  * addresses too so the window works as a filter rather than an offset
479  * for IOVA addresses.
480  *
481  * Flags supported:
482  * - VFIO_IOMMU_SPAPR_INFO_DDW: informs the userspace that dynamic DMA windows
483  *   (DDW) support is present. @ddw is only supported when DDW is present.
484  */
485 struct vfio_iommu_spapr_tce_info {
486 	__u32 argsz;
487 	__u32 flags;
488 #define VFIO_IOMMU_SPAPR_INFO_DDW	(1 << 0)	/* DDW supported */
489 	__u32 dma32_window_start;	/* 32 bit window start (bytes) */
490 	__u32 dma32_window_size;	/* 32 bit window size (bytes) */
491 	struct vfio_iommu_spapr_tce_ddw_info ddw;
492 };
493 
494 #define VFIO_IOMMU_SPAPR_TCE_GET_INFO	_IO(VFIO_TYPE, VFIO_BASE + 12)
495 
496 /*
497  * EEH PE operation struct provides ways to:
498  * - enable/disable EEH functionality;
499  * - unfreeze IO/DMA for frozen PE;
500  * - read PE state;
501  * - reset PE;
502  * - configure PE;
503  * - inject EEH error.
504  */
505 struct vfio_eeh_pe_err {
506 	__u32 type;
507 	__u32 func;
508 	__u64 addr;
509 	__u64 mask;
510 };
511 
512 struct vfio_eeh_pe_op {
513 	__u32 argsz;
514 	__u32 flags;
515 	__u32 op;
516 	union {
517 		struct vfio_eeh_pe_err err;
518 	};
519 };
520 
521 #define VFIO_EEH_PE_DISABLE		0	/* Disable EEH functionality */
522 #define VFIO_EEH_PE_ENABLE		1	/* Enable EEH functionality  */
523 #define VFIO_EEH_PE_UNFREEZE_IO		2	/* Enable IO for frozen PE   */
524 #define VFIO_EEH_PE_UNFREEZE_DMA	3	/* Enable DMA for frozen PE  */
525 #define VFIO_EEH_PE_GET_STATE		4	/* PE state retrieval        */
526 #define  VFIO_EEH_PE_STATE_NORMAL	0	/* PE in functional state    */
527 #define  VFIO_EEH_PE_STATE_RESET	1	/* PE reset in progress      */
528 #define  VFIO_EEH_PE_STATE_STOPPED	2	/* Stopped DMA and IO        */
529 #define  VFIO_EEH_PE_STATE_STOPPED_DMA	4	/* Stopped DMA only          */
530 #define  VFIO_EEH_PE_STATE_UNAVAIL	5	/* State unavailable         */
531 #define VFIO_EEH_PE_RESET_DEACTIVATE	5	/* Deassert PE reset         */
532 #define VFIO_EEH_PE_RESET_HOT		6	/* Assert hot reset          */
533 #define VFIO_EEH_PE_RESET_FUNDAMENTAL	7	/* Assert fundamental reset  */
534 #define VFIO_EEH_PE_CONFIGURE		8	/* PE configuration          */
535 #define VFIO_EEH_PE_INJECT_ERR		9	/* Inject EEH error          */
536 
537 #define VFIO_EEH_PE_OP			_IO(VFIO_TYPE, VFIO_BASE + 21)
538 
539 /**
540  * VFIO_IOMMU_SPAPR_REGISTER_MEMORY - _IOW(VFIO_TYPE, VFIO_BASE + 17, struct vfio_iommu_spapr_register_memory)
541  *
542  * Registers user space memory where DMA is allowed. It pins
543  * user pages and does the locked memory accounting so
544  * subsequent VFIO_IOMMU_MAP_DMA/VFIO_IOMMU_UNMAP_DMA calls
545  * get faster.
546  */
547 struct vfio_iommu_spapr_register_memory {
548 	__u32	argsz;
549 	__u32	flags;
550 	__u64	vaddr;				/* Process virtual address */
551 	__u64	size;				/* Size of mapping (bytes) */
552 };
553 #define VFIO_IOMMU_SPAPR_REGISTER_MEMORY	_IO(VFIO_TYPE, VFIO_BASE + 17)
554 
555 /**
556  * VFIO_IOMMU_SPAPR_UNREGISTER_MEMORY - _IOW(VFIO_TYPE, VFIO_BASE + 18, struct vfio_iommu_spapr_register_memory)
557  *
558  * Unregisters user space memory registered with
559  * VFIO_IOMMU_SPAPR_REGISTER_MEMORY.
560  * Uses vfio_iommu_spapr_register_memory for parameters.
561  */
562 #define VFIO_IOMMU_SPAPR_UNREGISTER_MEMORY	_IO(VFIO_TYPE, VFIO_BASE + 18)
563 
564 /**
565  * VFIO_IOMMU_SPAPR_TCE_CREATE - _IOWR(VFIO_TYPE, VFIO_BASE + 19, struct vfio_iommu_spapr_tce_create)
566  *
567  * Creates an additional TCE table and programs it (sets a new DMA window)
568  * to every IOMMU group in the container. It receives page shift, window
569  * size and number of levels in the TCE table being created.
570  *
571  * It allocates and returns an offset on a PCI bus of the new DMA window.
572  */
573 struct vfio_iommu_spapr_tce_create {
574 	__u32 argsz;
575 	__u32 flags;
576 	/* in */
577 	__u32 page_shift;
578 	__u32 __resv1;
579 	__u64 window_size;
580 	__u32 levels;
581 	__u32 __resv2;
582 	/* out */
583 	__u64 start_addr;
584 };
585 #define VFIO_IOMMU_SPAPR_TCE_CREATE	_IO(VFIO_TYPE, VFIO_BASE + 19)
586 
587 /**
588  * VFIO_IOMMU_SPAPR_TCE_REMOVE - _IOW(VFIO_TYPE, VFIO_BASE + 20, struct vfio_iommu_spapr_tce_remove)
589  *
590  * Unprograms a TCE table from all groups in the container and destroys it.
591  * It receives a PCI bus offset as a window id.
592  */
593 struct vfio_iommu_spapr_tce_remove {
594 	__u32 argsz;
595 	__u32 flags;
596 	/* in */
597 	__u64 start_addr;
598 };
599 #define VFIO_IOMMU_SPAPR_TCE_REMOVE	_IO(VFIO_TYPE, VFIO_BASE + 20)
600 
601 /* ***************************************************************** */
602 
603 #endif /* VFIO_H */
604