1 #ifndef ARM_TARGET_SYSCALL_H 2 #define ARM_TARGET_SYSCALL_H 3 4 /* this struct defines the way the registers are stored on the 5 stack during a system call. */ 6 7 /* uregs[0..15] are r0 to r15; uregs[16] is CPSR; uregs[17] is ORIG_r0 */ 8 struct target_pt_regs { 9 abi_long uregs[18]; 10 }; 11 12 #define ARM_SYSCALL_BASE 0x900000 13 #define ARM_THUMB_SYSCALL 0 14 15 #define ARM_NR_BASE 0xf0000 16 #define ARM_NR_breakpoint (ARM_NR_BASE + 1) 17 #define ARM_NR_cacheflush (ARM_NR_BASE + 2) 18 #define ARM_NR_set_tls (ARM_NR_BASE + 5) 19 20 #define ARM_NR_semihosting 0x123456 21 #define ARM_NR_thumb_semihosting 0xAB 22 23 #if defined(TARGET_WORDS_BIGENDIAN) 24 #define UNAME_MACHINE "armv5teb" 25 #else 26 #define UNAME_MACHINE "armv5tel" 27 #endif 28 #define UNAME_MINIMUM_RELEASE "2.6.32" 29 30 #define TARGET_CLONE_BACKWARDS 31 32 #define TARGET_MINSIGSTKSZ 2048 33 #define TARGET_MLOCKALL_MCL_CURRENT 1 34 #define TARGET_MLOCKALL_MCL_FUTURE 2 35 #define TARGET_WANT_OLD_SYS_SELECT 36 37 #define TARGET_FORCE_SHMLBA 38 39 static inline abi_ulong target_shmlba(CPUARMState *env) 40 { 41 return 4 * 4096; 42 } 43 44 #endif /* ARM_TARGET_SYSCALL_H */ 45