1 #ifndef ARM_TARGET_SYSCALL_H 2 #define ARM_TARGET_SYSCALL_H 3 4 /* this struct defines the way the registers are stored on the 5 stack during a system call. */ 6 7 /* uregs[0..15] are r0 to r15; uregs[16] is CPSR; uregs[17] is ORIG_r0 */ 8 struct target_pt_regs { 9 abi_long uregs[18]; 10 }; 11 12 #define ARM_SYSCALL_BASE 0x900000 13 #define ARM_THUMB_SYSCALL 0 14 15 #define ARM_NR_BASE 0xf0000 16 #define ARM_NR_breakpoint (ARM_NR_BASE + 1) 17 #define ARM_NR_cacheflush (ARM_NR_BASE + 2) 18 #define ARM_NR_set_tls (ARM_NR_BASE + 5) 19 #define ARM_NR_get_tls (ARM_NR_BASE + 6) 20 21 #if TARGET_BIG_ENDIAN 22 #define UNAME_MACHINE "armv5teb" 23 #else 24 #define UNAME_MACHINE "armv5tel" 25 #endif 26 #define UNAME_MINIMUM_RELEASE "2.6.32" 27 28 #define TARGET_CLONE_BACKWARDS 29 30 #define TARGET_MCL_CURRENT 1 31 #define TARGET_MCL_FUTURE 2 32 #define TARGET_MCL_ONFAULT 4 33 34 #define TARGET_WANT_OLD_SYS_SELECT 35 36 #define TARGET_FORCE_SHMLBA 37 38 static inline abi_ulong target_shmlba(CPUARMState *env) 39 { 40 return 4 * 4096; 41 } 42 43 #endif /* ARM_TARGET_SYSCALL_H */ 44