xref: /qemu/linux-user/user-internals.h (revision ca61e750)
1 /*
2  * user-internals.h: prototypes etc internal to the linux-user implementation
3  *
4  *  This program is free software; you can redistribute it and/or modify
5  *  it under the terms of the GNU General Public License as published by
6  *  the Free Software Foundation; either version 2 of the License, or
7  *  (at your option) any later version.
8  *
9  *  This program is distributed in the hope that it will be useful,
10  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
11  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  *  GNU General Public License for more details.
13  *
14  *  You should have received a copy of the GNU General Public License
15  *  along with this program; if not, see <http://www.gnu.org/licenses/>.
16  */
17 
18 #ifndef LINUX_USER_USER_INTERNALS_H
19 #define LINUX_USER_USER_INTERNALS_H
20 
21 #include "exec/user/thunk.h"
22 #include "exec/exec-all.h"
23 #include "qemu/log.h"
24 
25 extern char *exec_path;
26 void init_task_state(TaskState *ts);
27 void task_settid(TaskState *);
28 void stop_all_tasks(void);
29 extern const char *qemu_uname_release;
30 extern unsigned long mmap_min_addr;
31 
32 typedef struct IOCTLEntry IOCTLEntry;
33 
34 typedef abi_long do_ioctl_fn(const IOCTLEntry *ie, uint8_t *buf_temp,
35                              int fd, int cmd, abi_long arg);
36 
37 struct IOCTLEntry {
38     int target_cmd;
39     unsigned int host_cmd;
40     const char *name;
41     int access;
42     do_ioctl_fn *do_ioctl;
43     const argtype arg_type[5];
44 };
45 
46 extern IOCTLEntry ioctl_entries[];
47 
48 #define IOC_R 0x0001
49 #define IOC_W 0x0002
50 #define IOC_RW (IOC_R | IOC_W)
51 
52 /*
53  * Returns true if the image uses the FDPIC ABI. If this is the case,
54  * we have to provide some information (loadmap, pt_dynamic_info) such
55  * that the program can be relocated adequately. This is also useful
56  * when handling signals.
57  */
58 int info_is_fdpic(struct image_info *info);
59 
60 void target_set_brk(abi_ulong new_brk);
61 void syscall_init(void);
62 abi_long do_syscall(CPUArchState *cpu_env, int num, abi_long arg1,
63                     abi_long arg2, abi_long arg3, abi_long arg4,
64                     abi_long arg5, abi_long arg6, abi_long arg7,
65                     abi_long arg8);
66 extern __thread CPUState *thread_cpu;
67 G_NORETURN void cpu_loop(CPUArchState *env);
68 const char *target_strerror(int err);
69 int get_osversion(void);
70 void init_qemu_uname_release(void);
71 void fork_start(void);
72 void fork_end(int child);
73 
74 /**
75  * probe_guest_base:
76  * @image_name: the executable being loaded
77  * @loaddr: the lowest fixed address in the executable
78  * @hiaddr: the highest fixed address in the executable
79  *
80  * Creates the initial guest address space in the host memory space.
81  *
82  * If @loaddr == 0, then no address in the executable is fixed,
83  * i.e. it is fully relocatable.  In that case @hiaddr is the size
84  * of the executable.
85  *
86  * This function will not return if a valid value for guest_base
87  * cannot be chosen.  On return, the executable loader can expect
88  *
89  *    target_mmap(loaddr, hiaddr - loaddr, ...)
90  *
91  * to succeed.
92  */
93 void probe_guest_base(const char *image_name,
94                       abi_ulong loaddr, abi_ulong hiaddr);
95 
96 /* syscall.c */
97 int host_to_target_waitstatus(int status);
98 
99 #ifdef TARGET_I386
100 /* vm86.c */
101 void save_v86_state(CPUX86State *env);
102 void handle_vm86_trap(CPUX86State *env, int trapno);
103 void handle_vm86_fault(CPUX86State *env);
104 int do_vm86(CPUX86State *env, long subfunction, abi_ulong v86_addr);
105 #elif defined(TARGET_SPARC64)
106 void sparc64_set_context(CPUSPARCState *env);
107 void sparc64_get_context(CPUSPARCState *env);
108 #endif
109 
110 static inline int is_error(abi_long ret)
111 {
112     return (abi_ulong)ret >= (abi_ulong)(-4096);
113 }
114 
115 #if (TARGET_ABI_BITS == 32) && !defined(TARGET_ABI_MIPSN32)
116 static inline uint64_t target_offset64(uint32_t word0, uint32_t word1)
117 {
118 #if TARGET_BIG_ENDIAN
119     return ((uint64_t)word0 << 32) | word1;
120 #else
121     return ((uint64_t)word1 << 32) | word0;
122 #endif
123 }
124 #else /* TARGET_ABI_BITS == 32 && !defined(TARGET_ABI_MIPSN32) */
125 static inline uint64_t target_offset64(uint64_t word0, uint64_t word1)
126 {
127     return word0;
128 }
129 #endif /* TARGET_ABI_BITS != 32 */
130 
131 void print_termios(void *arg);
132 
133 /* ARM EABI and MIPS expect 64bit types aligned even on pairs or registers */
134 #ifdef TARGET_ARM
135 static inline int regpairs_aligned(CPUArchState *cpu_env, int num)
136 {
137     return cpu_env->eabi == 1;
138 }
139 #elif defined(TARGET_MIPS) && defined(TARGET_ABI_MIPSO32)
140 static inline int regpairs_aligned(CPUArchState *cpu_env, int num) { return 1; }
141 #elif defined(TARGET_PPC) && !defined(TARGET_PPC64)
142 /*
143  * SysV AVI for PPC32 expects 64bit parameters to be passed on odd/even pairs
144  * of registers which translates to the same as ARM/MIPS, because we start with
145  * r3 as arg1
146  */
147 static inline int regpairs_aligned(CPUArchState *cpu_env, int num) { return 1; }
148 #elif defined(TARGET_SH4)
149 /* SH4 doesn't align register pairs, except for p{read,write}64 */
150 static inline int regpairs_aligned(CPUArchState *cpu_env, int num)
151 {
152     switch (num) {
153     case TARGET_NR_pread64:
154     case TARGET_NR_pwrite64:
155         return 1;
156 
157     default:
158         return 0;
159     }
160 }
161 #elif defined(TARGET_XTENSA)
162 static inline int regpairs_aligned(CPUArchState *cpu_env, int num) { return 1; }
163 #elif defined(TARGET_HEXAGON)
164 static inline int regpairs_aligned(CPUArchState *cpu_env, int num) { return 1; }
165 #else
166 static inline int regpairs_aligned(CPUArchState *cpu_env, int num) { return 0; }
167 #endif
168 
169 /**
170  * preexit_cleanup: housekeeping before the guest exits
171  *
172  * env: the CPU state
173  * code: the exit code
174  */
175 void preexit_cleanup(CPUArchState *env, int code);
176 
177 /*
178  * Include target-specific struct and function definitions;
179  * they may need access to the target-independent structures
180  * above, so include them last.
181  */
182 #include "target_cpu.h"
183 #include "target_structs.h"
184 
185 #endif
186