146ddf551Sbellard /* 246ddf551Sbellard * vm86 linux syscall support 346ddf551Sbellard * 446ddf551Sbellard * Copyright (c) 2003 Fabrice Bellard 546ddf551Sbellard * 646ddf551Sbellard * This program is free software; you can redistribute it and/or modify 746ddf551Sbellard * it under the terms of the GNU General Public License as published by 846ddf551Sbellard * the Free Software Foundation; either version 2 of the License, or 946ddf551Sbellard * (at your option) any later version. 1046ddf551Sbellard * 1146ddf551Sbellard * This program is distributed in the hope that it will be useful, 1246ddf551Sbellard * but WITHOUT ANY WARRANTY; without even the implied warranty of 1346ddf551Sbellard * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1446ddf551Sbellard * GNU General Public License for more details. 1546ddf551Sbellard * 1646ddf551Sbellard * You should have received a copy of the GNU General Public License 178167ee88SBlue Swirl * along with this program; if not, see <http://www.gnu.org/licenses/>. 1846ddf551Sbellard */ 19d39594e9SPeter Maydell #include "qemu/osdep.h" 2046ddf551Sbellard 2146ddf551Sbellard #include "qemu.h" 2246ddf551Sbellard 2346ddf551Sbellard //#define DEBUG_VM86 2446ddf551Sbellard 25d12d51d5Saliguori #ifdef DEBUG_VM86 2693fcfe39Saliguori # define LOG_VM86(...) qemu_log(__VA_ARGS__); 27d12d51d5Saliguori #else 28d12d51d5Saliguori # define LOG_VM86(...) do { } while (0) 29d12d51d5Saliguori #endif 30d12d51d5Saliguori 31d12d51d5Saliguori 3246ddf551Sbellard #define set_flags(X,new,mask) \ 3346ddf551Sbellard ((X) = ((X) & ~(mask)) | ((new) & (mask))) 3446ddf551Sbellard 3546ddf551Sbellard #define SAFE_MASK (0xDD5) 3646ddf551Sbellard #define RETURN_MASK (0xDFF) 3746ddf551Sbellard 3846ddf551Sbellard static inline int is_revectored(int nr, struct target_revectored_struct *bitmap) 3946ddf551Sbellard { 40b333af06Sbellard return (((uint8_t *)bitmap)[nr >> 3] >> (nr & 7)) & 1; 4146ddf551Sbellard } 4246ddf551Sbellard 435899d6d0SPeter Maydell static inline void vm_putw(CPUX86State *env, uint32_t segptr, 445899d6d0SPeter Maydell unsigned int reg16, unsigned int val) 4546ddf551Sbellard { 465899d6d0SPeter Maydell cpu_stw_data(env, segptr + (reg16 & 0xffff), val); 4746ddf551Sbellard } 4846ddf551Sbellard 495899d6d0SPeter Maydell static inline void vm_putl(CPUX86State *env, uint32_t segptr, 505899d6d0SPeter Maydell unsigned int reg16, unsigned int val) 5146ddf551Sbellard { 525899d6d0SPeter Maydell cpu_stl_data(env, segptr + (reg16 & 0xffff), val); 5346ddf551Sbellard } 5446ddf551Sbellard 555899d6d0SPeter Maydell static inline unsigned int vm_getb(CPUX86State *env, 565899d6d0SPeter Maydell uint32_t segptr, unsigned int reg16) 571455bf48Sbellard { 585899d6d0SPeter Maydell return cpu_ldub_data(env, segptr + (reg16 & 0xffff)); 591455bf48Sbellard } 601455bf48Sbellard 615899d6d0SPeter Maydell static inline unsigned int vm_getw(CPUX86State *env, 625899d6d0SPeter Maydell uint32_t segptr, unsigned int reg16) 6346ddf551Sbellard { 645899d6d0SPeter Maydell return cpu_lduw_data(env, segptr + (reg16 & 0xffff)); 6546ddf551Sbellard } 6646ddf551Sbellard 675899d6d0SPeter Maydell static inline unsigned int vm_getl(CPUX86State *env, 685899d6d0SPeter Maydell uint32_t segptr, unsigned int reg16) 6946ddf551Sbellard { 705899d6d0SPeter Maydell return cpu_ldl_data(env, segptr + (reg16 & 0xffff)); 7146ddf551Sbellard } 7246ddf551Sbellard 7346ddf551Sbellard void save_v86_state(CPUX86State *env) 7446ddf551Sbellard { 75*6aa9e42fSRichard Henderson CPUState *cs = env_cpu(env); 760429a971SAndreas Färber TaskState *ts = cs->opaque; 7753a5960aSpbrook struct target_vm86plus_struct * target_v86; 7846ddf551Sbellard 79579a97f7Sbellard if (!lock_user_struct(VERIFY_WRITE, target_v86, ts->target_v86, 0)) 80579a97f7Sbellard /* FIXME - should return an error */ 81579a97f7Sbellard return; 8246ddf551Sbellard /* put the VM86 registers in the userspace register structure */ 8353a5960aSpbrook target_v86->regs.eax = tswap32(env->regs[R_EAX]); 8453a5960aSpbrook target_v86->regs.ebx = tswap32(env->regs[R_EBX]); 8553a5960aSpbrook target_v86->regs.ecx = tswap32(env->regs[R_ECX]); 8653a5960aSpbrook target_v86->regs.edx = tswap32(env->regs[R_EDX]); 8753a5960aSpbrook target_v86->regs.esi = tswap32(env->regs[R_ESI]); 8853a5960aSpbrook target_v86->regs.edi = tswap32(env->regs[R_EDI]); 8953a5960aSpbrook target_v86->regs.ebp = tswap32(env->regs[R_EBP]); 9053a5960aSpbrook target_v86->regs.esp = tswap32(env->regs[R_ESP]); 9153a5960aSpbrook target_v86->regs.eip = tswap32(env->eip); 9253a5960aSpbrook target_v86->regs.cs = tswap16(env->segs[R_CS].selector); 9353a5960aSpbrook target_v86->regs.ss = tswap16(env->segs[R_SS].selector); 9453a5960aSpbrook target_v86->regs.ds = tswap16(env->segs[R_DS].selector); 9553a5960aSpbrook target_v86->regs.es = tswap16(env->segs[R_ES].selector); 9653a5960aSpbrook target_v86->regs.fs = tswap16(env->segs[R_FS].selector); 9753a5960aSpbrook target_v86->regs.gs = tswap16(env->segs[R_GS].selector); 9846ddf551Sbellard set_flags(env->eflags, ts->v86flags, VIF_MASK | ts->v86mask); 9953a5960aSpbrook target_v86->regs.eflags = tswap32(env->eflags); 10053a5960aSpbrook unlock_user_struct(target_v86, ts->target_v86, 1); 101d12d51d5Saliguori LOG_VM86("save_v86_state: eflags=%08x cs:ip=%04x:%04x\n", 102c05bab77Sbellard env->eflags, env->segs[R_CS].selector, env->eip); 10346ddf551Sbellard 10446ddf551Sbellard /* restore 32 bit registers */ 10546ddf551Sbellard env->regs[R_EAX] = ts->vm86_saved_regs.eax; 10646ddf551Sbellard env->regs[R_EBX] = ts->vm86_saved_regs.ebx; 10746ddf551Sbellard env->regs[R_ECX] = ts->vm86_saved_regs.ecx; 10846ddf551Sbellard env->regs[R_EDX] = ts->vm86_saved_regs.edx; 10946ddf551Sbellard env->regs[R_ESI] = ts->vm86_saved_regs.esi; 11046ddf551Sbellard env->regs[R_EDI] = ts->vm86_saved_regs.edi; 11146ddf551Sbellard env->regs[R_EBP] = ts->vm86_saved_regs.ebp; 11246ddf551Sbellard env->regs[R_ESP] = ts->vm86_saved_regs.esp; 11346ddf551Sbellard env->eflags = ts->vm86_saved_regs.eflags; 11446ddf551Sbellard env->eip = ts->vm86_saved_regs.eip; 11546ddf551Sbellard 11646ddf551Sbellard cpu_x86_load_seg(env, R_CS, ts->vm86_saved_regs.cs); 11746ddf551Sbellard cpu_x86_load_seg(env, R_SS, ts->vm86_saved_regs.ss); 11846ddf551Sbellard cpu_x86_load_seg(env, R_DS, ts->vm86_saved_regs.ds); 11946ddf551Sbellard cpu_x86_load_seg(env, R_ES, ts->vm86_saved_regs.es); 12046ddf551Sbellard cpu_x86_load_seg(env, R_FS, ts->vm86_saved_regs.fs); 12146ddf551Sbellard cpu_x86_load_seg(env, R_GS, ts->vm86_saved_regs.gs); 12246ddf551Sbellard } 12346ddf551Sbellard 12446ddf551Sbellard /* return from vm86 mode to 32 bit. The vm86() syscall will return 12546ddf551Sbellard 'retval' */ 12646ddf551Sbellard static inline void return_to_32bit(CPUX86State *env, int retval) 12746ddf551Sbellard { 128d12d51d5Saliguori LOG_VM86("return_to_32bit: ret=0x%x\n", retval); 12946ddf551Sbellard save_v86_state(env); 13046ddf551Sbellard env->regs[R_EAX] = retval; 13146ddf551Sbellard } 13246ddf551Sbellard 13346ddf551Sbellard static inline int set_IF(CPUX86State *env) 13446ddf551Sbellard { 135*6aa9e42fSRichard Henderson CPUState *cs = env_cpu(env); 1360429a971SAndreas Färber TaskState *ts = cs->opaque; 13746ddf551Sbellard 13846ddf551Sbellard ts->v86flags |= VIF_MASK; 13946ddf551Sbellard if (ts->v86flags & VIP_MASK) { 14046ddf551Sbellard return_to_32bit(env, TARGET_VM86_STI); 14146ddf551Sbellard return 1; 14246ddf551Sbellard } 14346ddf551Sbellard return 0; 14446ddf551Sbellard } 14546ddf551Sbellard 14646ddf551Sbellard static inline void clear_IF(CPUX86State *env) 14746ddf551Sbellard { 148*6aa9e42fSRichard Henderson CPUState *cs = env_cpu(env); 1490429a971SAndreas Färber TaskState *ts = cs->opaque; 15046ddf551Sbellard 15146ddf551Sbellard ts->v86flags &= ~VIF_MASK; 15246ddf551Sbellard } 15346ddf551Sbellard 15446ddf551Sbellard static inline void clear_TF(CPUX86State *env) 15546ddf551Sbellard { 15646ddf551Sbellard env->eflags &= ~TF_MASK; 15746ddf551Sbellard } 15846ddf551Sbellard 159226c9132Sbellard static inline void clear_AC(CPUX86State *env) 160226c9132Sbellard { 161226c9132Sbellard env->eflags &= ~AC_MASK; 162226c9132Sbellard } 163226c9132Sbellard 16446ddf551Sbellard static inline int set_vflags_long(unsigned long eflags, CPUX86State *env) 16546ddf551Sbellard { 166*6aa9e42fSRichard Henderson CPUState *cs = env_cpu(env); 1670429a971SAndreas Färber TaskState *ts = cs->opaque; 16846ddf551Sbellard 16946ddf551Sbellard set_flags(ts->v86flags, eflags, ts->v86mask); 17046ddf551Sbellard set_flags(env->eflags, eflags, SAFE_MASK); 17146ddf551Sbellard if (eflags & IF_MASK) 17246ddf551Sbellard return set_IF(env); 173226c9132Sbellard else 174226c9132Sbellard clear_IF(env); 17546ddf551Sbellard return 0; 17646ddf551Sbellard } 17746ddf551Sbellard 17846ddf551Sbellard static inline int set_vflags_short(unsigned short flags, CPUX86State *env) 17946ddf551Sbellard { 180*6aa9e42fSRichard Henderson CPUState *cs = env_cpu(env); 1810429a971SAndreas Färber TaskState *ts = cs->opaque; 18246ddf551Sbellard 18346ddf551Sbellard set_flags(ts->v86flags, flags, ts->v86mask & 0xffff); 18446ddf551Sbellard set_flags(env->eflags, flags, SAFE_MASK); 18546ddf551Sbellard if (flags & IF_MASK) 18646ddf551Sbellard return set_IF(env); 187226c9132Sbellard else 188226c9132Sbellard clear_IF(env); 18946ddf551Sbellard return 0; 19046ddf551Sbellard } 19146ddf551Sbellard 19246ddf551Sbellard static inline unsigned int get_vflags(CPUX86State *env) 19346ddf551Sbellard { 194*6aa9e42fSRichard Henderson CPUState *cs = env_cpu(env); 1950429a971SAndreas Färber TaskState *ts = cs->opaque; 19646ddf551Sbellard unsigned int flags; 19746ddf551Sbellard 19846ddf551Sbellard flags = env->eflags & RETURN_MASK; 19946ddf551Sbellard if (ts->v86flags & VIF_MASK) 20046ddf551Sbellard flags |= IF_MASK; 201c05bab77Sbellard flags |= IOPL_MASK; 20246ddf551Sbellard return flags | (ts->v86flags & ts->v86mask); 20346ddf551Sbellard } 20446ddf551Sbellard 20546ddf551Sbellard #define ADD16(reg, val) reg = (reg & ~0xffff) | ((reg + (val)) & 0xffff) 20646ddf551Sbellard 20746ddf551Sbellard /* handle VM86 interrupt (NOTE: the CPU core currently does not 20846ddf551Sbellard support TSS interrupt revectoring, so this code is always executed) */ 209447db213Sbellard static void do_int(CPUX86State *env, int intno) 21046ddf551Sbellard { 211*6aa9e42fSRichard Henderson CPUState *cs = env_cpu(env); 2120429a971SAndreas Färber TaskState *ts = cs->opaque; 2131455bf48Sbellard uint32_t int_addr, segoffs, ssp; 21446ddf551Sbellard unsigned int sp; 21546ddf551Sbellard 216c05bab77Sbellard if (env->segs[R_CS].selector == TARGET_BIOSSEG) 21746ddf551Sbellard goto cannot_handle; 218b333af06Sbellard if (is_revectored(intno, &ts->vm86plus.int_revectored)) 21946ddf551Sbellard goto cannot_handle; 22046ddf551Sbellard if (intno == 0x21 && is_revectored((env->regs[R_EAX] >> 8) & 0xff, 221b333af06Sbellard &ts->vm86plus.int21_revectored)) 22246ddf551Sbellard goto cannot_handle; 2231455bf48Sbellard int_addr = (intno << 2); 2245899d6d0SPeter Maydell segoffs = cpu_ldl_data(env, int_addr); 22546ddf551Sbellard if ((segoffs >> 16) == TARGET_BIOSSEG) 22646ddf551Sbellard goto cannot_handle; 227d12d51d5Saliguori LOG_VM86("VM86: emulating int 0x%x. CS:IP=%04x:%04x\n", 22846ddf551Sbellard intno, segoffs >> 16, segoffs & 0xffff); 22946ddf551Sbellard /* save old state */ 2301455bf48Sbellard ssp = env->segs[R_SS].selector << 4; 23146ddf551Sbellard sp = env->regs[R_ESP] & 0xffff; 2325899d6d0SPeter Maydell vm_putw(env, ssp, sp - 2, get_vflags(env)); 2335899d6d0SPeter Maydell vm_putw(env, ssp, sp - 4, env->segs[R_CS].selector); 2345899d6d0SPeter Maydell vm_putw(env, ssp, sp - 6, env->eip); 23546ddf551Sbellard ADD16(env->regs[R_ESP], -6); 23646ddf551Sbellard /* goto interrupt handler */ 23746ddf551Sbellard env->eip = segoffs & 0xffff; 23846ddf551Sbellard cpu_x86_load_seg(env, R_CS, segoffs >> 16); 23946ddf551Sbellard clear_TF(env); 24046ddf551Sbellard clear_IF(env); 241226c9132Sbellard clear_AC(env); 24246ddf551Sbellard return; 24346ddf551Sbellard cannot_handle: 244d12d51d5Saliguori LOG_VM86("VM86: return to 32 bits int 0x%x\n", intno); 24546ddf551Sbellard return_to_32bit(env, TARGET_VM86_INTx | (intno << 8)); 24646ddf551Sbellard } 24746ddf551Sbellard 248447db213Sbellard void handle_vm86_trap(CPUX86State *env, int trapno) 249447db213Sbellard { 250447db213Sbellard if (trapno == 1 || trapno == 3) { 251447db213Sbellard return_to_32bit(env, TARGET_VM86_TRAP + (trapno << 8)); 252447db213Sbellard } else { 253447db213Sbellard do_int(env, trapno); 254447db213Sbellard } 255447db213Sbellard } 256447db213Sbellard 257b333af06Sbellard #define CHECK_IF_IN_TRAP() \ 258b333af06Sbellard if ((ts->vm86plus.vm86plus.flags & TARGET_vm86dbg_active) && \ 259b333af06Sbellard (ts->vm86plus.vm86plus.flags & TARGET_vm86dbg_TFpendig)) \ 260b333af06Sbellard newflags |= TF_MASK 26146ddf551Sbellard 26246ddf551Sbellard #define VM86_FAULT_RETURN \ 263b333af06Sbellard if ((ts->vm86plus.vm86plus.flags & TARGET_force_return_for_pic) && \ 26446ddf551Sbellard (ts->v86flags & (IF_MASK | VIF_MASK))) \ 26546ddf551Sbellard return_to_32bit(env, TARGET_VM86_PICRETURN); \ 26646ddf551Sbellard return 26746ddf551Sbellard 26846ddf551Sbellard void handle_vm86_fault(CPUX86State *env) 26946ddf551Sbellard { 270*6aa9e42fSRichard Henderson CPUState *cs = env_cpu(env); 2710429a971SAndreas Färber TaskState *ts = cs->opaque; 2721455bf48Sbellard uint32_t csp, ssp; 273b333af06Sbellard unsigned int ip, sp, newflags, newip, newcs, opcode, intno; 274b333af06Sbellard int data32, pref_done; 27546ddf551Sbellard 2761455bf48Sbellard csp = env->segs[R_CS].selector << 4; 27746ddf551Sbellard ip = env->eip & 0xffff; 27846ddf551Sbellard 2791455bf48Sbellard ssp = env->segs[R_SS].selector << 4; 28046ddf551Sbellard sp = env->regs[R_ESP] & 0xffff; 28146ddf551Sbellard 282d12d51d5Saliguori LOG_VM86("VM86 exception %04x:%08x\n", 2831455bf48Sbellard env->segs[R_CS].selector, env->eip); 28446ddf551Sbellard 285b333af06Sbellard data32 = 0; 286b333af06Sbellard pref_done = 0; 287b333af06Sbellard do { 2885899d6d0SPeter Maydell opcode = vm_getb(env, csp, ip); 289b333af06Sbellard ADD16(ip, 1); 290b333af06Sbellard switch (opcode) { 291b333af06Sbellard case 0x66: /* 32-bit data */ data32=1; break; 292b333af06Sbellard case 0x67: /* 32-bit address */ break; 293b333af06Sbellard case 0x2e: /* CS */ break; 294b333af06Sbellard case 0x3e: /* DS */ break; 295b333af06Sbellard case 0x26: /* ES */ break; 296b333af06Sbellard case 0x36: /* SS */ break; 297b333af06Sbellard case 0x65: /* GS */ break; 298b333af06Sbellard case 0x64: /* FS */ break; 299b333af06Sbellard case 0xf2: /* repnz */ break; 300b333af06Sbellard case 0xf3: /* rep */ break; 301b333af06Sbellard default: pref_done = 1; 30246ddf551Sbellard } 303b333af06Sbellard } while (!pref_done); 304b333af06Sbellard 305b333af06Sbellard /* VM86 mode */ 306b333af06Sbellard switch(opcode) { 30746ddf551Sbellard case 0x9c: /* pushf */ 308b333af06Sbellard if (data32) { 3095899d6d0SPeter Maydell vm_putl(env, ssp, sp - 4, get_vflags(env)); 310b333af06Sbellard ADD16(env->regs[R_ESP], -4); 311b333af06Sbellard } else { 3125899d6d0SPeter Maydell vm_putw(env, ssp, sp - 2, get_vflags(env)); 313b333af06Sbellard ADD16(env->regs[R_ESP], -2); 314b333af06Sbellard } 315b333af06Sbellard env->eip = ip; 31646ddf551Sbellard VM86_FAULT_RETURN; 31746ddf551Sbellard 31846ddf551Sbellard case 0x9d: /* popf */ 319b333af06Sbellard if (data32) { 3205899d6d0SPeter Maydell newflags = vm_getl(env, ssp, sp); 321b333af06Sbellard ADD16(env->regs[R_ESP], 4); 322b333af06Sbellard } else { 3235899d6d0SPeter Maydell newflags = vm_getw(env, ssp, sp); 32446ddf551Sbellard ADD16(env->regs[R_ESP], 2); 325b333af06Sbellard } 326b333af06Sbellard env->eip = ip; 327b333af06Sbellard CHECK_IF_IN_TRAP(); 328b333af06Sbellard if (data32) { 329b333af06Sbellard if (set_vflags_long(newflags, env)) 33046ddf551Sbellard return; 331b333af06Sbellard } else { 332b333af06Sbellard if (set_vflags_short(newflags, env)) 333b333af06Sbellard return; 334b333af06Sbellard } 33546ddf551Sbellard VM86_FAULT_RETURN; 33646ddf551Sbellard 33746ddf551Sbellard case 0xcd: /* int */ 3385899d6d0SPeter Maydell intno = vm_getb(env, csp, ip); 339b333af06Sbellard ADD16(ip, 1); 340b333af06Sbellard env->eip = ip; 341b333af06Sbellard if (ts->vm86plus.vm86plus.flags & TARGET_vm86dbg_active) { 342b333af06Sbellard if ( (ts->vm86plus.vm86plus.vm86dbg_intxxtab[intno >> 3] >> 343b333af06Sbellard (intno &7)) & 1) { 344b333af06Sbellard return_to_32bit(env, TARGET_VM86_INTx + (intno << 8)); 345b333af06Sbellard return; 346b333af06Sbellard } 347b333af06Sbellard } 348b333af06Sbellard do_int(env, intno); 34946ddf551Sbellard break; 35046ddf551Sbellard 35146ddf551Sbellard case 0xcf: /* iret */ 352b333af06Sbellard if (data32) { 3535899d6d0SPeter Maydell newip = vm_getl(env, ssp, sp) & 0xffff; 3545899d6d0SPeter Maydell newcs = vm_getl(env, ssp, sp + 4) & 0xffff; 3555899d6d0SPeter Maydell newflags = vm_getl(env, ssp, sp + 8); 356b333af06Sbellard ADD16(env->regs[R_ESP], 12); 357b333af06Sbellard } else { 3585899d6d0SPeter Maydell newip = vm_getw(env, ssp, sp); 3595899d6d0SPeter Maydell newcs = vm_getw(env, ssp, sp + 2); 3605899d6d0SPeter Maydell newflags = vm_getw(env, ssp, sp + 4); 36146ddf551Sbellard ADD16(env->regs[R_ESP], 6); 362b333af06Sbellard } 363b333af06Sbellard env->eip = newip; 364b333af06Sbellard cpu_x86_load_seg(env, R_CS, newcs); 365b333af06Sbellard CHECK_IF_IN_TRAP(); 366b333af06Sbellard if (data32) { 367b333af06Sbellard if (set_vflags_long(newflags, env)) 36846ddf551Sbellard return; 369b333af06Sbellard } else { 370b333af06Sbellard if (set_vflags_short(newflags, env)) 371b333af06Sbellard return; 372b333af06Sbellard } 37346ddf551Sbellard VM86_FAULT_RETURN; 37446ddf551Sbellard 37546ddf551Sbellard case 0xfa: /* cli */ 376b333af06Sbellard env->eip = ip; 37746ddf551Sbellard clear_IF(env); 37846ddf551Sbellard VM86_FAULT_RETURN; 37946ddf551Sbellard 38046ddf551Sbellard case 0xfb: /* sti */ 381b333af06Sbellard env->eip = ip; 38246ddf551Sbellard if (set_IF(env)) 38346ddf551Sbellard return; 38446ddf551Sbellard VM86_FAULT_RETURN; 38546ddf551Sbellard 38646ddf551Sbellard default: 38746ddf551Sbellard /* real VM86 GPF exception */ 38846ddf551Sbellard return_to_32bit(env, TARGET_VM86_UNKNOWN); 38946ddf551Sbellard break; 39046ddf551Sbellard } 39146ddf551Sbellard } 39246ddf551Sbellard 393992f48a0Sblueswir1 int do_vm86(CPUX86State *env, long subfunction, abi_ulong vm86_addr) 39446ddf551Sbellard { 395*6aa9e42fSRichard Henderson CPUState *cs = env_cpu(env); 3960429a971SAndreas Färber TaskState *ts = cs->opaque; 39753a5960aSpbrook struct target_vm86plus_struct * target_v86; 39846ddf551Sbellard int ret; 39946ddf551Sbellard 40046ddf551Sbellard switch (subfunction) { 40146ddf551Sbellard case TARGET_VM86_REQUEST_IRQ: 40246ddf551Sbellard case TARGET_VM86_FREE_IRQ: 40346ddf551Sbellard case TARGET_VM86_GET_IRQ_BITS: 40446ddf551Sbellard case TARGET_VM86_GET_AND_RESET_IRQ: 40546ddf551Sbellard gemu_log("qemu: unsupported vm86 subfunction (%ld)\n", subfunction); 4066c30b07fSbellard ret = -TARGET_EINVAL; 40746ddf551Sbellard goto out; 40846ddf551Sbellard case TARGET_VM86_PLUS_INSTALL_CHECK: 40946ddf551Sbellard /* NOTE: on old vm86 stuff this will return the error 41046ddf551Sbellard from verify_area(), because the subfunction is 41146ddf551Sbellard interpreted as (invalid) address to vm86_struct. 41246ddf551Sbellard So the installation check works. 41346ddf551Sbellard */ 41446ddf551Sbellard ret = 0; 41546ddf551Sbellard goto out; 41646ddf551Sbellard } 41746ddf551Sbellard 41846ddf551Sbellard /* save current CPU regs */ 41946ddf551Sbellard ts->vm86_saved_regs.eax = 0; /* default vm86 syscall return code */ 42046ddf551Sbellard ts->vm86_saved_regs.ebx = env->regs[R_EBX]; 42146ddf551Sbellard ts->vm86_saved_regs.ecx = env->regs[R_ECX]; 42246ddf551Sbellard ts->vm86_saved_regs.edx = env->regs[R_EDX]; 42346ddf551Sbellard ts->vm86_saved_regs.esi = env->regs[R_ESI]; 42446ddf551Sbellard ts->vm86_saved_regs.edi = env->regs[R_EDI]; 42546ddf551Sbellard ts->vm86_saved_regs.ebp = env->regs[R_EBP]; 42646ddf551Sbellard ts->vm86_saved_regs.esp = env->regs[R_ESP]; 42746ddf551Sbellard ts->vm86_saved_regs.eflags = env->eflags; 42846ddf551Sbellard ts->vm86_saved_regs.eip = env->eip; 429c05bab77Sbellard ts->vm86_saved_regs.cs = env->segs[R_CS].selector; 430c05bab77Sbellard ts->vm86_saved_regs.ss = env->segs[R_SS].selector; 431c05bab77Sbellard ts->vm86_saved_regs.ds = env->segs[R_DS].selector; 432c05bab77Sbellard ts->vm86_saved_regs.es = env->segs[R_ES].selector; 433c05bab77Sbellard ts->vm86_saved_regs.fs = env->segs[R_FS].selector; 434c05bab77Sbellard ts->vm86_saved_regs.gs = env->segs[R_GS].selector; 43546ddf551Sbellard 43653a5960aSpbrook ts->target_v86 = vm86_addr; 437579a97f7Sbellard if (!lock_user_struct(VERIFY_READ, target_v86, vm86_addr, 1)) 4386c30b07fSbellard return -TARGET_EFAULT; 43946ddf551Sbellard /* build vm86 CPU state */ 44046ddf551Sbellard ts->v86flags = tswap32(target_v86->regs.eflags); 44146ddf551Sbellard env->eflags = (env->eflags & ~SAFE_MASK) | 44246ddf551Sbellard (tswap32(target_v86->regs.eflags) & SAFE_MASK) | VM_MASK; 443b333af06Sbellard 444cbb21eedSMatthias Braun ts->vm86plus.cpu_type = tswapal(target_v86->cpu_type); 445b333af06Sbellard switch (ts->vm86plus.cpu_type) { 446b333af06Sbellard case TARGET_CPU_286: 447b333af06Sbellard ts->v86mask = 0; 448b333af06Sbellard break; 449b333af06Sbellard case TARGET_CPU_386: 450b333af06Sbellard ts->v86mask = NT_MASK | IOPL_MASK; 451b333af06Sbellard break; 452b333af06Sbellard case TARGET_CPU_486: 453b333af06Sbellard ts->v86mask = AC_MASK | NT_MASK | IOPL_MASK; 454b333af06Sbellard break; 455b333af06Sbellard default: 45646ddf551Sbellard ts->v86mask = ID_MASK | AC_MASK | NT_MASK | IOPL_MASK; 457b333af06Sbellard break; 458b333af06Sbellard } 45946ddf551Sbellard 46046ddf551Sbellard env->regs[R_EBX] = tswap32(target_v86->regs.ebx); 46146ddf551Sbellard env->regs[R_ECX] = tswap32(target_v86->regs.ecx); 46246ddf551Sbellard env->regs[R_EDX] = tswap32(target_v86->regs.edx); 46346ddf551Sbellard env->regs[R_ESI] = tswap32(target_v86->regs.esi); 46446ddf551Sbellard env->regs[R_EDI] = tswap32(target_v86->regs.edi); 46546ddf551Sbellard env->regs[R_EBP] = tswap32(target_v86->regs.ebp); 46646ddf551Sbellard env->regs[R_ESP] = tswap32(target_v86->regs.esp); 46746ddf551Sbellard env->eip = tswap32(target_v86->regs.eip); 46846ddf551Sbellard cpu_x86_load_seg(env, R_CS, tswap16(target_v86->regs.cs)); 46946ddf551Sbellard cpu_x86_load_seg(env, R_SS, tswap16(target_v86->regs.ss)); 47046ddf551Sbellard cpu_x86_load_seg(env, R_DS, tswap16(target_v86->regs.ds)); 47146ddf551Sbellard cpu_x86_load_seg(env, R_ES, tswap16(target_v86->regs.es)); 47246ddf551Sbellard cpu_x86_load_seg(env, R_FS, tswap16(target_v86->regs.fs)); 47346ddf551Sbellard cpu_x86_load_seg(env, R_GS, tswap16(target_v86->regs.gs)); 47446ddf551Sbellard ret = tswap32(target_v86->regs.eax); /* eax will be restored at 47546ddf551Sbellard the end of the syscall */ 476b333af06Sbellard memcpy(&ts->vm86plus.int_revectored, 477b333af06Sbellard &target_v86->int_revectored, 32); 478b333af06Sbellard memcpy(&ts->vm86plus.int21_revectored, 479b333af06Sbellard &target_v86->int21_revectored, 32); 480cbb21eedSMatthias Braun ts->vm86plus.vm86plus.flags = tswapal(target_v86->vm86plus.flags); 481b333af06Sbellard memcpy(&ts->vm86plus.vm86plus.vm86dbg_intxxtab, 482b333af06Sbellard target_v86->vm86plus.vm86dbg_intxxtab, 32); 48353a5960aSpbrook unlock_user_struct(target_v86, vm86_addr, 0); 484b333af06Sbellard 485d12d51d5Saliguori LOG_VM86("do_vm86: cs:ip=%04x:%04x\n", 486c05bab77Sbellard env->segs[R_CS].selector, env->eip); 48746ddf551Sbellard /* now the virtual CPU is ready for vm86 execution ! */ 48846ddf551Sbellard out: 48946ddf551Sbellard return ret; 49046ddf551Sbellard } 491