xref: /qemu/pc-bios/bamboo.dts (revision c148b2b4)
12c9fade2Saurel32/*
22c9fade2Saurel32 * Device Tree Source for AMCC Bamboo
32c9fade2Saurel32 *
42c9fade2Saurel32 * Copyright (c) 2006, 2007 IBM Corp.
52c9fade2Saurel32 * Josh Boyer <jwboyer@linux.vnet.ibm.com>
62c9fade2Saurel32 *
72c9fade2Saurel32 * This file is licensed under the terms of the GNU General Public
82c9fade2Saurel32 * License version 2.  This program is licensed "as is" without
92c9fade2Saurel32 * any warranty of any kind, whether express or implied.
102c9fade2Saurel32 */
112c9fade2Saurel32
12*c148b2b4SAlexander Graf/dts-v1/;
13*c148b2b4SAlexander Graf
142c9fade2Saurel32/ {
152c9fade2Saurel32	#address-cells = <2>;
162c9fade2Saurel32	#size-cells = <1>;
172c9fade2Saurel32	model = "amcc,bamboo";
182c9fade2Saurel32	compatible = "amcc,bamboo";
19*c148b2b4SAlexander Graf	dcr-parent = <&{/cpus/cpu@0}>;
202c9fade2Saurel32
212c9fade2Saurel32	aliases {
222c9fade2Saurel32		serial0 = &UART0;
232c9fade2Saurel32		serial1 = &UART1;
242c9fade2Saurel32	};
252c9fade2Saurel32
262c9fade2Saurel32	cpus {
272c9fade2Saurel32		#address-cells = <1>;
282c9fade2Saurel32		#size-cells = <0>;
292c9fade2Saurel32
302c9fade2Saurel32		cpu@0 {
312c9fade2Saurel32			device_type = "cpu";
322c9fade2Saurel32			model = "PowerPC,440EP";
332c9fade2Saurel32			reg = <0>;
34*c148b2b4SAlexander Graf			clock-frequency = <0x1fca0550>;
35*c148b2b4SAlexander Graf			timebase-frequency = <0x017d7840>;
36*c148b2b4SAlexander Graf			i-cache-line-size = <0x20>;
37*c148b2b4SAlexander Graf			d-cache-line-size = <0x20>;
38*c148b2b4SAlexander Graf			i-cache-size = <0x8000>;
39*c148b2b4SAlexander Graf			d-cache-size = <0x8000>;
402c9fade2Saurel32			dcr-controller;
412c9fade2Saurel32			dcr-access-method = "native";
422c9fade2Saurel32		};
432c9fade2Saurel32	};
442c9fade2Saurel32
452c9fade2Saurel32	memory {
462c9fade2Saurel32		device_type = "memory";
47*c148b2b4SAlexander Graf		reg = <0x0 0x0 0x9000000>;
482c9fade2Saurel32	};
492c9fade2Saurel32
502c9fade2Saurel32	UIC0: interrupt-controller0 {
512c9fade2Saurel32		compatible = "ibm,uic-440ep","ibm,uic";
522c9fade2Saurel32		interrupt-controller;
53*c148b2b4SAlexander Graf		cell-index = <0x0>;
54*c148b2b4SAlexander Graf		dcr-reg = <0x0c0 0x009>;
55*c148b2b4SAlexander Graf		#address-cells = <0x0>;
56*c148b2b4SAlexander Graf		#size-cells = <0x0>;
57*c148b2b4SAlexander Graf		#interrupt-cells = <0x2>;
582c9fade2Saurel32	};
592c9fade2Saurel32
602c9fade2Saurel32	SDR0: sdr {
612c9fade2Saurel32		compatible = "ibm,sdr-440ep";
62*c148b2b4SAlexander Graf		dcr-reg = <0x00e 0x002>;
632c9fade2Saurel32	};
642c9fade2Saurel32
652c9fade2Saurel32	CPR0: cpr {
662c9fade2Saurel32		compatible = "ibm,cpr-440ep";
67*c148b2b4SAlexander Graf		dcr-reg = <0x00c 0x002>;
682c9fade2Saurel32	};
692c9fade2Saurel32
702c9fade2Saurel32	plb {
712c9fade2Saurel32		compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4";
722c9fade2Saurel32		#address-cells = <2>;
732c9fade2Saurel32		#size-cells = <1>;
742c9fade2Saurel32		ranges;
75*c148b2b4SAlexander Graf		clock-frequency = <0x07f28154>;
762c9fade2Saurel32
772c9fade2Saurel32		SDRAM0: sdram {
782c9fade2Saurel32			compatible = "ibm,sdram-440ep", "ibm,sdram-405gp";
79*c148b2b4SAlexander Graf			dcr-reg = <0x010 0x2>;
802c9fade2Saurel32		};
812c9fade2Saurel32
822c9fade2Saurel32		DMA0: dma {
832c9fade2Saurel32			compatible = "ibm,dma-440ep", "ibm,dma-440gp";
84*c148b2b4SAlexander Graf			dcr-reg = <0x100 0x027>;
852c9fade2Saurel32		};
862c9fade2Saurel32
872c9fade2Saurel32		POB0: opb {
882c9fade2Saurel32			compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb";
892c9fade2Saurel32			#address-cells = <1>;
902c9fade2Saurel32			#size-cells = <1>;
912c9fade2Saurel32			/* Bamboo is oddball in the 44x world and doesn't use the ERPN
922c9fade2Saurel32			 * bits.
932c9fade2Saurel32			 */
94*c148b2b4SAlexander Graf			ranges = <0x00000000 0x0 0x00000000 0x80000000
95*c148b2b4SAlexander Graf			          0x80000000 0x0 0x80000000 0x80000000>;
962c9fade2Saurel32			/* interrupt-parent = <&UIC1>; */
972c9fade2Saurel32			interrupts = <7 4>;
98*c148b2b4SAlexander Graf			clock-frequency = <0x03f940aa>;
992c9fade2Saurel32
1002c9fade2Saurel32			EBC0: ebc {
1012c9fade2Saurel32				compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc";
102*c148b2b4SAlexander Graf				dcr-reg = <0x012 2>;
1032c9fade2Saurel32				#address-cells = <2>;
1042c9fade2Saurel32				#size-cells = <1>;
105*c148b2b4SAlexander Graf				clock-frequency = <0x03f940aa>;
1062c9fade2Saurel32				interrupts = <5 1>;
1072c9fade2Saurel32			/* interrupt-parent = <&UIC1>; */
1082c9fade2Saurel32			};
1092c9fade2Saurel32
1102c9fade2Saurel32			UART0: serial@ef600300 {
1112c9fade2Saurel32				device_type = "serial";
1122c9fade2Saurel32				compatible = "ns16550";
113*c148b2b4SAlexander Graf				reg = <0xef600300 8>;
114*c148b2b4SAlexander Graf				virtual-reg = <0xef600300>;
115*c148b2b4SAlexander Graf				clock-frequency = <0x00a8c000>;
116*c148b2b4SAlexander Graf				current-speed = <0x1c200>;
1172c9fade2Saurel32				interrupt-parent = <&UIC0>;
1182c9fade2Saurel32				interrupts = <0 4>;
1192c9fade2Saurel32			};
1202c9fade2Saurel32
1212c9fade2Saurel32			UART1: serial@ef600400 {
1222c9fade2Saurel32				device_type = "serial";
1232c9fade2Saurel32				compatible = "ns16550";
124*c148b2b4SAlexander Graf				reg = <0xef600400 8>;
125*c148b2b4SAlexander Graf				virtual-reg = <0xef600400>;
126*c148b2b4SAlexander Graf				clock-frequency = <0x00a8c000>;
1272c9fade2Saurel32				current-speed = <0>;
1282c9fade2Saurel32				interrupt-parent = <&UIC0>;
1292c9fade2Saurel32				interrupts = <1 4>;
1302c9fade2Saurel32			};
1312c9fade2Saurel32
1322c9fade2Saurel32			IIC0: i2c@ef600700 {
1332c9fade2Saurel32				device_type = "i2c";
1342c9fade2Saurel32				compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
135*c148b2b4SAlexander Graf				reg = <0xef600700 0x14>;
1362c9fade2Saurel32				interrupt-parent = <&UIC0>;
1372c9fade2Saurel32				interrupts = <2 4>;
1382c9fade2Saurel32			};
1392c9fade2Saurel32
1402c9fade2Saurel32			IIC1: i2c@ef600800 {
1412c9fade2Saurel32				device_type = "i2c";
1422c9fade2Saurel32				compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
143*c148b2b4SAlexander Graf				reg = <0xef600800 14>;
1442c9fade2Saurel32				interrupt-parent = <&UIC0>;
1452c9fade2Saurel32				interrupts = <7 4>;
1462c9fade2Saurel32			};
1472c9fade2Saurel32
1482c9fade2Saurel32			ZMII0: emac-zmii@ef600d00 {
1492c9fade2Saurel32				device_type = "zmii-interface";
1502c9fade2Saurel32				compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii";
151*c148b2b4SAlexander Graf				reg = <0xef600d00 0xc>;
1522c9fade2Saurel32			};
1532c9fade2Saurel32
1542c9fade2Saurel32		};
1552c9fade2Saurel32
1562c9fade2Saurel32		PCI0: pci@ec000000 {
1572c9fade2Saurel32			device_type = "pci";
1582c9fade2Saurel32			#interrupt-cells = <1>;
1592c9fade2Saurel32			#size-cells = <2>;
1602c9fade2Saurel32			#address-cells = <3>;
1612c9fade2Saurel32			compatible = "ibm,plb440ep-pci", "ibm,plb-pci";
1622c9fade2Saurel32			primary;
163*c148b2b4SAlexander Graf			reg = <0 0xeec00000 8     /* Config space access */
164*c148b2b4SAlexander Graf			       0 0xeed00000 4     /* IACK */
165*c148b2b4SAlexander Graf			       0 0xeed00000 4     /* Special cycle */
166*c148b2b4SAlexander Graf			       0 0xef400000 0x40>;  /* Internal registers */
1672c9fade2Saurel32
1682c9fade2Saurel32			/* Outbound ranges, one memory and one IO,
1692c9fade2Saurel32			 * later cannot be changed. Chip supports a second
1702c9fade2Saurel32			 * IO range but we don't use it for now
1712c9fade2Saurel32			 */
172*c148b2b4SAlexander Graf			ranges = <0x02000000 0 0xa0000000 0 0xa0000000 0 0x20000000
173*c148b2b4SAlexander Graf				  0x01000000 0 0x00000000 0 0xe8000000 0 0x00010000>;
1742c9fade2Saurel32
1752c9fade2Saurel32			/* Inbound 2GB range starting at 0 */
176*c148b2b4SAlexander Graf			dma-ranges = <0x42000000 0 0 0 0 0 0x80000000>;
1772c9fade2Saurel32
1782c9fade2Saurel32			/* Bamboo has all 4 IRQ pins tied together per slot */
179*c148b2b4SAlexander Graf			interrupt-map-mask = <0xf800 0 0 0>;
1802c9fade2Saurel32			interrupt-map = <
1812c9fade2Saurel32				/* IDSEL 1 */
182*c148b2b4SAlexander Graf				0x0800 0 0 0 &UIC0 0x1c 8
1832c9fade2Saurel32
1842c9fade2Saurel32				/* IDSEL 2 */
185*c148b2b4SAlexander Graf				0x1000 0 0 0 &UIC0 0x1b 8
1862c9fade2Saurel32
1872c9fade2Saurel32				/* IDSEL 3 */
188*c148b2b4SAlexander Graf				0x1800 0 0 0 &UIC0 0x1a 8
1892c9fade2Saurel32
1902c9fade2Saurel32				/* IDSEL 4 */
191*c148b2b4SAlexander Graf				0x2000 0 0 0 &UIC0 0x19 8
1922c9fade2Saurel32			>;
1932c9fade2Saurel32		};
1942c9fade2Saurel32
1952c9fade2Saurel32	};
1962c9fade2Saurel32
1972c9fade2Saurel32	chosen {
1982c9fade2Saurel32		linux,stdout-path = "/plb/opb/serial@ef600300";
1992c9fade2Saurel32	};
2002c9fade2Saurel32};
201