1fcf5ef2aSThomas Huth /* 2fcf5ef2aSThomas Huth * ARM implementation of KVM hooks 3fcf5ef2aSThomas Huth * 4fcf5ef2aSThomas Huth * Copyright Christoffer Dall 2009-2010 5fcf5ef2aSThomas Huth * 6fcf5ef2aSThomas Huth * This work is licensed under the terms of the GNU GPL, version 2 or later. 7fcf5ef2aSThomas Huth * See the COPYING file in the top-level directory. 8fcf5ef2aSThomas Huth * 9fcf5ef2aSThomas Huth */ 10fcf5ef2aSThomas Huth 11fcf5ef2aSThomas Huth #include "qemu/osdep.h" 12fcf5ef2aSThomas Huth #include <sys/ioctl.h> 13fcf5ef2aSThomas Huth 14fcf5ef2aSThomas Huth #include <linux/kvm.h> 15fcf5ef2aSThomas Huth 16fcf5ef2aSThomas Huth #include "qemu-common.h" 17fcf5ef2aSThomas Huth #include "qemu/timer.h" 18fcf5ef2aSThomas Huth #include "qemu/error-report.h" 19db725815SMarkus Armbruster #include "qemu/main-loop.h" 20dea101a1SAndrew Jones #include "qom/object.h" 21dea101a1SAndrew Jones #include "qapi/error.h" 22fcf5ef2aSThomas Huth #include "sysemu/sysemu.h" 23fcf5ef2aSThomas Huth #include "sysemu/kvm.h" 24a27382e2SEric Auger #include "sysemu/kvm_int.h" 25fcf5ef2aSThomas Huth #include "kvm_arm.h" 26fcf5ef2aSThomas Huth #include "cpu.h" 27b05c81d2SEric Auger #include "trace.h" 28fcf5ef2aSThomas Huth #include "internals.h" 29b05c81d2SEric Auger #include "hw/pci/pci.h" 30fcf5ef2aSThomas Huth #include "exec/memattrs.h" 31fcf5ef2aSThomas Huth #include "exec/address-spaces.h" 32fcf5ef2aSThomas Huth #include "hw/boards.h" 3364552b6bSMarkus Armbruster #include "hw/irq.h" 34fcf5ef2aSThomas Huth #include "qemu/log.h" 35fcf5ef2aSThomas Huth 36fcf5ef2aSThomas Huth const KVMCapabilityInfo kvm_arch_required_capabilities[] = { 37fcf5ef2aSThomas Huth KVM_CAP_LAST_INFO 38fcf5ef2aSThomas Huth }; 39fcf5ef2aSThomas Huth 40fcf5ef2aSThomas Huth static bool cap_has_mp_state; 41202ccb6bSDongjiu Geng static bool cap_has_inject_serror_esr; 42694bcaa8SBeata Michalska static bool cap_has_inject_ext_dabt; 43fcf5ef2aSThomas Huth 44c4487d76SPeter Maydell static ARMHostCPUFeatures arm_host_cpu_features; 45c4487d76SPeter Maydell 46fcf5ef2aSThomas Huth int kvm_arm_vcpu_init(CPUState *cs) 47fcf5ef2aSThomas Huth { 48fcf5ef2aSThomas Huth ARMCPU *cpu = ARM_CPU(cs); 49fcf5ef2aSThomas Huth struct kvm_vcpu_init init; 50fcf5ef2aSThomas Huth 51fcf5ef2aSThomas Huth init.target = cpu->kvm_target; 52fcf5ef2aSThomas Huth memcpy(init.features, cpu->kvm_init_features, sizeof(init.features)); 53fcf5ef2aSThomas Huth 54fcf5ef2aSThomas Huth return kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_INIT, &init); 55fcf5ef2aSThomas Huth } 56fcf5ef2aSThomas Huth 5714e99e0fSAndrew Jones int kvm_arm_vcpu_finalize(CPUState *cs, int feature) 5814e99e0fSAndrew Jones { 5914e99e0fSAndrew Jones return kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_FINALIZE, &feature); 6014e99e0fSAndrew Jones } 6114e99e0fSAndrew Jones 62202ccb6bSDongjiu Geng void kvm_arm_init_serror_injection(CPUState *cs) 63202ccb6bSDongjiu Geng { 64202ccb6bSDongjiu Geng cap_has_inject_serror_esr = kvm_check_extension(cs->kvm_state, 65202ccb6bSDongjiu Geng KVM_CAP_ARM_INJECT_SERROR_ESR); 66202ccb6bSDongjiu Geng } 67202ccb6bSDongjiu Geng 68fcf5ef2aSThomas Huth bool kvm_arm_create_scratch_host_vcpu(const uint32_t *cpus_to_try, 69fcf5ef2aSThomas Huth int *fdarray, 70fcf5ef2aSThomas Huth struct kvm_vcpu_init *init) 71fcf5ef2aSThomas Huth { 720cdb4020SAndrew Jones int ret = 0, kvmfd = -1, vmfd = -1, cpufd = -1; 73d26f2f93SMarc Zyngier int max_vm_pa_size; 74fcf5ef2aSThomas Huth 75448058aaSDaniel P. Berrangé kvmfd = qemu_open_old("/dev/kvm", O_RDWR); 76fcf5ef2aSThomas Huth if (kvmfd < 0) { 77fcf5ef2aSThomas Huth goto err; 78fcf5ef2aSThomas Huth } 79d26f2f93SMarc Zyngier max_vm_pa_size = ioctl(kvmfd, KVM_CHECK_EXTENSION, KVM_CAP_ARM_VM_IPA_SIZE); 80d26f2f93SMarc Zyngier if (max_vm_pa_size < 0) { 81d26f2f93SMarc Zyngier max_vm_pa_size = 0; 82d26f2f93SMarc Zyngier } 83d26f2f93SMarc Zyngier vmfd = ioctl(kvmfd, KVM_CREATE_VM, max_vm_pa_size); 84fcf5ef2aSThomas Huth if (vmfd < 0) { 85fcf5ef2aSThomas Huth goto err; 86fcf5ef2aSThomas Huth } 87fcf5ef2aSThomas Huth cpufd = ioctl(vmfd, KVM_CREATE_VCPU, 0); 88fcf5ef2aSThomas Huth if (cpufd < 0) { 89fcf5ef2aSThomas Huth goto err; 90fcf5ef2aSThomas Huth } 91fcf5ef2aSThomas Huth 92fcf5ef2aSThomas Huth if (!init) { 93fcf5ef2aSThomas Huth /* Caller doesn't want the VCPU to be initialized, so skip it */ 94fcf5ef2aSThomas Huth goto finish; 95fcf5ef2aSThomas Huth } 96fcf5ef2aSThomas Huth 970cdb4020SAndrew Jones if (init->target == -1) { 980cdb4020SAndrew Jones struct kvm_vcpu_init preferred; 990cdb4020SAndrew Jones 1000cdb4020SAndrew Jones ret = ioctl(vmfd, KVM_ARM_PREFERRED_TARGET, &preferred); 1010cdb4020SAndrew Jones if (!ret) { 1020cdb4020SAndrew Jones init->target = preferred.target; 1030cdb4020SAndrew Jones } 1040cdb4020SAndrew Jones } 105fcf5ef2aSThomas Huth if (ret >= 0) { 106fcf5ef2aSThomas Huth ret = ioctl(cpufd, KVM_ARM_VCPU_INIT, init); 107fcf5ef2aSThomas Huth if (ret < 0) { 108fcf5ef2aSThomas Huth goto err; 109fcf5ef2aSThomas Huth } 110fcf5ef2aSThomas Huth } else if (cpus_to_try) { 111fcf5ef2aSThomas Huth /* Old kernel which doesn't know about the 112fcf5ef2aSThomas Huth * PREFERRED_TARGET ioctl: we know it will only support 113fcf5ef2aSThomas Huth * creating one kind of guest CPU which is its preferred 114fcf5ef2aSThomas Huth * CPU type. 115fcf5ef2aSThomas Huth */ 1160cdb4020SAndrew Jones struct kvm_vcpu_init try; 1170cdb4020SAndrew Jones 118fcf5ef2aSThomas Huth while (*cpus_to_try != QEMU_KVM_ARM_TARGET_NONE) { 1190cdb4020SAndrew Jones try.target = *cpus_to_try++; 1200cdb4020SAndrew Jones memcpy(try.features, init->features, sizeof(init->features)); 1210cdb4020SAndrew Jones ret = ioctl(cpufd, KVM_ARM_VCPU_INIT, &try); 122fcf5ef2aSThomas Huth if (ret >= 0) { 123fcf5ef2aSThomas Huth break; 124fcf5ef2aSThomas Huth } 125fcf5ef2aSThomas Huth } 126fcf5ef2aSThomas Huth if (ret < 0) { 127fcf5ef2aSThomas Huth goto err; 128fcf5ef2aSThomas Huth } 1290cdb4020SAndrew Jones init->target = try.target; 130fcf5ef2aSThomas Huth } else { 131fcf5ef2aSThomas Huth /* Treat a NULL cpus_to_try argument the same as an empty 132fcf5ef2aSThomas Huth * list, which means we will fail the call since this must 133fcf5ef2aSThomas Huth * be an old kernel which doesn't support PREFERRED_TARGET. 134fcf5ef2aSThomas Huth */ 135fcf5ef2aSThomas Huth goto err; 136fcf5ef2aSThomas Huth } 137fcf5ef2aSThomas Huth 138fcf5ef2aSThomas Huth finish: 139fcf5ef2aSThomas Huth fdarray[0] = kvmfd; 140fcf5ef2aSThomas Huth fdarray[1] = vmfd; 141fcf5ef2aSThomas Huth fdarray[2] = cpufd; 142fcf5ef2aSThomas Huth 143fcf5ef2aSThomas Huth return true; 144fcf5ef2aSThomas Huth 145fcf5ef2aSThomas Huth err: 146fcf5ef2aSThomas Huth if (cpufd >= 0) { 147fcf5ef2aSThomas Huth close(cpufd); 148fcf5ef2aSThomas Huth } 149fcf5ef2aSThomas Huth if (vmfd >= 0) { 150fcf5ef2aSThomas Huth close(vmfd); 151fcf5ef2aSThomas Huth } 152fcf5ef2aSThomas Huth if (kvmfd >= 0) { 153fcf5ef2aSThomas Huth close(kvmfd); 154fcf5ef2aSThomas Huth } 155fcf5ef2aSThomas Huth 156fcf5ef2aSThomas Huth return false; 157fcf5ef2aSThomas Huth } 158fcf5ef2aSThomas Huth 159fcf5ef2aSThomas Huth void kvm_arm_destroy_scratch_host_vcpu(int *fdarray) 160fcf5ef2aSThomas Huth { 161fcf5ef2aSThomas Huth int i; 162fcf5ef2aSThomas Huth 163fcf5ef2aSThomas Huth for (i = 2; i >= 0; i--) { 164fcf5ef2aSThomas Huth close(fdarray[i]); 165fcf5ef2aSThomas Huth } 166fcf5ef2aSThomas Huth } 167fcf5ef2aSThomas Huth 168c4487d76SPeter Maydell void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu) 169fcf5ef2aSThomas Huth { 170c4487d76SPeter Maydell CPUARMState *env = &cpu->env; 171fcf5ef2aSThomas Huth 172c4487d76SPeter Maydell if (!arm_host_cpu_features.dtb_compatible) { 173c4487d76SPeter Maydell if (!kvm_enabled() || 174c4487d76SPeter Maydell !kvm_arm_get_host_cpu_features(&arm_host_cpu_features)) { 175c4487d76SPeter Maydell /* We can't report this error yet, so flag that we need to 176c4487d76SPeter Maydell * in arm_cpu_realizefn(). 177fcf5ef2aSThomas Huth */ 178c4487d76SPeter Maydell cpu->kvm_target = QEMU_KVM_ARM_TARGET_NONE; 179c4487d76SPeter Maydell cpu->host_cpu_probe_failed = true; 180c4487d76SPeter Maydell return; 181fcf5ef2aSThomas Huth } 182fcf5ef2aSThomas Huth } 183fcf5ef2aSThomas Huth 184c4487d76SPeter Maydell cpu->kvm_target = arm_host_cpu_features.target; 185c4487d76SPeter Maydell cpu->dtb_compatible = arm_host_cpu_features.dtb_compatible; 1864674097cSRichard Henderson cpu->isar = arm_host_cpu_features.isar; 187c4487d76SPeter Maydell env->features = arm_host_cpu_features.features; 188c4487d76SPeter Maydell } 189c4487d76SPeter Maydell 190dea101a1SAndrew Jones static bool kvm_no_adjvtime_get(Object *obj, Error **errp) 191dea101a1SAndrew Jones { 192dea101a1SAndrew Jones return !ARM_CPU(obj)->kvm_adjvtime; 193dea101a1SAndrew Jones } 194dea101a1SAndrew Jones 195dea101a1SAndrew Jones static void kvm_no_adjvtime_set(Object *obj, bool value, Error **errp) 196dea101a1SAndrew Jones { 197dea101a1SAndrew Jones ARM_CPU(obj)->kvm_adjvtime = !value; 198dea101a1SAndrew Jones } 199dea101a1SAndrew Jones 20068970d1eSAndrew Jones static bool kvm_steal_time_get(Object *obj, Error **errp) 20168970d1eSAndrew Jones { 20268970d1eSAndrew Jones return ARM_CPU(obj)->kvm_steal_time != ON_OFF_AUTO_OFF; 20368970d1eSAndrew Jones } 20468970d1eSAndrew Jones 20568970d1eSAndrew Jones static void kvm_steal_time_set(Object *obj, bool value, Error **errp) 20668970d1eSAndrew Jones { 20768970d1eSAndrew Jones ARM_CPU(obj)->kvm_steal_time = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; 20868970d1eSAndrew Jones } 20968970d1eSAndrew Jones 210dea101a1SAndrew Jones /* KVM VCPU properties should be prefixed with "kvm-". */ 211dea101a1SAndrew Jones void kvm_arm_add_vcpu_properties(Object *obj) 212dea101a1SAndrew Jones { 2139e6f8d8aSfangying ARMCPU *cpu = ARM_CPU(obj); 2149e6f8d8aSfangying CPUARMState *env = &cpu->env; 215dea101a1SAndrew Jones 2169e6f8d8aSfangying if (arm_feature(env, ARM_FEATURE_GENERIC_TIMER)) { 2179e6f8d8aSfangying cpu->kvm_adjvtime = true; 218dea101a1SAndrew Jones object_property_add_bool(obj, "kvm-no-adjvtime", kvm_no_adjvtime_get, 219d2623129SMarkus Armbruster kvm_no_adjvtime_set); 220dea101a1SAndrew Jones object_property_set_description(obj, "kvm-no-adjvtime", 221dea101a1SAndrew Jones "Set on to disable the adjustment of " 222dea101a1SAndrew Jones "the virtual counter. VM stopped time " 2237eecec7dSMarkus Armbruster "will be counted."); 224dea101a1SAndrew Jones } 22568970d1eSAndrew Jones 22668970d1eSAndrew Jones cpu->kvm_steal_time = ON_OFF_AUTO_AUTO; 22768970d1eSAndrew Jones object_property_add_bool(obj, "kvm-steal-time", kvm_steal_time_get, 22868970d1eSAndrew Jones kvm_steal_time_set); 22968970d1eSAndrew Jones object_property_set_description(obj, "kvm-steal-time", 23068970d1eSAndrew Jones "Set off to disable KVM steal time."); 2319e6f8d8aSfangying } 232dea101a1SAndrew Jones 2337d20e681SPhilippe Mathieu-Daudé bool kvm_arm_pmu_supported(void) 234ae502508SAndrew Jones { 2357d20e681SPhilippe Mathieu-Daudé return kvm_check_extension(kvm_state, KVM_CAP_ARM_PMU_V3); 236ae502508SAndrew Jones } 237ae502508SAndrew Jones 238bcb902a1SAndrew Jones int kvm_arm_get_max_vm_ipa_size(MachineState *ms, bool *fixed_ipa) 239a27382e2SEric Auger { 240a27382e2SEric Auger KVMState *s = KVM_STATE(ms->accelerator); 241a27382e2SEric Auger int ret; 242a27382e2SEric Auger 243a27382e2SEric Auger ret = kvm_check_extension(s, KVM_CAP_ARM_VM_IPA_SIZE); 244bcb902a1SAndrew Jones *fixed_ipa = ret <= 0; 245bcb902a1SAndrew Jones 246a27382e2SEric Auger return ret > 0 ? ret : 40; 247a27382e2SEric Auger } 248a27382e2SEric Auger 249fcf5ef2aSThomas Huth int kvm_arch_init(MachineState *ms, KVMState *s) 250fcf5ef2aSThomas Huth { 251fff9f555SEric Auger int ret = 0; 252fcf5ef2aSThomas Huth /* For ARM interrupt delivery is always asynchronous, 253fcf5ef2aSThomas Huth * whether we are using an in-kernel VGIC or not. 254fcf5ef2aSThomas Huth */ 255fcf5ef2aSThomas Huth kvm_async_interrupts_allowed = true; 256fcf5ef2aSThomas Huth 2575d721b78SAlexander Graf /* 2585d721b78SAlexander Graf * PSCI wakes up secondary cores, so we always need to 2595d721b78SAlexander Graf * have vCPUs waiting in kernel space 2605d721b78SAlexander Graf */ 2615d721b78SAlexander Graf kvm_halt_in_kernel_allowed = true; 2625d721b78SAlexander Graf 263fcf5ef2aSThomas Huth cap_has_mp_state = kvm_check_extension(s, KVM_CAP_MP_STATE); 264fcf5ef2aSThomas Huth 265fff9f555SEric Auger if (ms->smp.cpus > 256 && 266fff9f555SEric Auger !kvm_check_extension(s, KVM_CAP_ARM_IRQ_LINE_LAYOUT_2)) { 267fff9f555SEric Auger error_report("Using more than 256 vcpus requires a host kernel " 268fff9f555SEric Auger "with KVM_CAP_ARM_IRQ_LINE_LAYOUT_2"); 269fff9f555SEric Auger ret = -EINVAL; 270fff9f555SEric Auger } 271fff9f555SEric Auger 272694bcaa8SBeata Michalska if (kvm_check_extension(s, KVM_CAP_ARM_NISV_TO_USER)) { 273694bcaa8SBeata Michalska if (kvm_vm_enable_cap(s, KVM_CAP_ARM_NISV_TO_USER, 0)) { 274694bcaa8SBeata Michalska error_report("Failed to enable KVM_CAP_ARM_NISV_TO_USER cap"); 275694bcaa8SBeata Michalska } else { 276694bcaa8SBeata Michalska /* Set status for supporting the external dabt injection */ 277694bcaa8SBeata Michalska cap_has_inject_ext_dabt = kvm_check_extension(s, 278694bcaa8SBeata Michalska KVM_CAP_ARM_INJECT_EXT_DABT); 279694bcaa8SBeata Michalska } 280694bcaa8SBeata Michalska } 281694bcaa8SBeata Michalska 282fff9f555SEric Auger return ret; 283fcf5ef2aSThomas Huth } 284fcf5ef2aSThomas Huth 285fcf5ef2aSThomas Huth unsigned long kvm_arch_vcpu_id(CPUState *cpu) 286fcf5ef2aSThomas Huth { 287fcf5ef2aSThomas Huth return cpu->cpu_index; 288fcf5ef2aSThomas Huth } 289fcf5ef2aSThomas Huth 290fcf5ef2aSThomas Huth /* We track all the KVM devices which need their memory addresses 291fcf5ef2aSThomas Huth * passing to the kernel in a list of these structures. 292fcf5ef2aSThomas Huth * When board init is complete we run through the list and 293fcf5ef2aSThomas Huth * tell the kernel the base addresses of the memory regions. 294fcf5ef2aSThomas Huth * We use a MemoryListener to track mapping and unmapping of 295fcf5ef2aSThomas Huth * the regions during board creation, so the board models don't 296fcf5ef2aSThomas Huth * need to do anything special for the KVM case. 29719d1bd0bSEric Auger * 29819d1bd0bSEric Auger * Sometimes the address must be OR'ed with some other fields 29919d1bd0bSEric Auger * (for example for KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION). 30019d1bd0bSEric Auger * @kda_addr_ormask aims at storing the value of those fields. 301fcf5ef2aSThomas Huth */ 302fcf5ef2aSThomas Huth typedef struct KVMDevice { 303fcf5ef2aSThomas Huth struct kvm_arm_device_addr kda; 304fcf5ef2aSThomas Huth struct kvm_device_attr kdattr; 30519d1bd0bSEric Auger uint64_t kda_addr_ormask; 306fcf5ef2aSThomas Huth MemoryRegion *mr; 307fcf5ef2aSThomas Huth QSLIST_ENTRY(KVMDevice) entries; 308fcf5ef2aSThomas Huth int dev_fd; 309fcf5ef2aSThomas Huth } KVMDevice; 310fcf5ef2aSThomas Huth 311b58deb34SPaolo Bonzini static QSLIST_HEAD(, KVMDevice) kvm_devices_head; 312fcf5ef2aSThomas Huth 313fcf5ef2aSThomas Huth static void kvm_arm_devlistener_add(MemoryListener *listener, 314fcf5ef2aSThomas Huth MemoryRegionSection *section) 315fcf5ef2aSThomas Huth { 316fcf5ef2aSThomas Huth KVMDevice *kd; 317fcf5ef2aSThomas Huth 318fcf5ef2aSThomas Huth QSLIST_FOREACH(kd, &kvm_devices_head, entries) { 319fcf5ef2aSThomas Huth if (section->mr == kd->mr) { 320fcf5ef2aSThomas Huth kd->kda.addr = section->offset_within_address_space; 321fcf5ef2aSThomas Huth } 322fcf5ef2aSThomas Huth } 323fcf5ef2aSThomas Huth } 324fcf5ef2aSThomas Huth 325fcf5ef2aSThomas Huth static void kvm_arm_devlistener_del(MemoryListener *listener, 326fcf5ef2aSThomas Huth MemoryRegionSection *section) 327fcf5ef2aSThomas Huth { 328fcf5ef2aSThomas Huth KVMDevice *kd; 329fcf5ef2aSThomas Huth 330fcf5ef2aSThomas Huth QSLIST_FOREACH(kd, &kvm_devices_head, entries) { 331fcf5ef2aSThomas Huth if (section->mr == kd->mr) { 332fcf5ef2aSThomas Huth kd->kda.addr = -1; 333fcf5ef2aSThomas Huth } 334fcf5ef2aSThomas Huth } 335fcf5ef2aSThomas Huth } 336fcf5ef2aSThomas Huth 337fcf5ef2aSThomas Huth static MemoryListener devlistener = { 338*142518bdSPeter Xu .name = "kvm-arm", 339fcf5ef2aSThomas Huth .region_add = kvm_arm_devlistener_add, 340fcf5ef2aSThomas Huth .region_del = kvm_arm_devlistener_del, 341fcf5ef2aSThomas Huth }; 342fcf5ef2aSThomas Huth 343fcf5ef2aSThomas Huth static void kvm_arm_set_device_addr(KVMDevice *kd) 344fcf5ef2aSThomas Huth { 345fcf5ef2aSThomas Huth struct kvm_device_attr *attr = &kd->kdattr; 346fcf5ef2aSThomas Huth int ret; 347fcf5ef2aSThomas Huth 348fcf5ef2aSThomas Huth /* If the device control API is available and we have a device fd on the 349fcf5ef2aSThomas Huth * KVMDevice struct, let's use the newer API 350fcf5ef2aSThomas Huth */ 351fcf5ef2aSThomas Huth if (kd->dev_fd >= 0) { 352fcf5ef2aSThomas Huth uint64_t addr = kd->kda.addr; 35319d1bd0bSEric Auger 35419d1bd0bSEric Auger addr |= kd->kda_addr_ormask; 355fcf5ef2aSThomas Huth attr->addr = (uintptr_t)&addr; 356fcf5ef2aSThomas Huth ret = kvm_device_ioctl(kd->dev_fd, KVM_SET_DEVICE_ATTR, attr); 357fcf5ef2aSThomas Huth } else { 358fcf5ef2aSThomas Huth ret = kvm_vm_ioctl(kvm_state, KVM_ARM_SET_DEVICE_ADDR, &kd->kda); 359fcf5ef2aSThomas Huth } 360fcf5ef2aSThomas Huth 361fcf5ef2aSThomas Huth if (ret < 0) { 362fcf5ef2aSThomas Huth fprintf(stderr, "Failed to set device address: %s\n", 363fcf5ef2aSThomas Huth strerror(-ret)); 364fcf5ef2aSThomas Huth abort(); 365fcf5ef2aSThomas Huth } 366fcf5ef2aSThomas Huth } 367fcf5ef2aSThomas Huth 368fcf5ef2aSThomas Huth static void kvm_arm_machine_init_done(Notifier *notifier, void *data) 369fcf5ef2aSThomas Huth { 370fcf5ef2aSThomas Huth KVMDevice *kd, *tkd; 371fcf5ef2aSThomas Huth 372fcf5ef2aSThomas Huth QSLIST_FOREACH_SAFE(kd, &kvm_devices_head, entries, tkd) { 373fcf5ef2aSThomas Huth if (kd->kda.addr != -1) { 374fcf5ef2aSThomas Huth kvm_arm_set_device_addr(kd); 375fcf5ef2aSThomas Huth } 376fcf5ef2aSThomas Huth memory_region_unref(kd->mr); 3775ff9aaabSZheng Xiang QSLIST_REMOVE_HEAD(&kvm_devices_head, entries); 378fcf5ef2aSThomas Huth g_free(kd); 379fcf5ef2aSThomas Huth } 3800bbe4354SPeter Xu memory_listener_unregister(&devlistener); 381fcf5ef2aSThomas Huth } 382fcf5ef2aSThomas Huth 383fcf5ef2aSThomas Huth static Notifier notify = { 384fcf5ef2aSThomas Huth .notify = kvm_arm_machine_init_done, 385fcf5ef2aSThomas Huth }; 386fcf5ef2aSThomas Huth 387fcf5ef2aSThomas Huth void kvm_arm_register_device(MemoryRegion *mr, uint64_t devid, uint64_t group, 38819d1bd0bSEric Auger uint64_t attr, int dev_fd, uint64_t addr_ormask) 389fcf5ef2aSThomas Huth { 390fcf5ef2aSThomas Huth KVMDevice *kd; 391fcf5ef2aSThomas Huth 392fcf5ef2aSThomas Huth if (!kvm_irqchip_in_kernel()) { 393fcf5ef2aSThomas Huth return; 394fcf5ef2aSThomas Huth } 395fcf5ef2aSThomas Huth 396fcf5ef2aSThomas Huth if (QSLIST_EMPTY(&kvm_devices_head)) { 397fcf5ef2aSThomas Huth memory_listener_register(&devlistener, &address_space_memory); 398fcf5ef2aSThomas Huth qemu_add_machine_init_done_notifier(¬ify); 399fcf5ef2aSThomas Huth } 400fcf5ef2aSThomas Huth kd = g_new0(KVMDevice, 1); 401fcf5ef2aSThomas Huth kd->mr = mr; 402fcf5ef2aSThomas Huth kd->kda.id = devid; 403fcf5ef2aSThomas Huth kd->kda.addr = -1; 404fcf5ef2aSThomas Huth kd->kdattr.flags = 0; 405fcf5ef2aSThomas Huth kd->kdattr.group = group; 406fcf5ef2aSThomas Huth kd->kdattr.attr = attr; 407fcf5ef2aSThomas Huth kd->dev_fd = dev_fd; 40819d1bd0bSEric Auger kd->kda_addr_ormask = addr_ormask; 409fcf5ef2aSThomas Huth QSLIST_INSERT_HEAD(&kvm_devices_head, kd, entries); 410fcf5ef2aSThomas Huth memory_region_ref(kd->mr); 411fcf5ef2aSThomas Huth } 412fcf5ef2aSThomas Huth 413fcf5ef2aSThomas Huth static int compare_u64(const void *a, const void *b) 414fcf5ef2aSThomas Huth { 415fcf5ef2aSThomas Huth if (*(uint64_t *)a > *(uint64_t *)b) { 416fcf5ef2aSThomas Huth return 1; 417fcf5ef2aSThomas Huth } 418fcf5ef2aSThomas Huth if (*(uint64_t *)a < *(uint64_t *)b) { 419fcf5ef2aSThomas Huth return -1; 420fcf5ef2aSThomas Huth } 421fcf5ef2aSThomas Huth return 0; 422fcf5ef2aSThomas Huth } 423fcf5ef2aSThomas Huth 424e5ac4200SAndrew Jones /* 425e5ac4200SAndrew Jones * cpreg_values are sorted in ascending order by KVM register ID 426e5ac4200SAndrew Jones * (see kvm_arm_init_cpreg_list). This allows us to cheaply find 427e5ac4200SAndrew Jones * the storage for a KVM register by ID with a binary search. 428e5ac4200SAndrew Jones */ 429e5ac4200SAndrew Jones static uint64_t *kvm_arm_get_cpreg_ptr(ARMCPU *cpu, uint64_t regidx) 430e5ac4200SAndrew Jones { 431e5ac4200SAndrew Jones uint64_t *res; 432e5ac4200SAndrew Jones 433e5ac4200SAndrew Jones res = bsearch(®idx, cpu->cpreg_indexes, cpu->cpreg_array_len, 434e5ac4200SAndrew Jones sizeof(uint64_t), compare_u64); 435e5ac4200SAndrew Jones assert(res); 436e5ac4200SAndrew Jones 437e5ac4200SAndrew Jones return &cpu->cpreg_values[res - cpu->cpreg_indexes]; 438e5ac4200SAndrew Jones } 439e5ac4200SAndrew Jones 440c8a44709SDongjiu Geng /* Initialize the ARMCPU cpreg list according to the kernel's 441fcf5ef2aSThomas Huth * definition of what CPU registers it knows about (and throw away 442fcf5ef2aSThomas Huth * the previous TCG-created cpreg list). 443fcf5ef2aSThomas Huth */ 444fcf5ef2aSThomas Huth int kvm_arm_init_cpreg_list(ARMCPU *cpu) 445fcf5ef2aSThomas Huth { 446fcf5ef2aSThomas Huth struct kvm_reg_list rl; 447fcf5ef2aSThomas Huth struct kvm_reg_list *rlp; 448fcf5ef2aSThomas Huth int i, ret, arraylen; 449fcf5ef2aSThomas Huth CPUState *cs = CPU(cpu); 450fcf5ef2aSThomas Huth 451fcf5ef2aSThomas Huth rl.n = 0; 452fcf5ef2aSThomas Huth ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, &rl); 453fcf5ef2aSThomas Huth if (ret != -E2BIG) { 454fcf5ef2aSThomas Huth return ret; 455fcf5ef2aSThomas Huth } 456fcf5ef2aSThomas Huth rlp = g_malloc(sizeof(struct kvm_reg_list) + rl.n * sizeof(uint64_t)); 457fcf5ef2aSThomas Huth rlp->n = rl.n; 458fcf5ef2aSThomas Huth ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, rlp); 459fcf5ef2aSThomas Huth if (ret) { 460fcf5ef2aSThomas Huth goto out; 461fcf5ef2aSThomas Huth } 462fcf5ef2aSThomas Huth /* Sort the list we get back from the kernel, since cpreg_tuples 463fcf5ef2aSThomas Huth * must be in strictly ascending order. 464fcf5ef2aSThomas Huth */ 465fcf5ef2aSThomas Huth qsort(&rlp->reg, rlp->n, sizeof(rlp->reg[0]), compare_u64); 466fcf5ef2aSThomas Huth 467fcf5ef2aSThomas Huth for (i = 0, arraylen = 0; i < rlp->n; i++) { 468fcf5ef2aSThomas Huth if (!kvm_arm_reg_syncs_via_cpreg_list(rlp->reg[i])) { 469fcf5ef2aSThomas Huth continue; 470fcf5ef2aSThomas Huth } 471fcf5ef2aSThomas Huth switch (rlp->reg[i] & KVM_REG_SIZE_MASK) { 472fcf5ef2aSThomas Huth case KVM_REG_SIZE_U32: 473fcf5ef2aSThomas Huth case KVM_REG_SIZE_U64: 474fcf5ef2aSThomas Huth break; 475fcf5ef2aSThomas Huth default: 476fcf5ef2aSThomas Huth fprintf(stderr, "Can't handle size of register in kernel list\n"); 477fcf5ef2aSThomas Huth ret = -EINVAL; 478fcf5ef2aSThomas Huth goto out; 479fcf5ef2aSThomas Huth } 480fcf5ef2aSThomas Huth 481fcf5ef2aSThomas Huth arraylen++; 482fcf5ef2aSThomas Huth } 483fcf5ef2aSThomas Huth 484fcf5ef2aSThomas Huth cpu->cpreg_indexes = g_renew(uint64_t, cpu->cpreg_indexes, arraylen); 485fcf5ef2aSThomas Huth cpu->cpreg_values = g_renew(uint64_t, cpu->cpreg_values, arraylen); 486fcf5ef2aSThomas Huth cpu->cpreg_vmstate_indexes = g_renew(uint64_t, cpu->cpreg_vmstate_indexes, 487fcf5ef2aSThomas Huth arraylen); 488fcf5ef2aSThomas Huth cpu->cpreg_vmstate_values = g_renew(uint64_t, cpu->cpreg_vmstate_values, 489fcf5ef2aSThomas Huth arraylen); 490fcf5ef2aSThomas Huth cpu->cpreg_array_len = arraylen; 491fcf5ef2aSThomas Huth cpu->cpreg_vmstate_array_len = arraylen; 492fcf5ef2aSThomas Huth 493fcf5ef2aSThomas Huth for (i = 0, arraylen = 0; i < rlp->n; i++) { 494fcf5ef2aSThomas Huth uint64_t regidx = rlp->reg[i]; 495fcf5ef2aSThomas Huth if (!kvm_arm_reg_syncs_via_cpreg_list(regidx)) { 496fcf5ef2aSThomas Huth continue; 497fcf5ef2aSThomas Huth } 498fcf5ef2aSThomas Huth cpu->cpreg_indexes[arraylen] = regidx; 499fcf5ef2aSThomas Huth arraylen++; 500fcf5ef2aSThomas Huth } 501fcf5ef2aSThomas Huth assert(cpu->cpreg_array_len == arraylen); 502fcf5ef2aSThomas Huth 503fcf5ef2aSThomas Huth if (!write_kvmstate_to_list(cpu)) { 504fcf5ef2aSThomas Huth /* Shouldn't happen unless kernel is inconsistent about 505fcf5ef2aSThomas Huth * what registers exist. 506fcf5ef2aSThomas Huth */ 507fcf5ef2aSThomas Huth fprintf(stderr, "Initial read of kernel register state failed\n"); 508fcf5ef2aSThomas Huth ret = -EINVAL; 509fcf5ef2aSThomas Huth goto out; 510fcf5ef2aSThomas Huth } 511fcf5ef2aSThomas Huth 512fcf5ef2aSThomas Huth out: 513fcf5ef2aSThomas Huth g_free(rlp); 514fcf5ef2aSThomas Huth return ret; 515fcf5ef2aSThomas Huth } 516fcf5ef2aSThomas Huth 517fcf5ef2aSThomas Huth bool write_kvmstate_to_list(ARMCPU *cpu) 518fcf5ef2aSThomas Huth { 519fcf5ef2aSThomas Huth CPUState *cs = CPU(cpu); 520fcf5ef2aSThomas Huth int i; 521fcf5ef2aSThomas Huth bool ok = true; 522fcf5ef2aSThomas Huth 523fcf5ef2aSThomas Huth for (i = 0; i < cpu->cpreg_array_len; i++) { 524fcf5ef2aSThomas Huth struct kvm_one_reg r; 525fcf5ef2aSThomas Huth uint64_t regidx = cpu->cpreg_indexes[i]; 526fcf5ef2aSThomas Huth uint32_t v32; 527fcf5ef2aSThomas Huth int ret; 528fcf5ef2aSThomas Huth 529fcf5ef2aSThomas Huth r.id = regidx; 530fcf5ef2aSThomas Huth 531fcf5ef2aSThomas Huth switch (regidx & KVM_REG_SIZE_MASK) { 532fcf5ef2aSThomas Huth case KVM_REG_SIZE_U32: 533fcf5ef2aSThomas Huth r.addr = (uintptr_t)&v32; 534fcf5ef2aSThomas Huth ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r); 535fcf5ef2aSThomas Huth if (!ret) { 536fcf5ef2aSThomas Huth cpu->cpreg_values[i] = v32; 537fcf5ef2aSThomas Huth } 538fcf5ef2aSThomas Huth break; 539fcf5ef2aSThomas Huth case KVM_REG_SIZE_U64: 540fcf5ef2aSThomas Huth r.addr = (uintptr_t)(cpu->cpreg_values + i); 541fcf5ef2aSThomas Huth ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r); 542fcf5ef2aSThomas Huth break; 543fcf5ef2aSThomas Huth default: 544fcf5ef2aSThomas Huth abort(); 545fcf5ef2aSThomas Huth } 546fcf5ef2aSThomas Huth if (ret) { 547fcf5ef2aSThomas Huth ok = false; 548fcf5ef2aSThomas Huth } 549fcf5ef2aSThomas Huth } 550fcf5ef2aSThomas Huth return ok; 551fcf5ef2aSThomas Huth } 552fcf5ef2aSThomas Huth 553fcf5ef2aSThomas Huth bool write_list_to_kvmstate(ARMCPU *cpu, int level) 554fcf5ef2aSThomas Huth { 555fcf5ef2aSThomas Huth CPUState *cs = CPU(cpu); 556fcf5ef2aSThomas Huth int i; 557fcf5ef2aSThomas Huth bool ok = true; 558fcf5ef2aSThomas Huth 559fcf5ef2aSThomas Huth for (i = 0; i < cpu->cpreg_array_len; i++) { 560fcf5ef2aSThomas Huth struct kvm_one_reg r; 561fcf5ef2aSThomas Huth uint64_t regidx = cpu->cpreg_indexes[i]; 562fcf5ef2aSThomas Huth uint32_t v32; 563fcf5ef2aSThomas Huth int ret; 564fcf5ef2aSThomas Huth 565fcf5ef2aSThomas Huth if (kvm_arm_cpreg_level(regidx) > level) { 566fcf5ef2aSThomas Huth continue; 567fcf5ef2aSThomas Huth } 568fcf5ef2aSThomas Huth 569fcf5ef2aSThomas Huth r.id = regidx; 570fcf5ef2aSThomas Huth switch (regidx & KVM_REG_SIZE_MASK) { 571fcf5ef2aSThomas Huth case KVM_REG_SIZE_U32: 572fcf5ef2aSThomas Huth v32 = cpu->cpreg_values[i]; 573fcf5ef2aSThomas Huth r.addr = (uintptr_t)&v32; 574fcf5ef2aSThomas Huth break; 575fcf5ef2aSThomas Huth case KVM_REG_SIZE_U64: 576fcf5ef2aSThomas Huth r.addr = (uintptr_t)(cpu->cpreg_values + i); 577fcf5ef2aSThomas Huth break; 578fcf5ef2aSThomas Huth default: 579fcf5ef2aSThomas Huth abort(); 580fcf5ef2aSThomas Huth } 581fcf5ef2aSThomas Huth ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &r); 582fcf5ef2aSThomas Huth if (ret) { 583fcf5ef2aSThomas Huth /* We might fail for "unknown register" and also for 584fcf5ef2aSThomas Huth * "you tried to set a register which is constant with 585fcf5ef2aSThomas Huth * a different value from what it actually contains". 586fcf5ef2aSThomas Huth */ 587fcf5ef2aSThomas Huth ok = false; 588fcf5ef2aSThomas Huth } 589fcf5ef2aSThomas Huth } 590fcf5ef2aSThomas Huth return ok; 591fcf5ef2aSThomas Huth } 592fcf5ef2aSThomas Huth 593e5ac4200SAndrew Jones void kvm_arm_cpu_pre_save(ARMCPU *cpu) 594e5ac4200SAndrew Jones { 595e5ac4200SAndrew Jones /* KVM virtual time adjustment */ 596e5ac4200SAndrew Jones if (cpu->kvm_vtime_dirty) { 597e5ac4200SAndrew Jones *kvm_arm_get_cpreg_ptr(cpu, KVM_REG_ARM_TIMER_CNT) = cpu->kvm_vtime; 598e5ac4200SAndrew Jones } 599e5ac4200SAndrew Jones } 600e5ac4200SAndrew Jones 601e5ac4200SAndrew Jones void kvm_arm_cpu_post_load(ARMCPU *cpu) 602e5ac4200SAndrew Jones { 603e5ac4200SAndrew Jones /* KVM virtual time adjustment */ 604e5ac4200SAndrew Jones if (cpu->kvm_adjvtime) { 605e5ac4200SAndrew Jones cpu->kvm_vtime = *kvm_arm_get_cpreg_ptr(cpu, KVM_REG_ARM_TIMER_CNT); 606e5ac4200SAndrew Jones cpu->kvm_vtime_dirty = true; 607e5ac4200SAndrew Jones } 608e5ac4200SAndrew Jones } 609e5ac4200SAndrew Jones 610fcf5ef2aSThomas Huth void kvm_arm_reset_vcpu(ARMCPU *cpu) 611fcf5ef2aSThomas Huth { 612fcf5ef2aSThomas Huth int ret; 613fcf5ef2aSThomas Huth 614fcf5ef2aSThomas Huth /* Re-init VCPU so that all registers are set to 615fcf5ef2aSThomas Huth * their respective reset values. 616fcf5ef2aSThomas Huth */ 617fcf5ef2aSThomas Huth ret = kvm_arm_vcpu_init(CPU(cpu)); 618fcf5ef2aSThomas Huth if (ret < 0) { 619fcf5ef2aSThomas Huth fprintf(stderr, "kvm_arm_vcpu_init failed: %s\n", strerror(-ret)); 620fcf5ef2aSThomas Huth abort(); 621fcf5ef2aSThomas Huth } 622fcf5ef2aSThomas Huth if (!write_kvmstate_to_list(cpu)) { 623fcf5ef2aSThomas Huth fprintf(stderr, "write_kvmstate_to_list failed\n"); 624fcf5ef2aSThomas Huth abort(); 625fcf5ef2aSThomas Huth } 626b698e4eeSPeter Maydell /* 627b698e4eeSPeter Maydell * Sync the reset values also into the CPUState. This is necessary 628b698e4eeSPeter Maydell * because the next thing we do will be a kvm_arch_put_registers() 629b698e4eeSPeter Maydell * which will update the list values from the CPUState before copying 630b698e4eeSPeter Maydell * the list values back to KVM. It's OK to ignore failure returns here 631b698e4eeSPeter Maydell * for the same reason we do so in kvm_arch_get_registers(). 632b698e4eeSPeter Maydell */ 633b698e4eeSPeter Maydell write_list_to_cpustate(cpu); 634fcf5ef2aSThomas Huth } 635fcf5ef2aSThomas Huth 636fcf5ef2aSThomas Huth /* 637fcf5ef2aSThomas Huth * Update KVM's MP_STATE based on what QEMU thinks it is 638fcf5ef2aSThomas Huth */ 639fcf5ef2aSThomas Huth int kvm_arm_sync_mpstate_to_kvm(ARMCPU *cpu) 640fcf5ef2aSThomas Huth { 641fcf5ef2aSThomas Huth if (cap_has_mp_state) { 642fcf5ef2aSThomas Huth struct kvm_mp_state mp_state = { 643062ba099SAlex Bennée .mp_state = (cpu->power_state == PSCI_OFF) ? 644062ba099SAlex Bennée KVM_MP_STATE_STOPPED : KVM_MP_STATE_RUNNABLE 645fcf5ef2aSThomas Huth }; 646fcf5ef2aSThomas Huth int ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_MP_STATE, &mp_state); 647fcf5ef2aSThomas Huth if (ret) { 648fcf5ef2aSThomas Huth fprintf(stderr, "%s: failed to set MP_STATE %d/%s\n", 649fcf5ef2aSThomas Huth __func__, ret, strerror(-ret)); 650fcf5ef2aSThomas Huth return -1; 651fcf5ef2aSThomas Huth } 652fcf5ef2aSThomas Huth } 653fcf5ef2aSThomas Huth 654fcf5ef2aSThomas Huth return 0; 655fcf5ef2aSThomas Huth } 656fcf5ef2aSThomas Huth 657fcf5ef2aSThomas Huth /* 658fcf5ef2aSThomas Huth * Sync the KVM MP_STATE into QEMU 659fcf5ef2aSThomas Huth */ 660fcf5ef2aSThomas Huth int kvm_arm_sync_mpstate_to_qemu(ARMCPU *cpu) 661fcf5ef2aSThomas Huth { 662fcf5ef2aSThomas Huth if (cap_has_mp_state) { 663fcf5ef2aSThomas Huth struct kvm_mp_state mp_state; 664fcf5ef2aSThomas Huth int ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_MP_STATE, &mp_state); 665fcf5ef2aSThomas Huth if (ret) { 666fcf5ef2aSThomas Huth fprintf(stderr, "%s: failed to get MP_STATE %d/%s\n", 667fcf5ef2aSThomas Huth __func__, ret, strerror(-ret)); 668fcf5ef2aSThomas Huth abort(); 669fcf5ef2aSThomas Huth } 670062ba099SAlex Bennée cpu->power_state = (mp_state.mp_state == KVM_MP_STATE_STOPPED) ? 671062ba099SAlex Bennée PSCI_OFF : PSCI_ON; 672fcf5ef2aSThomas Huth } 673fcf5ef2aSThomas Huth 674fcf5ef2aSThomas Huth return 0; 675fcf5ef2aSThomas Huth } 676fcf5ef2aSThomas Huth 677e5ac4200SAndrew Jones void kvm_arm_get_virtual_time(CPUState *cs) 678e5ac4200SAndrew Jones { 679e5ac4200SAndrew Jones ARMCPU *cpu = ARM_CPU(cs); 680e5ac4200SAndrew Jones struct kvm_one_reg reg = { 681e5ac4200SAndrew Jones .id = KVM_REG_ARM_TIMER_CNT, 682e5ac4200SAndrew Jones .addr = (uintptr_t)&cpu->kvm_vtime, 683e5ac4200SAndrew Jones }; 684e5ac4200SAndrew Jones int ret; 685e5ac4200SAndrew Jones 686e5ac4200SAndrew Jones if (cpu->kvm_vtime_dirty) { 687e5ac4200SAndrew Jones return; 688e5ac4200SAndrew Jones } 689e5ac4200SAndrew Jones 690e5ac4200SAndrew Jones ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, ®); 691e5ac4200SAndrew Jones if (ret) { 692e5ac4200SAndrew Jones error_report("Failed to get KVM_REG_ARM_TIMER_CNT"); 693e5ac4200SAndrew Jones abort(); 694e5ac4200SAndrew Jones } 695e5ac4200SAndrew Jones 696e5ac4200SAndrew Jones cpu->kvm_vtime_dirty = true; 697e5ac4200SAndrew Jones } 698e5ac4200SAndrew Jones 699e5ac4200SAndrew Jones void kvm_arm_put_virtual_time(CPUState *cs) 700e5ac4200SAndrew Jones { 701e5ac4200SAndrew Jones ARMCPU *cpu = ARM_CPU(cs); 702e5ac4200SAndrew Jones struct kvm_one_reg reg = { 703e5ac4200SAndrew Jones .id = KVM_REG_ARM_TIMER_CNT, 704e5ac4200SAndrew Jones .addr = (uintptr_t)&cpu->kvm_vtime, 705e5ac4200SAndrew Jones }; 706e5ac4200SAndrew Jones int ret; 707e5ac4200SAndrew Jones 708e5ac4200SAndrew Jones if (!cpu->kvm_vtime_dirty) { 709e5ac4200SAndrew Jones return; 710e5ac4200SAndrew Jones } 711e5ac4200SAndrew Jones 712e5ac4200SAndrew Jones ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, ®); 713e5ac4200SAndrew Jones if (ret) { 714e5ac4200SAndrew Jones error_report("Failed to set KVM_REG_ARM_TIMER_CNT"); 715e5ac4200SAndrew Jones abort(); 716e5ac4200SAndrew Jones } 717e5ac4200SAndrew Jones 718e5ac4200SAndrew Jones cpu->kvm_vtime_dirty = false; 719e5ac4200SAndrew Jones } 720e5ac4200SAndrew Jones 721202ccb6bSDongjiu Geng int kvm_put_vcpu_events(ARMCPU *cpu) 722202ccb6bSDongjiu Geng { 723202ccb6bSDongjiu Geng CPUARMState *env = &cpu->env; 724202ccb6bSDongjiu Geng struct kvm_vcpu_events events; 725202ccb6bSDongjiu Geng int ret; 726202ccb6bSDongjiu Geng 727202ccb6bSDongjiu Geng if (!kvm_has_vcpu_events()) { 728202ccb6bSDongjiu Geng return 0; 729202ccb6bSDongjiu Geng } 730202ccb6bSDongjiu Geng 731202ccb6bSDongjiu Geng memset(&events, 0, sizeof(events)); 732202ccb6bSDongjiu Geng events.exception.serror_pending = env->serror.pending; 733202ccb6bSDongjiu Geng 734202ccb6bSDongjiu Geng /* Inject SError to guest with specified syndrome if host kernel 735202ccb6bSDongjiu Geng * supports it, otherwise inject SError without syndrome. 736202ccb6bSDongjiu Geng */ 737202ccb6bSDongjiu Geng if (cap_has_inject_serror_esr) { 738202ccb6bSDongjiu Geng events.exception.serror_has_esr = env->serror.has_esr; 739202ccb6bSDongjiu Geng events.exception.serror_esr = env->serror.esr; 740202ccb6bSDongjiu Geng } 741202ccb6bSDongjiu Geng 742202ccb6bSDongjiu Geng ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_VCPU_EVENTS, &events); 743202ccb6bSDongjiu Geng if (ret) { 744202ccb6bSDongjiu Geng error_report("failed to put vcpu events"); 745202ccb6bSDongjiu Geng } 746202ccb6bSDongjiu Geng 747202ccb6bSDongjiu Geng return ret; 748202ccb6bSDongjiu Geng } 749202ccb6bSDongjiu Geng 750202ccb6bSDongjiu Geng int kvm_get_vcpu_events(ARMCPU *cpu) 751202ccb6bSDongjiu Geng { 752202ccb6bSDongjiu Geng CPUARMState *env = &cpu->env; 753202ccb6bSDongjiu Geng struct kvm_vcpu_events events; 754202ccb6bSDongjiu Geng int ret; 755202ccb6bSDongjiu Geng 756202ccb6bSDongjiu Geng if (!kvm_has_vcpu_events()) { 757202ccb6bSDongjiu Geng return 0; 758202ccb6bSDongjiu Geng } 759202ccb6bSDongjiu Geng 760202ccb6bSDongjiu Geng memset(&events, 0, sizeof(events)); 761202ccb6bSDongjiu Geng ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_VCPU_EVENTS, &events); 762202ccb6bSDongjiu Geng if (ret) { 763202ccb6bSDongjiu Geng error_report("failed to get vcpu events"); 764202ccb6bSDongjiu Geng return ret; 765202ccb6bSDongjiu Geng } 766202ccb6bSDongjiu Geng 767202ccb6bSDongjiu Geng env->serror.pending = events.exception.serror_pending; 768202ccb6bSDongjiu Geng env->serror.has_esr = events.exception.serror_has_esr; 769202ccb6bSDongjiu Geng env->serror.esr = events.exception.serror_esr; 770202ccb6bSDongjiu Geng 771202ccb6bSDongjiu Geng return 0; 772202ccb6bSDongjiu Geng } 773202ccb6bSDongjiu Geng 774fcf5ef2aSThomas Huth void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run) 775fcf5ef2aSThomas Huth { 7761711bfa5SBeata Michalska ARMCPU *cpu = ARM_CPU(cs); 7771711bfa5SBeata Michalska CPUARMState *env = &cpu->env; 7781711bfa5SBeata Michalska 7791711bfa5SBeata Michalska if (unlikely(env->ext_dabt_raised)) { 7801711bfa5SBeata Michalska /* 7811711bfa5SBeata Michalska * Verifying that the ext DABT has been properly injected, 7821711bfa5SBeata Michalska * otherwise risking indefinitely re-running the faulting instruction 7831711bfa5SBeata Michalska * Covering a very narrow case for kernels 5.5..5.5.4 7841711bfa5SBeata Michalska * when injected abort was misconfigured to be 7851711bfa5SBeata Michalska * an IMPLEMENTATION DEFINED exception (for 32-bit EL1) 7861711bfa5SBeata Michalska */ 7871711bfa5SBeata Michalska if (!arm_feature(env, ARM_FEATURE_AARCH64) && 7881711bfa5SBeata Michalska unlikely(!kvm_arm_verify_ext_dabt_pending(cs))) { 7891711bfa5SBeata Michalska 7901711bfa5SBeata Michalska error_report("Data abort exception with no valid ISS generated by " 7911711bfa5SBeata Michalska "guest memory access. KVM unable to emulate faulting " 7921711bfa5SBeata Michalska "instruction. Failed to inject an external data abort " 7931711bfa5SBeata Michalska "into the guest."); 7941711bfa5SBeata Michalska abort(); 7951711bfa5SBeata Michalska } 7961711bfa5SBeata Michalska /* Clear the status */ 7971711bfa5SBeata Michalska env->ext_dabt_raised = 0; 7981711bfa5SBeata Michalska } 799fcf5ef2aSThomas Huth } 800fcf5ef2aSThomas Huth 801fcf5ef2aSThomas Huth MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *run) 802fcf5ef2aSThomas Huth { 8035d721b78SAlexander Graf ARMCPU *cpu; 8045d721b78SAlexander Graf uint32_t switched_level; 8055d721b78SAlexander Graf 8065d721b78SAlexander Graf if (kvm_irqchip_in_kernel()) { 8075d721b78SAlexander Graf /* 8085d721b78SAlexander Graf * We only need to sync timer states with user-space interrupt 8095d721b78SAlexander Graf * controllers, so return early and save cycles if we don't. 8105d721b78SAlexander Graf */ 8115d721b78SAlexander Graf return MEMTXATTRS_UNSPECIFIED; 8125d721b78SAlexander Graf } 8135d721b78SAlexander Graf 8145d721b78SAlexander Graf cpu = ARM_CPU(cs); 8155d721b78SAlexander Graf 8165d721b78SAlexander Graf /* Synchronize our shadowed in-kernel device irq lines with the kvm ones */ 8175d721b78SAlexander Graf if (run->s.regs.device_irq_level != cpu->device_irq_level) { 8185d721b78SAlexander Graf switched_level = cpu->device_irq_level ^ run->s.regs.device_irq_level; 8195d721b78SAlexander Graf 8205d721b78SAlexander Graf qemu_mutex_lock_iothread(); 8215d721b78SAlexander Graf 8225d721b78SAlexander Graf if (switched_level & KVM_ARM_DEV_EL1_VTIMER) { 8235d721b78SAlexander Graf qemu_set_irq(cpu->gt_timer_outputs[GTIMER_VIRT], 8245d721b78SAlexander Graf !!(run->s.regs.device_irq_level & 8255d721b78SAlexander Graf KVM_ARM_DEV_EL1_VTIMER)); 8265d721b78SAlexander Graf switched_level &= ~KVM_ARM_DEV_EL1_VTIMER; 8275d721b78SAlexander Graf } 8285d721b78SAlexander Graf 8295d721b78SAlexander Graf if (switched_level & KVM_ARM_DEV_EL1_PTIMER) { 8305d721b78SAlexander Graf qemu_set_irq(cpu->gt_timer_outputs[GTIMER_PHYS], 8315d721b78SAlexander Graf !!(run->s.regs.device_irq_level & 8325d721b78SAlexander Graf KVM_ARM_DEV_EL1_PTIMER)); 8335d721b78SAlexander Graf switched_level &= ~KVM_ARM_DEV_EL1_PTIMER; 8345d721b78SAlexander Graf } 8355d721b78SAlexander Graf 836b1659527SAndrew Jones if (switched_level & KVM_ARM_DEV_PMU) { 837b1659527SAndrew Jones qemu_set_irq(cpu->pmu_interrupt, 838b1659527SAndrew Jones !!(run->s.regs.device_irq_level & KVM_ARM_DEV_PMU)); 839b1659527SAndrew Jones switched_level &= ~KVM_ARM_DEV_PMU; 840b1659527SAndrew Jones } 8415d721b78SAlexander Graf 8425d721b78SAlexander Graf if (switched_level) { 8435d721b78SAlexander Graf qemu_log_mask(LOG_UNIMP, "%s: unhandled in-kernel device IRQ %x\n", 8445d721b78SAlexander Graf __func__, switched_level); 8455d721b78SAlexander Graf } 8465d721b78SAlexander Graf 8475d721b78SAlexander Graf /* We also mark unknown levels as processed to not waste cycles */ 8485d721b78SAlexander Graf cpu->device_irq_level = run->s.regs.device_irq_level; 8495d721b78SAlexander Graf qemu_mutex_unlock_iothread(); 8505d721b78SAlexander Graf } 8515d721b78SAlexander Graf 852fcf5ef2aSThomas Huth return MEMTXATTRS_UNSPECIFIED; 853fcf5ef2aSThomas Huth } 854fcf5ef2aSThomas Huth 855538f0497SPhilippe Mathieu-Daudé void kvm_arm_vm_state_change(void *opaque, bool running, RunState state) 856e5ac4200SAndrew Jones { 857e5ac4200SAndrew Jones CPUState *cs = opaque; 858e5ac4200SAndrew Jones ARMCPU *cpu = ARM_CPU(cs); 859e5ac4200SAndrew Jones 860e5ac4200SAndrew Jones if (running) { 861e5ac4200SAndrew Jones if (cpu->kvm_adjvtime) { 862e5ac4200SAndrew Jones kvm_arm_put_virtual_time(cs); 863e5ac4200SAndrew Jones } 864e5ac4200SAndrew Jones } else { 865e5ac4200SAndrew Jones if (cpu->kvm_adjvtime) { 866e5ac4200SAndrew Jones kvm_arm_get_virtual_time(cs); 867e5ac4200SAndrew Jones } 868e5ac4200SAndrew Jones } 869e5ac4200SAndrew Jones } 870fcf5ef2aSThomas Huth 871694bcaa8SBeata Michalska /** 872694bcaa8SBeata Michalska * kvm_arm_handle_dabt_nisv: 873694bcaa8SBeata Michalska * @cs: CPUState 874694bcaa8SBeata Michalska * @esr_iss: ISS encoding (limited) for the exception from Data Abort 875694bcaa8SBeata Michalska * ISV bit set to '0b0' -> no valid instruction syndrome 876694bcaa8SBeata Michalska * @fault_ipa: faulting address for the synchronous data abort 877694bcaa8SBeata Michalska * 878694bcaa8SBeata Michalska * Returns: 0 if the exception has been handled, < 0 otherwise 879694bcaa8SBeata Michalska */ 880694bcaa8SBeata Michalska static int kvm_arm_handle_dabt_nisv(CPUState *cs, uint64_t esr_iss, 881694bcaa8SBeata Michalska uint64_t fault_ipa) 882694bcaa8SBeata Michalska { 8831711bfa5SBeata Michalska ARMCPU *cpu = ARM_CPU(cs); 8841711bfa5SBeata Michalska CPUARMState *env = &cpu->env; 885694bcaa8SBeata Michalska /* 886694bcaa8SBeata Michalska * Request KVM to inject the external data abort into the guest 887694bcaa8SBeata Michalska */ 888694bcaa8SBeata Michalska if (cap_has_inject_ext_dabt) { 889694bcaa8SBeata Michalska struct kvm_vcpu_events events = { }; 890694bcaa8SBeata Michalska /* 891694bcaa8SBeata Michalska * The external data abort event will be handled immediately by KVM 892694bcaa8SBeata Michalska * using the address fault that triggered the exit on given VCPU. 893694bcaa8SBeata Michalska * Requesting injection of the external data abort does not rely 894694bcaa8SBeata Michalska * on any other VCPU state. Therefore, in this particular case, the VCPU 895694bcaa8SBeata Michalska * synchronization can be exceptionally skipped. 896694bcaa8SBeata Michalska */ 897694bcaa8SBeata Michalska events.exception.ext_dabt_pending = 1; 898694bcaa8SBeata Michalska /* KVM_CAP_ARM_INJECT_EXT_DABT implies KVM_CAP_VCPU_EVENTS */ 8991711bfa5SBeata Michalska if (!kvm_vcpu_ioctl(cs, KVM_SET_VCPU_EVENTS, &events)) { 9001711bfa5SBeata Michalska env->ext_dabt_raised = 1; 9011711bfa5SBeata Michalska return 0; 9021711bfa5SBeata Michalska } 903694bcaa8SBeata Michalska } else { 904694bcaa8SBeata Michalska error_report("Data abort exception triggered by guest memory access " 905694bcaa8SBeata Michalska "at physical address: 0x" TARGET_FMT_lx, 906694bcaa8SBeata Michalska (target_ulong)fault_ipa); 907694bcaa8SBeata Michalska error_printf("KVM unable to emulate faulting instruction.\n"); 908694bcaa8SBeata Michalska } 909694bcaa8SBeata Michalska return -1; 910694bcaa8SBeata Michalska } 911694bcaa8SBeata Michalska 912fcf5ef2aSThomas Huth int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run) 913fcf5ef2aSThomas Huth { 914fcf5ef2aSThomas Huth int ret = 0; 915fcf5ef2aSThomas Huth 916fcf5ef2aSThomas Huth switch (run->exit_reason) { 917fcf5ef2aSThomas Huth case KVM_EXIT_DEBUG: 918fcf5ef2aSThomas Huth if (kvm_arm_handle_debug(cs, &run->debug.arch)) { 919fcf5ef2aSThomas Huth ret = EXCP_DEBUG; 920fcf5ef2aSThomas Huth } /* otherwise return to guest */ 921fcf5ef2aSThomas Huth break; 922694bcaa8SBeata Michalska case KVM_EXIT_ARM_NISV: 923694bcaa8SBeata Michalska /* External DABT with no valid iss to decode */ 924694bcaa8SBeata Michalska ret = kvm_arm_handle_dabt_nisv(cs, run->arm_nisv.esr_iss, 925694bcaa8SBeata Michalska run->arm_nisv.fault_ipa); 926694bcaa8SBeata Michalska break; 927fcf5ef2aSThomas Huth default: 928fcf5ef2aSThomas Huth qemu_log_mask(LOG_UNIMP, "%s: un-handled exit reason %d\n", 929fcf5ef2aSThomas Huth __func__, run->exit_reason); 930fcf5ef2aSThomas Huth break; 931fcf5ef2aSThomas Huth } 932fcf5ef2aSThomas Huth return ret; 933fcf5ef2aSThomas Huth } 934fcf5ef2aSThomas Huth 935fcf5ef2aSThomas Huth bool kvm_arch_stop_on_emulation_error(CPUState *cs) 936fcf5ef2aSThomas Huth { 937fcf5ef2aSThomas Huth return true; 938fcf5ef2aSThomas Huth } 939fcf5ef2aSThomas Huth 940fcf5ef2aSThomas Huth int kvm_arch_process_async_events(CPUState *cs) 941fcf5ef2aSThomas Huth { 942fcf5ef2aSThomas Huth return 0; 943fcf5ef2aSThomas Huth } 944fcf5ef2aSThomas Huth 945fcf5ef2aSThomas Huth void kvm_arch_update_guest_debug(CPUState *cs, struct kvm_guest_debug *dbg) 946fcf5ef2aSThomas Huth { 947fcf5ef2aSThomas Huth if (kvm_sw_breakpoints_active(cs)) { 948fcf5ef2aSThomas Huth dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP; 949fcf5ef2aSThomas Huth } 950fcf5ef2aSThomas Huth if (kvm_arm_hw_debug_active(cs)) { 951fcf5ef2aSThomas Huth dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW; 952fcf5ef2aSThomas Huth kvm_arm_copy_hw_debug_data(&dbg->arch); 953fcf5ef2aSThomas Huth } 954fcf5ef2aSThomas Huth } 955fcf5ef2aSThomas Huth 956fcf5ef2aSThomas Huth void kvm_arch_init_irq_routing(KVMState *s) 957fcf5ef2aSThomas Huth { 958fcf5ef2aSThomas Huth } 959fcf5ef2aSThomas Huth 9604376c40dSPaolo Bonzini int kvm_arch_irqchip_create(KVMState *s) 961fcf5ef2aSThomas Huth { 9624376c40dSPaolo Bonzini if (kvm_kernel_irqchip_split()) { 963fcf5ef2aSThomas Huth perror("-machine kernel_irqchip=split is not supported on ARM."); 964fcf5ef2aSThomas Huth exit(1); 965fcf5ef2aSThomas Huth } 966fcf5ef2aSThomas Huth 967fcf5ef2aSThomas Huth /* If we can create the VGIC using the newer device control API, we 968fcf5ef2aSThomas Huth * let the device do this when it initializes itself, otherwise we 969fcf5ef2aSThomas Huth * fall back to the old API */ 970fcf5ef2aSThomas Huth return kvm_check_extension(s, KVM_CAP_DEVICE_CTRL); 971fcf5ef2aSThomas Huth } 972fcf5ef2aSThomas Huth 973fcf5ef2aSThomas Huth int kvm_arm_vgic_probe(void) 974fcf5ef2aSThomas Huth { 975d45efe47SEric Auger int val = 0; 976d45efe47SEric Auger 977fcf5ef2aSThomas Huth if (kvm_create_device(kvm_state, 978fcf5ef2aSThomas Huth KVM_DEV_TYPE_ARM_VGIC_V3, true) == 0) { 979d45efe47SEric Auger val |= KVM_ARM_VGIC_V3; 980fcf5ef2aSThomas Huth } 981d45efe47SEric Auger if (kvm_create_device(kvm_state, 982d45efe47SEric Auger KVM_DEV_TYPE_ARM_VGIC_V2, true) == 0) { 983d45efe47SEric Auger val |= KVM_ARM_VGIC_V2; 984d45efe47SEric Auger } 985d45efe47SEric Auger return val; 986fcf5ef2aSThomas Huth } 987fcf5ef2aSThomas Huth 988f6530926SEric Auger int kvm_arm_set_irq(int cpu, int irqtype, int irq, int level) 989f6530926SEric Auger { 990f6530926SEric Auger int kvm_irq = (irqtype << KVM_ARM_IRQ_TYPE_SHIFT) | irq; 991f6530926SEric Auger int cpu_idx1 = cpu % 256; 992f6530926SEric Auger int cpu_idx2 = cpu / 256; 993f6530926SEric Auger 994f6530926SEric Auger kvm_irq |= (cpu_idx1 << KVM_ARM_IRQ_VCPU_SHIFT) | 995f6530926SEric Auger (cpu_idx2 << KVM_ARM_IRQ_VCPU2_SHIFT); 996f6530926SEric Auger 997f6530926SEric Auger return kvm_set_irq(kvm_state, kvm_irq, !!level); 998f6530926SEric Auger } 999f6530926SEric Auger 1000fcf5ef2aSThomas Huth int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route, 1001fcf5ef2aSThomas Huth uint64_t address, uint32_t data, PCIDevice *dev) 1002fcf5ef2aSThomas Huth { 1003b05c81d2SEric Auger AddressSpace *as = pci_device_iommu_address_space(dev); 1004b05c81d2SEric Auger hwaddr xlat, len, doorbell_gpa; 1005b05c81d2SEric Auger MemoryRegionSection mrs; 1006b05c81d2SEric Auger MemoryRegion *mr; 1007b05c81d2SEric Auger 1008b05c81d2SEric Auger if (as == &address_space_memory) { 1009fcf5ef2aSThomas Huth return 0; 1010fcf5ef2aSThomas Huth } 1011fcf5ef2aSThomas Huth 1012b05c81d2SEric Auger /* MSI doorbell address is translated by an IOMMU */ 1013b05c81d2SEric Auger 1014dfa0d9b8SHamza Mahfooz RCU_READ_LOCK_GUARD(); 1015dfa0d9b8SHamza Mahfooz 1016bc6b1cecSPeter Maydell mr = address_space_translate(as, address, &xlat, &len, true, 1017bc6b1cecSPeter Maydell MEMTXATTRS_UNSPECIFIED); 1018dfa0d9b8SHamza Mahfooz 1019b05c81d2SEric Auger if (!mr) { 1020dfa0d9b8SHamza Mahfooz return 1; 1021b05c81d2SEric Auger } 1022dfa0d9b8SHamza Mahfooz 1023b05c81d2SEric Auger mrs = memory_region_find(mr, xlat, 1); 1024dfa0d9b8SHamza Mahfooz 1025b05c81d2SEric Auger if (!mrs.mr) { 1026dfa0d9b8SHamza Mahfooz return 1; 1027b05c81d2SEric Auger } 1028b05c81d2SEric Auger 1029b05c81d2SEric Auger doorbell_gpa = mrs.offset_within_address_space; 1030b05c81d2SEric Auger memory_region_unref(mrs.mr); 1031b05c81d2SEric Auger 1032b05c81d2SEric Auger route->u.msi.address_lo = doorbell_gpa; 1033b05c81d2SEric Auger route->u.msi.address_hi = doorbell_gpa >> 32; 1034b05c81d2SEric Auger 1035b05c81d2SEric Auger trace_kvm_arm_fixup_msi_route(address, doorbell_gpa); 1036b05c81d2SEric Auger 1037dfa0d9b8SHamza Mahfooz return 0; 1038b05c81d2SEric Auger } 1039b05c81d2SEric Auger 1040fcf5ef2aSThomas Huth int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry *route, 1041fcf5ef2aSThomas Huth int vector, PCIDevice *dev) 1042fcf5ef2aSThomas Huth { 1043fcf5ef2aSThomas Huth return 0; 1044fcf5ef2aSThomas Huth } 1045fcf5ef2aSThomas Huth 1046fcf5ef2aSThomas Huth int kvm_arch_release_virq_post(int virq) 1047fcf5ef2aSThomas Huth { 1048fcf5ef2aSThomas Huth return 0; 1049fcf5ef2aSThomas Huth } 1050fcf5ef2aSThomas Huth 1051fcf5ef2aSThomas Huth int kvm_arch_msi_data_to_gsi(uint32_t data) 1052fcf5ef2aSThomas Huth { 1053fcf5ef2aSThomas Huth return (data - 32) & 0xffff; 1054fcf5ef2aSThomas Huth } 105592a5199bSTom Lendacky 105692a5199bSTom Lendacky bool kvm_arch_cpu_check_are_resettable(void) 105792a5199bSTom Lendacky { 105892a5199bSTom Lendacky return true; 105992a5199bSTom Lendacky } 1060