1fcf5ef2aSThomas Huth /* 2fcf5ef2aSThomas Huth * ARM implementation of KVM hooks 3fcf5ef2aSThomas Huth * 4fcf5ef2aSThomas Huth * Copyright Christoffer Dall 2009-2010 5fcf5ef2aSThomas Huth * 6fcf5ef2aSThomas Huth * This work is licensed under the terms of the GNU GPL, version 2 or later. 7fcf5ef2aSThomas Huth * See the COPYING file in the top-level directory. 8fcf5ef2aSThomas Huth * 9fcf5ef2aSThomas Huth */ 10fcf5ef2aSThomas Huth 11fcf5ef2aSThomas Huth #include "qemu/osdep.h" 12fcf5ef2aSThomas Huth #include <sys/ioctl.h> 13fcf5ef2aSThomas Huth 14fcf5ef2aSThomas Huth #include <linux/kvm.h> 15fcf5ef2aSThomas Huth 16fcf5ef2aSThomas Huth #include "qemu-common.h" 17fcf5ef2aSThomas Huth #include "qemu/timer.h" 18fcf5ef2aSThomas Huth #include "qemu/error-report.h" 19fcf5ef2aSThomas Huth #include "sysemu/sysemu.h" 20fcf5ef2aSThomas Huth #include "sysemu/kvm.h" 21fcf5ef2aSThomas Huth #include "kvm_arm.h" 22fcf5ef2aSThomas Huth #include "cpu.h" 23b05c81d2SEric Auger #include "trace.h" 24fcf5ef2aSThomas Huth #include "internals.h" 25fcf5ef2aSThomas Huth #include "hw/arm/arm.h" 26b05c81d2SEric Auger #include "hw/pci/pci.h" 27fcf5ef2aSThomas Huth #include "exec/memattrs.h" 28fcf5ef2aSThomas Huth #include "exec/address-spaces.h" 29fcf5ef2aSThomas Huth #include "hw/boards.h" 30fcf5ef2aSThomas Huth #include "qemu/log.h" 31fcf5ef2aSThomas Huth 32fcf5ef2aSThomas Huth const KVMCapabilityInfo kvm_arch_required_capabilities[] = { 33fcf5ef2aSThomas Huth KVM_CAP_LAST_INFO 34fcf5ef2aSThomas Huth }; 35fcf5ef2aSThomas Huth 36fcf5ef2aSThomas Huth static bool cap_has_mp_state; 37*202ccb6bSDongjiu Geng static bool cap_has_inject_serror_esr; 38fcf5ef2aSThomas Huth 39c4487d76SPeter Maydell static ARMHostCPUFeatures arm_host_cpu_features; 40c4487d76SPeter Maydell 41fcf5ef2aSThomas Huth int kvm_arm_vcpu_init(CPUState *cs) 42fcf5ef2aSThomas Huth { 43fcf5ef2aSThomas Huth ARMCPU *cpu = ARM_CPU(cs); 44fcf5ef2aSThomas Huth struct kvm_vcpu_init init; 45fcf5ef2aSThomas Huth 46fcf5ef2aSThomas Huth init.target = cpu->kvm_target; 47fcf5ef2aSThomas Huth memcpy(init.features, cpu->kvm_init_features, sizeof(init.features)); 48fcf5ef2aSThomas Huth 49fcf5ef2aSThomas Huth return kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_INIT, &init); 50fcf5ef2aSThomas Huth } 51fcf5ef2aSThomas Huth 52*202ccb6bSDongjiu Geng void kvm_arm_init_serror_injection(CPUState *cs) 53*202ccb6bSDongjiu Geng { 54*202ccb6bSDongjiu Geng cap_has_inject_serror_esr = kvm_check_extension(cs->kvm_state, 55*202ccb6bSDongjiu Geng KVM_CAP_ARM_INJECT_SERROR_ESR); 56*202ccb6bSDongjiu Geng } 57*202ccb6bSDongjiu Geng 58fcf5ef2aSThomas Huth bool kvm_arm_create_scratch_host_vcpu(const uint32_t *cpus_to_try, 59fcf5ef2aSThomas Huth int *fdarray, 60fcf5ef2aSThomas Huth struct kvm_vcpu_init *init) 61fcf5ef2aSThomas Huth { 62fcf5ef2aSThomas Huth int ret, kvmfd = -1, vmfd = -1, cpufd = -1; 63fcf5ef2aSThomas Huth 64fcf5ef2aSThomas Huth kvmfd = qemu_open("/dev/kvm", O_RDWR); 65fcf5ef2aSThomas Huth if (kvmfd < 0) { 66fcf5ef2aSThomas Huth goto err; 67fcf5ef2aSThomas Huth } 68fcf5ef2aSThomas Huth vmfd = ioctl(kvmfd, KVM_CREATE_VM, 0); 69fcf5ef2aSThomas Huth if (vmfd < 0) { 70fcf5ef2aSThomas Huth goto err; 71fcf5ef2aSThomas Huth } 72fcf5ef2aSThomas Huth cpufd = ioctl(vmfd, KVM_CREATE_VCPU, 0); 73fcf5ef2aSThomas Huth if (cpufd < 0) { 74fcf5ef2aSThomas Huth goto err; 75fcf5ef2aSThomas Huth } 76fcf5ef2aSThomas Huth 77fcf5ef2aSThomas Huth if (!init) { 78fcf5ef2aSThomas Huth /* Caller doesn't want the VCPU to be initialized, so skip it */ 79fcf5ef2aSThomas Huth goto finish; 80fcf5ef2aSThomas Huth } 81fcf5ef2aSThomas Huth 82fcf5ef2aSThomas Huth ret = ioctl(vmfd, KVM_ARM_PREFERRED_TARGET, init); 83fcf5ef2aSThomas Huth if (ret >= 0) { 84fcf5ef2aSThomas Huth ret = ioctl(cpufd, KVM_ARM_VCPU_INIT, init); 85fcf5ef2aSThomas Huth if (ret < 0) { 86fcf5ef2aSThomas Huth goto err; 87fcf5ef2aSThomas Huth } 88fcf5ef2aSThomas Huth } else if (cpus_to_try) { 89fcf5ef2aSThomas Huth /* Old kernel which doesn't know about the 90fcf5ef2aSThomas Huth * PREFERRED_TARGET ioctl: we know it will only support 91fcf5ef2aSThomas Huth * creating one kind of guest CPU which is its preferred 92fcf5ef2aSThomas Huth * CPU type. 93fcf5ef2aSThomas Huth */ 94fcf5ef2aSThomas Huth while (*cpus_to_try != QEMU_KVM_ARM_TARGET_NONE) { 95fcf5ef2aSThomas Huth init->target = *cpus_to_try++; 96fcf5ef2aSThomas Huth memset(init->features, 0, sizeof(init->features)); 97fcf5ef2aSThomas Huth ret = ioctl(cpufd, KVM_ARM_VCPU_INIT, init); 98fcf5ef2aSThomas Huth if (ret >= 0) { 99fcf5ef2aSThomas Huth break; 100fcf5ef2aSThomas Huth } 101fcf5ef2aSThomas Huth } 102fcf5ef2aSThomas Huth if (ret < 0) { 103fcf5ef2aSThomas Huth goto err; 104fcf5ef2aSThomas Huth } 105fcf5ef2aSThomas Huth } else { 106fcf5ef2aSThomas Huth /* Treat a NULL cpus_to_try argument the same as an empty 107fcf5ef2aSThomas Huth * list, which means we will fail the call since this must 108fcf5ef2aSThomas Huth * be an old kernel which doesn't support PREFERRED_TARGET. 109fcf5ef2aSThomas Huth */ 110fcf5ef2aSThomas Huth goto err; 111fcf5ef2aSThomas Huth } 112fcf5ef2aSThomas Huth 113fcf5ef2aSThomas Huth finish: 114fcf5ef2aSThomas Huth fdarray[0] = kvmfd; 115fcf5ef2aSThomas Huth fdarray[1] = vmfd; 116fcf5ef2aSThomas Huth fdarray[2] = cpufd; 117fcf5ef2aSThomas Huth 118fcf5ef2aSThomas Huth return true; 119fcf5ef2aSThomas Huth 120fcf5ef2aSThomas Huth err: 121fcf5ef2aSThomas Huth if (cpufd >= 0) { 122fcf5ef2aSThomas Huth close(cpufd); 123fcf5ef2aSThomas Huth } 124fcf5ef2aSThomas Huth if (vmfd >= 0) { 125fcf5ef2aSThomas Huth close(vmfd); 126fcf5ef2aSThomas Huth } 127fcf5ef2aSThomas Huth if (kvmfd >= 0) { 128fcf5ef2aSThomas Huth close(kvmfd); 129fcf5ef2aSThomas Huth } 130fcf5ef2aSThomas Huth 131fcf5ef2aSThomas Huth return false; 132fcf5ef2aSThomas Huth } 133fcf5ef2aSThomas Huth 134fcf5ef2aSThomas Huth void kvm_arm_destroy_scratch_host_vcpu(int *fdarray) 135fcf5ef2aSThomas Huth { 136fcf5ef2aSThomas Huth int i; 137fcf5ef2aSThomas Huth 138fcf5ef2aSThomas Huth for (i = 2; i >= 0; i--) { 139fcf5ef2aSThomas Huth close(fdarray[i]); 140fcf5ef2aSThomas Huth } 141fcf5ef2aSThomas Huth } 142fcf5ef2aSThomas Huth 143c4487d76SPeter Maydell void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu) 144fcf5ef2aSThomas Huth { 145c4487d76SPeter Maydell CPUARMState *env = &cpu->env; 146fcf5ef2aSThomas Huth 147c4487d76SPeter Maydell if (!arm_host_cpu_features.dtb_compatible) { 148c4487d76SPeter Maydell if (!kvm_enabled() || 149c4487d76SPeter Maydell !kvm_arm_get_host_cpu_features(&arm_host_cpu_features)) { 150c4487d76SPeter Maydell /* We can't report this error yet, so flag that we need to 151c4487d76SPeter Maydell * in arm_cpu_realizefn(). 152fcf5ef2aSThomas Huth */ 153c4487d76SPeter Maydell cpu->kvm_target = QEMU_KVM_ARM_TARGET_NONE; 154c4487d76SPeter Maydell cpu->host_cpu_probe_failed = true; 155c4487d76SPeter Maydell return; 156fcf5ef2aSThomas Huth } 157fcf5ef2aSThomas Huth } 158fcf5ef2aSThomas Huth 159c4487d76SPeter Maydell cpu->kvm_target = arm_host_cpu_features.target; 160c4487d76SPeter Maydell cpu->dtb_compatible = arm_host_cpu_features.dtb_compatible; 161c4487d76SPeter Maydell env->features = arm_host_cpu_features.features; 162c4487d76SPeter Maydell } 163c4487d76SPeter Maydell 164fcf5ef2aSThomas Huth int kvm_arch_init(MachineState *ms, KVMState *s) 165fcf5ef2aSThomas Huth { 166fcf5ef2aSThomas Huth /* For ARM interrupt delivery is always asynchronous, 167fcf5ef2aSThomas Huth * whether we are using an in-kernel VGIC or not. 168fcf5ef2aSThomas Huth */ 169fcf5ef2aSThomas Huth kvm_async_interrupts_allowed = true; 170fcf5ef2aSThomas Huth 1715d721b78SAlexander Graf /* 1725d721b78SAlexander Graf * PSCI wakes up secondary cores, so we always need to 1735d721b78SAlexander Graf * have vCPUs waiting in kernel space 1745d721b78SAlexander Graf */ 1755d721b78SAlexander Graf kvm_halt_in_kernel_allowed = true; 1765d721b78SAlexander Graf 177fcf5ef2aSThomas Huth cap_has_mp_state = kvm_check_extension(s, KVM_CAP_MP_STATE); 178fcf5ef2aSThomas Huth 179fcf5ef2aSThomas Huth return 0; 180fcf5ef2aSThomas Huth } 181fcf5ef2aSThomas Huth 182fcf5ef2aSThomas Huth unsigned long kvm_arch_vcpu_id(CPUState *cpu) 183fcf5ef2aSThomas Huth { 184fcf5ef2aSThomas Huth return cpu->cpu_index; 185fcf5ef2aSThomas Huth } 186fcf5ef2aSThomas Huth 187fcf5ef2aSThomas Huth /* We track all the KVM devices which need their memory addresses 188fcf5ef2aSThomas Huth * passing to the kernel in a list of these structures. 189fcf5ef2aSThomas Huth * When board init is complete we run through the list and 190fcf5ef2aSThomas Huth * tell the kernel the base addresses of the memory regions. 191fcf5ef2aSThomas Huth * We use a MemoryListener to track mapping and unmapping of 192fcf5ef2aSThomas Huth * the regions during board creation, so the board models don't 193fcf5ef2aSThomas Huth * need to do anything special for the KVM case. 19419d1bd0bSEric Auger * 19519d1bd0bSEric Auger * Sometimes the address must be OR'ed with some other fields 19619d1bd0bSEric Auger * (for example for KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION). 19719d1bd0bSEric Auger * @kda_addr_ormask aims at storing the value of those fields. 198fcf5ef2aSThomas Huth */ 199fcf5ef2aSThomas Huth typedef struct KVMDevice { 200fcf5ef2aSThomas Huth struct kvm_arm_device_addr kda; 201fcf5ef2aSThomas Huth struct kvm_device_attr kdattr; 20219d1bd0bSEric Auger uint64_t kda_addr_ormask; 203fcf5ef2aSThomas Huth MemoryRegion *mr; 204fcf5ef2aSThomas Huth QSLIST_ENTRY(KVMDevice) entries; 205fcf5ef2aSThomas Huth int dev_fd; 206fcf5ef2aSThomas Huth } KVMDevice; 207fcf5ef2aSThomas Huth 208fcf5ef2aSThomas Huth static QSLIST_HEAD(kvm_devices_head, KVMDevice) kvm_devices_head; 209fcf5ef2aSThomas Huth 210fcf5ef2aSThomas Huth static void kvm_arm_devlistener_add(MemoryListener *listener, 211fcf5ef2aSThomas Huth MemoryRegionSection *section) 212fcf5ef2aSThomas Huth { 213fcf5ef2aSThomas Huth KVMDevice *kd; 214fcf5ef2aSThomas Huth 215fcf5ef2aSThomas Huth QSLIST_FOREACH(kd, &kvm_devices_head, entries) { 216fcf5ef2aSThomas Huth if (section->mr == kd->mr) { 217fcf5ef2aSThomas Huth kd->kda.addr = section->offset_within_address_space; 218fcf5ef2aSThomas Huth } 219fcf5ef2aSThomas Huth } 220fcf5ef2aSThomas Huth } 221fcf5ef2aSThomas Huth 222fcf5ef2aSThomas Huth static void kvm_arm_devlistener_del(MemoryListener *listener, 223fcf5ef2aSThomas Huth MemoryRegionSection *section) 224fcf5ef2aSThomas Huth { 225fcf5ef2aSThomas Huth KVMDevice *kd; 226fcf5ef2aSThomas Huth 227fcf5ef2aSThomas Huth QSLIST_FOREACH(kd, &kvm_devices_head, entries) { 228fcf5ef2aSThomas Huth if (section->mr == kd->mr) { 229fcf5ef2aSThomas Huth kd->kda.addr = -1; 230fcf5ef2aSThomas Huth } 231fcf5ef2aSThomas Huth } 232fcf5ef2aSThomas Huth } 233fcf5ef2aSThomas Huth 234fcf5ef2aSThomas Huth static MemoryListener devlistener = { 235fcf5ef2aSThomas Huth .region_add = kvm_arm_devlistener_add, 236fcf5ef2aSThomas Huth .region_del = kvm_arm_devlistener_del, 237fcf5ef2aSThomas Huth }; 238fcf5ef2aSThomas Huth 239fcf5ef2aSThomas Huth static void kvm_arm_set_device_addr(KVMDevice *kd) 240fcf5ef2aSThomas Huth { 241fcf5ef2aSThomas Huth struct kvm_device_attr *attr = &kd->kdattr; 242fcf5ef2aSThomas Huth int ret; 243fcf5ef2aSThomas Huth 244fcf5ef2aSThomas Huth /* If the device control API is available and we have a device fd on the 245fcf5ef2aSThomas Huth * KVMDevice struct, let's use the newer API 246fcf5ef2aSThomas Huth */ 247fcf5ef2aSThomas Huth if (kd->dev_fd >= 0) { 248fcf5ef2aSThomas Huth uint64_t addr = kd->kda.addr; 24919d1bd0bSEric Auger 25019d1bd0bSEric Auger addr |= kd->kda_addr_ormask; 251fcf5ef2aSThomas Huth attr->addr = (uintptr_t)&addr; 252fcf5ef2aSThomas Huth ret = kvm_device_ioctl(kd->dev_fd, KVM_SET_DEVICE_ATTR, attr); 253fcf5ef2aSThomas Huth } else { 254fcf5ef2aSThomas Huth ret = kvm_vm_ioctl(kvm_state, KVM_ARM_SET_DEVICE_ADDR, &kd->kda); 255fcf5ef2aSThomas Huth } 256fcf5ef2aSThomas Huth 257fcf5ef2aSThomas Huth if (ret < 0) { 258fcf5ef2aSThomas Huth fprintf(stderr, "Failed to set device address: %s\n", 259fcf5ef2aSThomas Huth strerror(-ret)); 260fcf5ef2aSThomas Huth abort(); 261fcf5ef2aSThomas Huth } 262fcf5ef2aSThomas Huth } 263fcf5ef2aSThomas Huth 264fcf5ef2aSThomas Huth static void kvm_arm_machine_init_done(Notifier *notifier, void *data) 265fcf5ef2aSThomas Huth { 266fcf5ef2aSThomas Huth KVMDevice *kd, *tkd; 267fcf5ef2aSThomas Huth 268fcf5ef2aSThomas Huth QSLIST_FOREACH_SAFE(kd, &kvm_devices_head, entries, tkd) { 269fcf5ef2aSThomas Huth if (kd->kda.addr != -1) { 270fcf5ef2aSThomas Huth kvm_arm_set_device_addr(kd); 271fcf5ef2aSThomas Huth } 272fcf5ef2aSThomas Huth memory_region_unref(kd->mr); 2735ff9aaabSZheng Xiang QSLIST_REMOVE_HEAD(&kvm_devices_head, entries); 274fcf5ef2aSThomas Huth g_free(kd); 275fcf5ef2aSThomas Huth } 2760bbe4354SPeter Xu memory_listener_unregister(&devlistener); 277fcf5ef2aSThomas Huth } 278fcf5ef2aSThomas Huth 279fcf5ef2aSThomas Huth static Notifier notify = { 280fcf5ef2aSThomas Huth .notify = kvm_arm_machine_init_done, 281fcf5ef2aSThomas Huth }; 282fcf5ef2aSThomas Huth 283fcf5ef2aSThomas Huth void kvm_arm_register_device(MemoryRegion *mr, uint64_t devid, uint64_t group, 28419d1bd0bSEric Auger uint64_t attr, int dev_fd, uint64_t addr_ormask) 285fcf5ef2aSThomas Huth { 286fcf5ef2aSThomas Huth KVMDevice *kd; 287fcf5ef2aSThomas Huth 288fcf5ef2aSThomas Huth if (!kvm_irqchip_in_kernel()) { 289fcf5ef2aSThomas Huth return; 290fcf5ef2aSThomas Huth } 291fcf5ef2aSThomas Huth 292fcf5ef2aSThomas Huth if (QSLIST_EMPTY(&kvm_devices_head)) { 293fcf5ef2aSThomas Huth memory_listener_register(&devlistener, &address_space_memory); 294fcf5ef2aSThomas Huth qemu_add_machine_init_done_notifier(¬ify); 295fcf5ef2aSThomas Huth } 296fcf5ef2aSThomas Huth kd = g_new0(KVMDevice, 1); 297fcf5ef2aSThomas Huth kd->mr = mr; 298fcf5ef2aSThomas Huth kd->kda.id = devid; 299fcf5ef2aSThomas Huth kd->kda.addr = -1; 300fcf5ef2aSThomas Huth kd->kdattr.flags = 0; 301fcf5ef2aSThomas Huth kd->kdattr.group = group; 302fcf5ef2aSThomas Huth kd->kdattr.attr = attr; 303fcf5ef2aSThomas Huth kd->dev_fd = dev_fd; 30419d1bd0bSEric Auger kd->kda_addr_ormask = addr_ormask; 305fcf5ef2aSThomas Huth QSLIST_INSERT_HEAD(&kvm_devices_head, kd, entries); 306fcf5ef2aSThomas Huth memory_region_ref(kd->mr); 307fcf5ef2aSThomas Huth } 308fcf5ef2aSThomas Huth 309fcf5ef2aSThomas Huth static int compare_u64(const void *a, const void *b) 310fcf5ef2aSThomas Huth { 311fcf5ef2aSThomas Huth if (*(uint64_t *)a > *(uint64_t *)b) { 312fcf5ef2aSThomas Huth return 1; 313fcf5ef2aSThomas Huth } 314fcf5ef2aSThomas Huth if (*(uint64_t *)a < *(uint64_t *)b) { 315fcf5ef2aSThomas Huth return -1; 316fcf5ef2aSThomas Huth } 317fcf5ef2aSThomas Huth return 0; 318fcf5ef2aSThomas Huth } 319fcf5ef2aSThomas Huth 320c8a44709SDongjiu Geng /* Initialize the ARMCPU cpreg list according to the kernel's 321fcf5ef2aSThomas Huth * definition of what CPU registers it knows about (and throw away 322fcf5ef2aSThomas Huth * the previous TCG-created cpreg list). 323fcf5ef2aSThomas Huth */ 324fcf5ef2aSThomas Huth int kvm_arm_init_cpreg_list(ARMCPU *cpu) 325fcf5ef2aSThomas Huth { 326fcf5ef2aSThomas Huth struct kvm_reg_list rl; 327fcf5ef2aSThomas Huth struct kvm_reg_list *rlp; 328fcf5ef2aSThomas Huth int i, ret, arraylen; 329fcf5ef2aSThomas Huth CPUState *cs = CPU(cpu); 330fcf5ef2aSThomas Huth 331fcf5ef2aSThomas Huth rl.n = 0; 332fcf5ef2aSThomas Huth ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, &rl); 333fcf5ef2aSThomas Huth if (ret != -E2BIG) { 334fcf5ef2aSThomas Huth return ret; 335fcf5ef2aSThomas Huth } 336fcf5ef2aSThomas Huth rlp = g_malloc(sizeof(struct kvm_reg_list) + rl.n * sizeof(uint64_t)); 337fcf5ef2aSThomas Huth rlp->n = rl.n; 338fcf5ef2aSThomas Huth ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, rlp); 339fcf5ef2aSThomas Huth if (ret) { 340fcf5ef2aSThomas Huth goto out; 341fcf5ef2aSThomas Huth } 342fcf5ef2aSThomas Huth /* Sort the list we get back from the kernel, since cpreg_tuples 343fcf5ef2aSThomas Huth * must be in strictly ascending order. 344fcf5ef2aSThomas Huth */ 345fcf5ef2aSThomas Huth qsort(&rlp->reg, rlp->n, sizeof(rlp->reg[0]), compare_u64); 346fcf5ef2aSThomas Huth 347fcf5ef2aSThomas Huth for (i = 0, arraylen = 0; i < rlp->n; i++) { 348fcf5ef2aSThomas Huth if (!kvm_arm_reg_syncs_via_cpreg_list(rlp->reg[i])) { 349fcf5ef2aSThomas Huth continue; 350fcf5ef2aSThomas Huth } 351fcf5ef2aSThomas Huth switch (rlp->reg[i] & KVM_REG_SIZE_MASK) { 352fcf5ef2aSThomas Huth case KVM_REG_SIZE_U32: 353fcf5ef2aSThomas Huth case KVM_REG_SIZE_U64: 354fcf5ef2aSThomas Huth break; 355fcf5ef2aSThomas Huth default: 356fcf5ef2aSThomas Huth fprintf(stderr, "Can't handle size of register in kernel list\n"); 357fcf5ef2aSThomas Huth ret = -EINVAL; 358fcf5ef2aSThomas Huth goto out; 359fcf5ef2aSThomas Huth } 360fcf5ef2aSThomas Huth 361fcf5ef2aSThomas Huth arraylen++; 362fcf5ef2aSThomas Huth } 363fcf5ef2aSThomas Huth 364fcf5ef2aSThomas Huth cpu->cpreg_indexes = g_renew(uint64_t, cpu->cpreg_indexes, arraylen); 365fcf5ef2aSThomas Huth cpu->cpreg_values = g_renew(uint64_t, cpu->cpreg_values, arraylen); 366fcf5ef2aSThomas Huth cpu->cpreg_vmstate_indexes = g_renew(uint64_t, cpu->cpreg_vmstate_indexes, 367fcf5ef2aSThomas Huth arraylen); 368fcf5ef2aSThomas Huth cpu->cpreg_vmstate_values = g_renew(uint64_t, cpu->cpreg_vmstate_values, 369fcf5ef2aSThomas Huth arraylen); 370fcf5ef2aSThomas Huth cpu->cpreg_array_len = arraylen; 371fcf5ef2aSThomas Huth cpu->cpreg_vmstate_array_len = arraylen; 372fcf5ef2aSThomas Huth 373fcf5ef2aSThomas Huth for (i = 0, arraylen = 0; i < rlp->n; i++) { 374fcf5ef2aSThomas Huth uint64_t regidx = rlp->reg[i]; 375fcf5ef2aSThomas Huth if (!kvm_arm_reg_syncs_via_cpreg_list(regidx)) { 376fcf5ef2aSThomas Huth continue; 377fcf5ef2aSThomas Huth } 378fcf5ef2aSThomas Huth cpu->cpreg_indexes[arraylen] = regidx; 379fcf5ef2aSThomas Huth arraylen++; 380fcf5ef2aSThomas Huth } 381fcf5ef2aSThomas Huth assert(cpu->cpreg_array_len == arraylen); 382fcf5ef2aSThomas Huth 383fcf5ef2aSThomas Huth if (!write_kvmstate_to_list(cpu)) { 384fcf5ef2aSThomas Huth /* Shouldn't happen unless kernel is inconsistent about 385fcf5ef2aSThomas Huth * what registers exist. 386fcf5ef2aSThomas Huth */ 387fcf5ef2aSThomas Huth fprintf(stderr, "Initial read of kernel register state failed\n"); 388fcf5ef2aSThomas Huth ret = -EINVAL; 389fcf5ef2aSThomas Huth goto out; 390fcf5ef2aSThomas Huth } 391fcf5ef2aSThomas Huth 392fcf5ef2aSThomas Huth out: 393fcf5ef2aSThomas Huth g_free(rlp); 394fcf5ef2aSThomas Huth return ret; 395fcf5ef2aSThomas Huth } 396fcf5ef2aSThomas Huth 397fcf5ef2aSThomas Huth bool write_kvmstate_to_list(ARMCPU *cpu) 398fcf5ef2aSThomas Huth { 399fcf5ef2aSThomas Huth CPUState *cs = CPU(cpu); 400fcf5ef2aSThomas Huth int i; 401fcf5ef2aSThomas Huth bool ok = true; 402fcf5ef2aSThomas Huth 403fcf5ef2aSThomas Huth for (i = 0; i < cpu->cpreg_array_len; i++) { 404fcf5ef2aSThomas Huth struct kvm_one_reg r; 405fcf5ef2aSThomas Huth uint64_t regidx = cpu->cpreg_indexes[i]; 406fcf5ef2aSThomas Huth uint32_t v32; 407fcf5ef2aSThomas Huth int ret; 408fcf5ef2aSThomas Huth 409fcf5ef2aSThomas Huth r.id = regidx; 410fcf5ef2aSThomas Huth 411fcf5ef2aSThomas Huth switch (regidx & KVM_REG_SIZE_MASK) { 412fcf5ef2aSThomas Huth case KVM_REG_SIZE_U32: 413fcf5ef2aSThomas Huth r.addr = (uintptr_t)&v32; 414fcf5ef2aSThomas Huth ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r); 415fcf5ef2aSThomas Huth if (!ret) { 416fcf5ef2aSThomas Huth cpu->cpreg_values[i] = v32; 417fcf5ef2aSThomas Huth } 418fcf5ef2aSThomas Huth break; 419fcf5ef2aSThomas Huth case KVM_REG_SIZE_U64: 420fcf5ef2aSThomas Huth r.addr = (uintptr_t)(cpu->cpreg_values + i); 421fcf5ef2aSThomas Huth ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r); 422fcf5ef2aSThomas Huth break; 423fcf5ef2aSThomas Huth default: 424fcf5ef2aSThomas Huth abort(); 425fcf5ef2aSThomas Huth } 426fcf5ef2aSThomas Huth if (ret) { 427fcf5ef2aSThomas Huth ok = false; 428fcf5ef2aSThomas Huth } 429fcf5ef2aSThomas Huth } 430fcf5ef2aSThomas Huth return ok; 431fcf5ef2aSThomas Huth } 432fcf5ef2aSThomas Huth 433fcf5ef2aSThomas Huth bool write_list_to_kvmstate(ARMCPU *cpu, int level) 434fcf5ef2aSThomas Huth { 435fcf5ef2aSThomas Huth CPUState *cs = CPU(cpu); 436fcf5ef2aSThomas Huth int i; 437fcf5ef2aSThomas Huth bool ok = true; 438fcf5ef2aSThomas Huth 439fcf5ef2aSThomas Huth for (i = 0; i < cpu->cpreg_array_len; i++) { 440fcf5ef2aSThomas Huth struct kvm_one_reg r; 441fcf5ef2aSThomas Huth uint64_t regidx = cpu->cpreg_indexes[i]; 442fcf5ef2aSThomas Huth uint32_t v32; 443fcf5ef2aSThomas Huth int ret; 444fcf5ef2aSThomas Huth 445fcf5ef2aSThomas Huth if (kvm_arm_cpreg_level(regidx) > level) { 446fcf5ef2aSThomas Huth continue; 447fcf5ef2aSThomas Huth } 448fcf5ef2aSThomas Huth 449fcf5ef2aSThomas Huth r.id = regidx; 450fcf5ef2aSThomas Huth switch (regidx & KVM_REG_SIZE_MASK) { 451fcf5ef2aSThomas Huth case KVM_REG_SIZE_U32: 452fcf5ef2aSThomas Huth v32 = cpu->cpreg_values[i]; 453fcf5ef2aSThomas Huth r.addr = (uintptr_t)&v32; 454fcf5ef2aSThomas Huth break; 455fcf5ef2aSThomas Huth case KVM_REG_SIZE_U64: 456fcf5ef2aSThomas Huth r.addr = (uintptr_t)(cpu->cpreg_values + i); 457fcf5ef2aSThomas Huth break; 458fcf5ef2aSThomas Huth default: 459fcf5ef2aSThomas Huth abort(); 460fcf5ef2aSThomas Huth } 461fcf5ef2aSThomas Huth ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &r); 462fcf5ef2aSThomas Huth if (ret) { 463fcf5ef2aSThomas Huth /* We might fail for "unknown register" and also for 464fcf5ef2aSThomas Huth * "you tried to set a register which is constant with 465fcf5ef2aSThomas Huth * a different value from what it actually contains". 466fcf5ef2aSThomas Huth */ 467fcf5ef2aSThomas Huth ok = false; 468fcf5ef2aSThomas Huth } 469fcf5ef2aSThomas Huth } 470fcf5ef2aSThomas Huth return ok; 471fcf5ef2aSThomas Huth } 472fcf5ef2aSThomas Huth 473fcf5ef2aSThomas Huth void kvm_arm_reset_vcpu(ARMCPU *cpu) 474fcf5ef2aSThomas Huth { 475fcf5ef2aSThomas Huth int ret; 476fcf5ef2aSThomas Huth 477fcf5ef2aSThomas Huth /* Re-init VCPU so that all registers are set to 478fcf5ef2aSThomas Huth * their respective reset values. 479fcf5ef2aSThomas Huth */ 480fcf5ef2aSThomas Huth ret = kvm_arm_vcpu_init(CPU(cpu)); 481fcf5ef2aSThomas Huth if (ret < 0) { 482fcf5ef2aSThomas Huth fprintf(stderr, "kvm_arm_vcpu_init failed: %s\n", strerror(-ret)); 483fcf5ef2aSThomas Huth abort(); 484fcf5ef2aSThomas Huth } 485fcf5ef2aSThomas Huth if (!write_kvmstate_to_list(cpu)) { 486fcf5ef2aSThomas Huth fprintf(stderr, "write_kvmstate_to_list failed\n"); 487fcf5ef2aSThomas Huth abort(); 488fcf5ef2aSThomas Huth } 489fcf5ef2aSThomas Huth } 490fcf5ef2aSThomas Huth 491fcf5ef2aSThomas Huth /* 492fcf5ef2aSThomas Huth * Update KVM's MP_STATE based on what QEMU thinks it is 493fcf5ef2aSThomas Huth */ 494fcf5ef2aSThomas Huth int kvm_arm_sync_mpstate_to_kvm(ARMCPU *cpu) 495fcf5ef2aSThomas Huth { 496fcf5ef2aSThomas Huth if (cap_has_mp_state) { 497fcf5ef2aSThomas Huth struct kvm_mp_state mp_state = { 498062ba099SAlex Bennée .mp_state = (cpu->power_state == PSCI_OFF) ? 499062ba099SAlex Bennée KVM_MP_STATE_STOPPED : KVM_MP_STATE_RUNNABLE 500fcf5ef2aSThomas Huth }; 501fcf5ef2aSThomas Huth int ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_MP_STATE, &mp_state); 502fcf5ef2aSThomas Huth if (ret) { 503fcf5ef2aSThomas Huth fprintf(stderr, "%s: failed to set MP_STATE %d/%s\n", 504fcf5ef2aSThomas Huth __func__, ret, strerror(-ret)); 505fcf5ef2aSThomas Huth return -1; 506fcf5ef2aSThomas Huth } 507fcf5ef2aSThomas Huth } 508fcf5ef2aSThomas Huth 509fcf5ef2aSThomas Huth return 0; 510fcf5ef2aSThomas Huth } 511fcf5ef2aSThomas Huth 512fcf5ef2aSThomas Huth /* 513fcf5ef2aSThomas Huth * Sync the KVM MP_STATE into QEMU 514fcf5ef2aSThomas Huth */ 515fcf5ef2aSThomas Huth int kvm_arm_sync_mpstate_to_qemu(ARMCPU *cpu) 516fcf5ef2aSThomas Huth { 517fcf5ef2aSThomas Huth if (cap_has_mp_state) { 518fcf5ef2aSThomas Huth struct kvm_mp_state mp_state; 519fcf5ef2aSThomas Huth int ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_MP_STATE, &mp_state); 520fcf5ef2aSThomas Huth if (ret) { 521fcf5ef2aSThomas Huth fprintf(stderr, "%s: failed to get MP_STATE %d/%s\n", 522fcf5ef2aSThomas Huth __func__, ret, strerror(-ret)); 523fcf5ef2aSThomas Huth abort(); 524fcf5ef2aSThomas Huth } 525062ba099SAlex Bennée cpu->power_state = (mp_state.mp_state == KVM_MP_STATE_STOPPED) ? 526062ba099SAlex Bennée PSCI_OFF : PSCI_ON; 527fcf5ef2aSThomas Huth } 528fcf5ef2aSThomas Huth 529fcf5ef2aSThomas Huth return 0; 530fcf5ef2aSThomas Huth } 531fcf5ef2aSThomas Huth 532*202ccb6bSDongjiu Geng int kvm_put_vcpu_events(ARMCPU *cpu) 533*202ccb6bSDongjiu Geng { 534*202ccb6bSDongjiu Geng CPUARMState *env = &cpu->env; 535*202ccb6bSDongjiu Geng struct kvm_vcpu_events events; 536*202ccb6bSDongjiu Geng int ret; 537*202ccb6bSDongjiu Geng 538*202ccb6bSDongjiu Geng if (!kvm_has_vcpu_events()) { 539*202ccb6bSDongjiu Geng return 0; 540*202ccb6bSDongjiu Geng } 541*202ccb6bSDongjiu Geng 542*202ccb6bSDongjiu Geng memset(&events, 0, sizeof(events)); 543*202ccb6bSDongjiu Geng events.exception.serror_pending = env->serror.pending; 544*202ccb6bSDongjiu Geng 545*202ccb6bSDongjiu Geng /* Inject SError to guest with specified syndrome if host kernel 546*202ccb6bSDongjiu Geng * supports it, otherwise inject SError without syndrome. 547*202ccb6bSDongjiu Geng */ 548*202ccb6bSDongjiu Geng if (cap_has_inject_serror_esr) { 549*202ccb6bSDongjiu Geng events.exception.serror_has_esr = env->serror.has_esr; 550*202ccb6bSDongjiu Geng events.exception.serror_esr = env->serror.esr; 551*202ccb6bSDongjiu Geng } 552*202ccb6bSDongjiu Geng 553*202ccb6bSDongjiu Geng ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_VCPU_EVENTS, &events); 554*202ccb6bSDongjiu Geng if (ret) { 555*202ccb6bSDongjiu Geng error_report("failed to put vcpu events"); 556*202ccb6bSDongjiu Geng } 557*202ccb6bSDongjiu Geng 558*202ccb6bSDongjiu Geng return ret; 559*202ccb6bSDongjiu Geng } 560*202ccb6bSDongjiu Geng 561*202ccb6bSDongjiu Geng int kvm_get_vcpu_events(ARMCPU *cpu) 562*202ccb6bSDongjiu Geng { 563*202ccb6bSDongjiu Geng CPUARMState *env = &cpu->env; 564*202ccb6bSDongjiu Geng struct kvm_vcpu_events events; 565*202ccb6bSDongjiu Geng int ret; 566*202ccb6bSDongjiu Geng 567*202ccb6bSDongjiu Geng if (!kvm_has_vcpu_events()) { 568*202ccb6bSDongjiu Geng return 0; 569*202ccb6bSDongjiu Geng } 570*202ccb6bSDongjiu Geng 571*202ccb6bSDongjiu Geng memset(&events, 0, sizeof(events)); 572*202ccb6bSDongjiu Geng ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_VCPU_EVENTS, &events); 573*202ccb6bSDongjiu Geng if (ret) { 574*202ccb6bSDongjiu Geng error_report("failed to get vcpu events"); 575*202ccb6bSDongjiu Geng return ret; 576*202ccb6bSDongjiu Geng } 577*202ccb6bSDongjiu Geng 578*202ccb6bSDongjiu Geng env->serror.pending = events.exception.serror_pending; 579*202ccb6bSDongjiu Geng env->serror.has_esr = events.exception.serror_has_esr; 580*202ccb6bSDongjiu Geng env->serror.esr = events.exception.serror_esr; 581*202ccb6bSDongjiu Geng 582*202ccb6bSDongjiu Geng return 0; 583*202ccb6bSDongjiu Geng } 584*202ccb6bSDongjiu Geng 585fcf5ef2aSThomas Huth void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run) 586fcf5ef2aSThomas Huth { 587fcf5ef2aSThomas Huth } 588fcf5ef2aSThomas Huth 589fcf5ef2aSThomas Huth MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *run) 590fcf5ef2aSThomas Huth { 5915d721b78SAlexander Graf ARMCPU *cpu; 5925d721b78SAlexander Graf uint32_t switched_level; 5935d721b78SAlexander Graf 5945d721b78SAlexander Graf if (kvm_irqchip_in_kernel()) { 5955d721b78SAlexander Graf /* 5965d721b78SAlexander Graf * We only need to sync timer states with user-space interrupt 5975d721b78SAlexander Graf * controllers, so return early and save cycles if we don't. 5985d721b78SAlexander Graf */ 5995d721b78SAlexander Graf return MEMTXATTRS_UNSPECIFIED; 6005d721b78SAlexander Graf } 6015d721b78SAlexander Graf 6025d721b78SAlexander Graf cpu = ARM_CPU(cs); 6035d721b78SAlexander Graf 6045d721b78SAlexander Graf /* Synchronize our shadowed in-kernel device irq lines with the kvm ones */ 6055d721b78SAlexander Graf if (run->s.regs.device_irq_level != cpu->device_irq_level) { 6065d721b78SAlexander Graf switched_level = cpu->device_irq_level ^ run->s.regs.device_irq_level; 6075d721b78SAlexander Graf 6085d721b78SAlexander Graf qemu_mutex_lock_iothread(); 6095d721b78SAlexander Graf 6105d721b78SAlexander Graf if (switched_level & KVM_ARM_DEV_EL1_VTIMER) { 6115d721b78SAlexander Graf qemu_set_irq(cpu->gt_timer_outputs[GTIMER_VIRT], 6125d721b78SAlexander Graf !!(run->s.regs.device_irq_level & 6135d721b78SAlexander Graf KVM_ARM_DEV_EL1_VTIMER)); 6145d721b78SAlexander Graf switched_level &= ~KVM_ARM_DEV_EL1_VTIMER; 6155d721b78SAlexander Graf } 6165d721b78SAlexander Graf 6175d721b78SAlexander Graf if (switched_level & KVM_ARM_DEV_EL1_PTIMER) { 6185d721b78SAlexander Graf qemu_set_irq(cpu->gt_timer_outputs[GTIMER_PHYS], 6195d721b78SAlexander Graf !!(run->s.regs.device_irq_level & 6205d721b78SAlexander Graf KVM_ARM_DEV_EL1_PTIMER)); 6215d721b78SAlexander Graf switched_level &= ~KVM_ARM_DEV_EL1_PTIMER; 6225d721b78SAlexander Graf } 6235d721b78SAlexander Graf 624b1659527SAndrew Jones if (switched_level & KVM_ARM_DEV_PMU) { 625b1659527SAndrew Jones qemu_set_irq(cpu->pmu_interrupt, 626b1659527SAndrew Jones !!(run->s.regs.device_irq_level & KVM_ARM_DEV_PMU)); 627b1659527SAndrew Jones switched_level &= ~KVM_ARM_DEV_PMU; 628b1659527SAndrew Jones } 6295d721b78SAlexander Graf 6305d721b78SAlexander Graf if (switched_level) { 6315d721b78SAlexander Graf qemu_log_mask(LOG_UNIMP, "%s: unhandled in-kernel device IRQ %x\n", 6325d721b78SAlexander Graf __func__, switched_level); 6335d721b78SAlexander Graf } 6345d721b78SAlexander Graf 6355d721b78SAlexander Graf /* We also mark unknown levels as processed to not waste cycles */ 6365d721b78SAlexander Graf cpu->device_irq_level = run->s.regs.device_irq_level; 6375d721b78SAlexander Graf qemu_mutex_unlock_iothread(); 6385d721b78SAlexander Graf } 6395d721b78SAlexander Graf 640fcf5ef2aSThomas Huth return MEMTXATTRS_UNSPECIFIED; 641fcf5ef2aSThomas Huth } 642fcf5ef2aSThomas Huth 643fcf5ef2aSThomas Huth 644fcf5ef2aSThomas Huth int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run) 645fcf5ef2aSThomas Huth { 646fcf5ef2aSThomas Huth int ret = 0; 647fcf5ef2aSThomas Huth 648fcf5ef2aSThomas Huth switch (run->exit_reason) { 649fcf5ef2aSThomas Huth case KVM_EXIT_DEBUG: 650fcf5ef2aSThomas Huth if (kvm_arm_handle_debug(cs, &run->debug.arch)) { 651fcf5ef2aSThomas Huth ret = EXCP_DEBUG; 652fcf5ef2aSThomas Huth } /* otherwise return to guest */ 653fcf5ef2aSThomas Huth break; 654fcf5ef2aSThomas Huth default: 655fcf5ef2aSThomas Huth qemu_log_mask(LOG_UNIMP, "%s: un-handled exit reason %d\n", 656fcf5ef2aSThomas Huth __func__, run->exit_reason); 657fcf5ef2aSThomas Huth break; 658fcf5ef2aSThomas Huth } 659fcf5ef2aSThomas Huth return ret; 660fcf5ef2aSThomas Huth } 661fcf5ef2aSThomas Huth 662fcf5ef2aSThomas Huth bool kvm_arch_stop_on_emulation_error(CPUState *cs) 663fcf5ef2aSThomas Huth { 664fcf5ef2aSThomas Huth return true; 665fcf5ef2aSThomas Huth } 666fcf5ef2aSThomas Huth 667fcf5ef2aSThomas Huth int kvm_arch_process_async_events(CPUState *cs) 668fcf5ef2aSThomas Huth { 669fcf5ef2aSThomas Huth return 0; 670fcf5ef2aSThomas Huth } 671fcf5ef2aSThomas Huth 672fcf5ef2aSThomas Huth /* The #ifdef protections are until 32bit headers are imported and can 673fcf5ef2aSThomas Huth * be removed once both 32 and 64 bit reach feature parity. 674fcf5ef2aSThomas Huth */ 675fcf5ef2aSThomas Huth void kvm_arch_update_guest_debug(CPUState *cs, struct kvm_guest_debug *dbg) 676fcf5ef2aSThomas Huth { 677fcf5ef2aSThomas Huth #ifdef KVM_GUESTDBG_USE_SW_BP 678fcf5ef2aSThomas Huth if (kvm_sw_breakpoints_active(cs)) { 679fcf5ef2aSThomas Huth dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP; 680fcf5ef2aSThomas Huth } 681fcf5ef2aSThomas Huth #endif 682fcf5ef2aSThomas Huth #ifdef KVM_GUESTDBG_USE_HW 683fcf5ef2aSThomas Huth if (kvm_arm_hw_debug_active(cs)) { 684fcf5ef2aSThomas Huth dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW; 685fcf5ef2aSThomas Huth kvm_arm_copy_hw_debug_data(&dbg->arch); 686fcf5ef2aSThomas Huth } 687fcf5ef2aSThomas Huth #endif 688fcf5ef2aSThomas Huth } 689fcf5ef2aSThomas Huth 690fcf5ef2aSThomas Huth void kvm_arch_init_irq_routing(KVMState *s) 691fcf5ef2aSThomas Huth { 692fcf5ef2aSThomas Huth } 693fcf5ef2aSThomas Huth 694fcf5ef2aSThomas Huth int kvm_arch_irqchip_create(MachineState *ms, KVMState *s) 695fcf5ef2aSThomas Huth { 696fcf5ef2aSThomas Huth if (machine_kernel_irqchip_split(ms)) { 697fcf5ef2aSThomas Huth perror("-machine kernel_irqchip=split is not supported on ARM."); 698fcf5ef2aSThomas Huth exit(1); 699fcf5ef2aSThomas Huth } 700fcf5ef2aSThomas Huth 701fcf5ef2aSThomas Huth /* If we can create the VGIC using the newer device control API, we 702fcf5ef2aSThomas Huth * let the device do this when it initializes itself, otherwise we 703fcf5ef2aSThomas Huth * fall back to the old API */ 704fcf5ef2aSThomas Huth return kvm_check_extension(s, KVM_CAP_DEVICE_CTRL); 705fcf5ef2aSThomas Huth } 706fcf5ef2aSThomas Huth 707fcf5ef2aSThomas Huth int kvm_arm_vgic_probe(void) 708fcf5ef2aSThomas Huth { 709fcf5ef2aSThomas Huth if (kvm_create_device(kvm_state, 710fcf5ef2aSThomas Huth KVM_DEV_TYPE_ARM_VGIC_V3, true) == 0) { 711fcf5ef2aSThomas Huth return 3; 712fcf5ef2aSThomas Huth } else if (kvm_create_device(kvm_state, 713fcf5ef2aSThomas Huth KVM_DEV_TYPE_ARM_VGIC_V2, true) == 0) { 714fcf5ef2aSThomas Huth return 2; 715fcf5ef2aSThomas Huth } else { 716fcf5ef2aSThomas Huth return 0; 717fcf5ef2aSThomas Huth } 718fcf5ef2aSThomas Huth } 719fcf5ef2aSThomas Huth 720fcf5ef2aSThomas Huth int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route, 721fcf5ef2aSThomas Huth uint64_t address, uint32_t data, PCIDevice *dev) 722fcf5ef2aSThomas Huth { 723b05c81d2SEric Auger AddressSpace *as = pci_device_iommu_address_space(dev); 724b05c81d2SEric Auger hwaddr xlat, len, doorbell_gpa; 725b05c81d2SEric Auger MemoryRegionSection mrs; 726b05c81d2SEric Auger MemoryRegion *mr; 727b05c81d2SEric Auger int ret = 1; 728b05c81d2SEric Auger 729b05c81d2SEric Auger if (as == &address_space_memory) { 730fcf5ef2aSThomas Huth return 0; 731fcf5ef2aSThomas Huth } 732fcf5ef2aSThomas Huth 733b05c81d2SEric Auger /* MSI doorbell address is translated by an IOMMU */ 734b05c81d2SEric Auger 735b05c81d2SEric Auger rcu_read_lock(); 736bc6b1cecSPeter Maydell mr = address_space_translate(as, address, &xlat, &len, true, 737bc6b1cecSPeter Maydell MEMTXATTRS_UNSPECIFIED); 738b05c81d2SEric Auger if (!mr) { 739b05c81d2SEric Auger goto unlock; 740b05c81d2SEric Auger } 741b05c81d2SEric Auger mrs = memory_region_find(mr, xlat, 1); 742b05c81d2SEric Auger if (!mrs.mr) { 743b05c81d2SEric Auger goto unlock; 744b05c81d2SEric Auger } 745b05c81d2SEric Auger 746b05c81d2SEric Auger doorbell_gpa = mrs.offset_within_address_space; 747b05c81d2SEric Auger memory_region_unref(mrs.mr); 748b05c81d2SEric Auger 749b05c81d2SEric Auger route->u.msi.address_lo = doorbell_gpa; 750b05c81d2SEric Auger route->u.msi.address_hi = doorbell_gpa >> 32; 751b05c81d2SEric Auger 752b05c81d2SEric Auger trace_kvm_arm_fixup_msi_route(address, doorbell_gpa); 753b05c81d2SEric Auger 754b05c81d2SEric Auger ret = 0; 755b05c81d2SEric Auger 756b05c81d2SEric Auger unlock: 757b05c81d2SEric Auger rcu_read_unlock(); 758b05c81d2SEric Auger return ret; 759b05c81d2SEric Auger } 760b05c81d2SEric Auger 761fcf5ef2aSThomas Huth int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry *route, 762fcf5ef2aSThomas Huth int vector, PCIDevice *dev) 763fcf5ef2aSThomas Huth { 764fcf5ef2aSThomas Huth return 0; 765fcf5ef2aSThomas Huth } 766fcf5ef2aSThomas Huth 767fcf5ef2aSThomas Huth int kvm_arch_release_virq_post(int virq) 768fcf5ef2aSThomas Huth { 769fcf5ef2aSThomas Huth return 0; 770fcf5ef2aSThomas Huth } 771fcf5ef2aSThomas Huth 772fcf5ef2aSThomas Huth int kvm_arch_msi_data_to_gsi(uint32_t data) 773fcf5ef2aSThomas Huth { 774fcf5ef2aSThomas Huth return (data - 32) & 0xffff; 775fcf5ef2aSThomas Huth } 776