1fcf5ef2aSThomas Huth /* 2fcf5ef2aSThomas Huth * ARM implementation of KVM hooks 3fcf5ef2aSThomas Huth * 4fcf5ef2aSThomas Huth * Copyright Christoffer Dall 2009-2010 5fcf5ef2aSThomas Huth * 6fcf5ef2aSThomas Huth * This work is licensed under the terms of the GNU GPL, version 2 or later. 7fcf5ef2aSThomas Huth * See the COPYING file in the top-level directory. 8fcf5ef2aSThomas Huth * 9fcf5ef2aSThomas Huth */ 10fcf5ef2aSThomas Huth 11fcf5ef2aSThomas Huth #include "qemu/osdep.h" 12fcf5ef2aSThomas Huth #include <sys/ioctl.h> 13fcf5ef2aSThomas Huth 14fcf5ef2aSThomas Huth #include <linux/kvm.h> 15fcf5ef2aSThomas Huth 16fcf5ef2aSThomas Huth #include "qemu-common.h" 17fcf5ef2aSThomas Huth #include "qemu/timer.h" 18fcf5ef2aSThomas Huth #include "qemu/error-report.h" 19db725815SMarkus Armbruster #include "qemu/main-loop.h" 20fcf5ef2aSThomas Huth #include "sysemu/sysemu.h" 21fcf5ef2aSThomas Huth #include "sysemu/kvm.h" 22a27382e2SEric Auger #include "sysemu/kvm_int.h" 23fcf5ef2aSThomas Huth #include "kvm_arm.h" 24fcf5ef2aSThomas Huth #include "cpu.h" 25b05c81d2SEric Auger #include "trace.h" 26fcf5ef2aSThomas Huth #include "internals.h" 27b05c81d2SEric Auger #include "hw/pci/pci.h" 28fcf5ef2aSThomas Huth #include "exec/memattrs.h" 29fcf5ef2aSThomas Huth #include "exec/address-spaces.h" 30fcf5ef2aSThomas Huth #include "hw/boards.h" 3164552b6bSMarkus Armbruster #include "hw/irq.h" 32fcf5ef2aSThomas Huth #include "qemu/log.h" 33fcf5ef2aSThomas Huth 34fcf5ef2aSThomas Huth const KVMCapabilityInfo kvm_arch_required_capabilities[] = { 35fcf5ef2aSThomas Huth KVM_CAP_LAST_INFO 36fcf5ef2aSThomas Huth }; 37fcf5ef2aSThomas Huth 38fcf5ef2aSThomas Huth static bool cap_has_mp_state; 39202ccb6bSDongjiu Geng static bool cap_has_inject_serror_esr; 40fcf5ef2aSThomas Huth 41c4487d76SPeter Maydell static ARMHostCPUFeatures arm_host_cpu_features; 42c4487d76SPeter Maydell 43fcf5ef2aSThomas Huth int kvm_arm_vcpu_init(CPUState *cs) 44fcf5ef2aSThomas Huth { 45fcf5ef2aSThomas Huth ARMCPU *cpu = ARM_CPU(cs); 46fcf5ef2aSThomas Huth struct kvm_vcpu_init init; 47fcf5ef2aSThomas Huth 48fcf5ef2aSThomas Huth init.target = cpu->kvm_target; 49fcf5ef2aSThomas Huth memcpy(init.features, cpu->kvm_init_features, sizeof(init.features)); 50fcf5ef2aSThomas Huth 51fcf5ef2aSThomas Huth return kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_INIT, &init); 52fcf5ef2aSThomas Huth } 53fcf5ef2aSThomas Huth 5414e99e0fSAndrew Jones int kvm_arm_vcpu_finalize(CPUState *cs, int feature) 5514e99e0fSAndrew Jones { 5614e99e0fSAndrew Jones return kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_FINALIZE, &feature); 5714e99e0fSAndrew Jones } 5814e99e0fSAndrew Jones 59202ccb6bSDongjiu Geng void kvm_arm_init_serror_injection(CPUState *cs) 60202ccb6bSDongjiu Geng { 61202ccb6bSDongjiu Geng cap_has_inject_serror_esr = kvm_check_extension(cs->kvm_state, 62202ccb6bSDongjiu Geng KVM_CAP_ARM_INJECT_SERROR_ESR); 63202ccb6bSDongjiu Geng } 64202ccb6bSDongjiu Geng 65fcf5ef2aSThomas Huth bool kvm_arm_create_scratch_host_vcpu(const uint32_t *cpus_to_try, 66fcf5ef2aSThomas Huth int *fdarray, 67fcf5ef2aSThomas Huth struct kvm_vcpu_init *init) 68fcf5ef2aSThomas Huth { 690cdb4020SAndrew Jones int ret = 0, kvmfd = -1, vmfd = -1, cpufd = -1; 70fcf5ef2aSThomas Huth 71fcf5ef2aSThomas Huth kvmfd = qemu_open("/dev/kvm", O_RDWR); 72fcf5ef2aSThomas Huth if (kvmfd < 0) { 73fcf5ef2aSThomas Huth goto err; 74fcf5ef2aSThomas Huth } 75fcf5ef2aSThomas Huth vmfd = ioctl(kvmfd, KVM_CREATE_VM, 0); 76fcf5ef2aSThomas Huth if (vmfd < 0) { 77fcf5ef2aSThomas Huth goto err; 78fcf5ef2aSThomas Huth } 79fcf5ef2aSThomas Huth cpufd = ioctl(vmfd, KVM_CREATE_VCPU, 0); 80fcf5ef2aSThomas Huth if (cpufd < 0) { 81fcf5ef2aSThomas Huth goto err; 82fcf5ef2aSThomas Huth } 83fcf5ef2aSThomas Huth 84fcf5ef2aSThomas Huth if (!init) { 85fcf5ef2aSThomas Huth /* Caller doesn't want the VCPU to be initialized, so skip it */ 86fcf5ef2aSThomas Huth goto finish; 87fcf5ef2aSThomas Huth } 88fcf5ef2aSThomas Huth 890cdb4020SAndrew Jones if (init->target == -1) { 900cdb4020SAndrew Jones struct kvm_vcpu_init preferred; 910cdb4020SAndrew Jones 920cdb4020SAndrew Jones ret = ioctl(vmfd, KVM_ARM_PREFERRED_TARGET, &preferred); 930cdb4020SAndrew Jones if (!ret) { 940cdb4020SAndrew Jones init->target = preferred.target; 950cdb4020SAndrew Jones } 960cdb4020SAndrew Jones } 97fcf5ef2aSThomas Huth if (ret >= 0) { 98fcf5ef2aSThomas Huth ret = ioctl(cpufd, KVM_ARM_VCPU_INIT, init); 99fcf5ef2aSThomas Huth if (ret < 0) { 100fcf5ef2aSThomas Huth goto err; 101fcf5ef2aSThomas Huth } 102fcf5ef2aSThomas Huth } else if (cpus_to_try) { 103fcf5ef2aSThomas Huth /* Old kernel which doesn't know about the 104fcf5ef2aSThomas Huth * PREFERRED_TARGET ioctl: we know it will only support 105fcf5ef2aSThomas Huth * creating one kind of guest CPU which is its preferred 106fcf5ef2aSThomas Huth * CPU type. 107fcf5ef2aSThomas Huth */ 1080cdb4020SAndrew Jones struct kvm_vcpu_init try; 1090cdb4020SAndrew Jones 110fcf5ef2aSThomas Huth while (*cpus_to_try != QEMU_KVM_ARM_TARGET_NONE) { 1110cdb4020SAndrew Jones try.target = *cpus_to_try++; 1120cdb4020SAndrew Jones memcpy(try.features, init->features, sizeof(init->features)); 1130cdb4020SAndrew Jones ret = ioctl(cpufd, KVM_ARM_VCPU_INIT, &try); 114fcf5ef2aSThomas Huth if (ret >= 0) { 115fcf5ef2aSThomas Huth break; 116fcf5ef2aSThomas Huth } 117fcf5ef2aSThomas Huth } 118fcf5ef2aSThomas Huth if (ret < 0) { 119fcf5ef2aSThomas Huth goto err; 120fcf5ef2aSThomas Huth } 1210cdb4020SAndrew Jones init->target = try.target; 122fcf5ef2aSThomas Huth } else { 123fcf5ef2aSThomas Huth /* Treat a NULL cpus_to_try argument the same as an empty 124fcf5ef2aSThomas Huth * list, which means we will fail the call since this must 125fcf5ef2aSThomas Huth * be an old kernel which doesn't support PREFERRED_TARGET. 126fcf5ef2aSThomas Huth */ 127fcf5ef2aSThomas Huth goto err; 128fcf5ef2aSThomas Huth } 129fcf5ef2aSThomas Huth 130fcf5ef2aSThomas Huth finish: 131fcf5ef2aSThomas Huth fdarray[0] = kvmfd; 132fcf5ef2aSThomas Huth fdarray[1] = vmfd; 133fcf5ef2aSThomas Huth fdarray[2] = cpufd; 134fcf5ef2aSThomas Huth 135fcf5ef2aSThomas Huth return true; 136fcf5ef2aSThomas Huth 137fcf5ef2aSThomas Huth err: 138fcf5ef2aSThomas Huth if (cpufd >= 0) { 139fcf5ef2aSThomas Huth close(cpufd); 140fcf5ef2aSThomas Huth } 141fcf5ef2aSThomas Huth if (vmfd >= 0) { 142fcf5ef2aSThomas Huth close(vmfd); 143fcf5ef2aSThomas Huth } 144fcf5ef2aSThomas Huth if (kvmfd >= 0) { 145fcf5ef2aSThomas Huth close(kvmfd); 146fcf5ef2aSThomas Huth } 147fcf5ef2aSThomas Huth 148fcf5ef2aSThomas Huth return false; 149fcf5ef2aSThomas Huth } 150fcf5ef2aSThomas Huth 151fcf5ef2aSThomas Huth void kvm_arm_destroy_scratch_host_vcpu(int *fdarray) 152fcf5ef2aSThomas Huth { 153fcf5ef2aSThomas Huth int i; 154fcf5ef2aSThomas Huth 155fcf5ef2aSThomas Huth for (i = 2; i >= 0; i--) { 156fcf5ef2aSThomas Huth close(fdarray[i]); 157fcf5ef2aSThomas Huth } 158fcf5ef2aSThomas Huth } 159fcf5ef2aSThomas Huth 160c4487d76SPeter Maydell void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu) 161fcf5ef2aSThomas Huth { 162c4487d76SPeter Maydell CPUARMState *env = &cpu->env; 163fcf5ef2aSThomas Huth 164c4487d76SPeter Maydell if (!arm_host_cpu_features.dtb_compatible) { 165c4487d76SPeter Maydell if (!kvm_enabled() || 166c4487d76SPeter Maydell !kvm_arm_get_host_cpu_features(&arm_host_cpu_features)) { 167c4487d76SPeter Maydell /* We can't report this error yet, so flag that we need to 168c4487d76SPeter Maydell * in arm_cpu_realizefn(). 169fcf5ef2aSThomas Huth */ 170c4487d76SPeter Maydell cpu->kvm_target = QEMU_KVM_ARM_TARGET_NONE; 171c4487d76SPeter Maydell cpu->host_cpu_probe_failed = true; 172c4487d76SPeter Maydell return; 173fcf5ef2aSThomas Huth } 174fcf5ef2aSThomas Huth } 175fcf5ef2aSThomas Huth 176c4487d76SPeter Maydell cpu->kvm_target = arm_host_cpu_features.target; 177c4487d76SPeter Maydell cpu->dtb_compatible = arm_host_cpu_features.dtb_compatible; 1784674097cSRichard Henderson cpu->isar = arm_host_cpu_features.isar; 179c4487d76SPeter Maydell env->features = arm_host_cpu_features.features; 180c4487d76SPeter Maydell } 181c4487d76SPeter Maydell 182ae502508SAndrew Jones bool kvm_arm_pmu_supported(CPUState *cpu) 183ae502508SAndrew Jones { 184d70c996dSPhilippe Mathieu-Daudé return kvm_check_extension(cpu->kvm_state, KVM_CAP_ARM_PMU_V3); 185ae502508SAndrew Jones } 186ae502508SAndrew Jones 187a27382e2SEric Auger int kvm_arm_get_max_vm_ipa_size(MachineState *ms) 188a27382e2SEric Auger { 189a27382e2SEric Auger KVMState *s = KVM_STATE(ms->accelerator); 190a27382e2SEric Auger int ret; 191a27382e2SEric Auger 192a27382e2SEric Auger ret = kvm_check_extension(s, KVM_CAP_ARM_VM_IPA_SIZE); 193a27382e2SEric Auger return ret > 0 ? ret : 40; 194a27382e2SEric Auger } 195a27382e2SEric Auger 196fcf5ef2aSThomas Huth int kvm_arch_init(MachineState *ms, KVMState *s) 197fcf5ef2aSThomas Huth { 198fff9f555SEric Auger int ret = 0; 199fcf5ef2aSThomas Huth /* For ARM interrupt delivery is always asynchronous, 200fcf5ef2aSThomas Huth * whether we are using an in-kernel VGIC or not. 201fcf5ef2aSThomas Huth */ 202fcf5ef2aSThomas Huth kvm_async_interrupts_allowed = true; 203fcf5ef2aSThomas Huth 2045d721b78SAlexander Graf /* 2055d721b78SAlexander Graf * PSCI wakes up secondary cores, so we always need to 2065d721b78SAlexander Graf * have vCPUs waiting in kernel space 2075d721b78SAlexander Graf */ 2085d721b78SAlexander Graf kvm_halt_in_kernel_allowed = true; 2095d721b78SAlexander Graf 210fcf5ef2aSThomas Huth cap_has_mp_state = kvm_check_extension(s, KVM_CAP_MP_STATE); 211fcf5ef2aSThomas Huth 212fff9f555SEric Auger if (ms->smp.cpus > 256 && 213fff9f555SEric Auger !kvm_check_extension(s, KVM_CAP_ARM_IRQ_LINE_LAYOUT_2)) { 214fff9f555SEric Auger error_report("Using more than 256 vcpus requires a host kernel " 215fff9f555SEric Auger "with KVM_CAP_ARM_IRQ_LINE_LAYOUT_2"); 216fff9f555SEric Auger ret = -EINVAL; 217fff9f555SEric Auger } 218fff9f555SEric Auger 219fff9f555SEric Auger return ret; 220fcf5ef2aSThomas Huth } 221fcf5ef2aSThomas Huth 222fcf5ef2aSThomas Huth unsigned long kvm_arch_vcpu_id(CPUState *cpu) 223fcf5ef2aSThomas Huth { 224fcf5ef2aSThomas Huth return cpu->cpu_index; 225fcf5ef2aSThomas Huth } 226fcf5ef2aSThomas Huth 227fcf5ef2aSThomas Huth /* We track all the KVM devices which need their memory addresses 228fcf5ef2aSThomas Huth * passing to the kernel in a list of these structures. 229fcf5ef2aSThomas Huth * When board init is complete we run through the list and 230fcf5ef2aSThomas Huth * tell the kernel the base addresses of the memory regions. 231fcf5ef2aSThomas Huth * We use a MemoryListener to track mapping and unmapping of 232fcf5ef2aSThomas Huth * the regions during board creation, so the board models don't 233fcf5ef2aSThomas Huth * need to do anything special for the KVM case. 23419d1bd0bSEric Auger * 23519d1bd0bSEric Auger * Sometimes the address must be OR'ed with some other fields 23619d1bd0bSEric Auger * (for example for KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION). 23719d1bd0bSEric Auger * @kda_addr_ormask aims at storing the value of those fields. 238fcf5ef2aSThomas Huth */ 239fcf5ef2aSThomas Huth typedef struct KVMDevice { 240fcf5ef2aSThomas Huth struct kvm_arm_device_addr kda; 241fcf5ef2aSThomas Huth struct kvm_device_attr kdattr; 24219d1bd0bSEric Auger uint64_t kda_addr_ormask; 243fcf5ef2aSThomas Huth MemoryRegion *mr; 244fcf5ef2aSThomas Huth QSLIST_ENTRY(KVMDevice) entries; 245fcf5ef2aSThomas Huth int dev_fd; 246fcf5ef2aSThomas Huth } KVMDevice; 247fcf5ef2aSThomas Huth 248b58deb34SPaolo Bonzini static QSLIST_HEAD(, KVMDevice) kvm_devices_head; 249fcf5ef2aSThomas Huth 250fcf5ef2aSThomas Huth static void kvm_arm_devlistener_add(MemoryListener *listener, 251fcf5ef2aSThomas Huth MemoryRegionSection *section) 252fcf5ef2aSThomas Huth { 253fcf5ef2aSThomas Huth KVMDevice *kd; 254fcf5ef2aSThomas Huth 255fcf5ef2aSThomas Huth QSLIST_FOREACH(kd, &kvm_devices_head, entries) { 256fcf5ef2aSThomas Huth if (section->mr == kd->mr) { 257fcf5ef2aSThomas Huth kd->kda.addr = section->offset_within_address_space; 258fcf5ef2aSThomas Huth } 259fcf5ef2aSThomas Huth } 260fcf5ef2aSThomas Huth } 261fcf5ef2aSThomas Huth 262fcf5ef2aSThomas Huth static void kvm_arm_devlistener_del(MemoryListener *listener, 263fcf5ef2aSThomas Huth MemoryRegionSection *section) 264fcf5ef2aSThomas Huth { 265fcf5ef2aSThomas Huth KVMDevice *kd; 266fcf5ef2aSThomas Huth 267fcf5ef2aSThomas Huth QSLIST_FOREACH(kd, &kvm_devices_head, entries) { 268fcf5ef2aSThomas Huth if (section->mr == kd->mr) { 269fcf5ef2aSThomas Huth kd->kda.addr = -1; 270fcf5ef2aSThomas Huth } 271fcf5ef2aSThomas Huth } 272fcf5ef2aSThomas Huth } 273fcf5ef2aSThomas Huth 274fcf5ef2aSThomas Huth static MemoryListener devlistener = { 275fcf5ef2aSThomas Huth .region_add = kvm_arm_devlistener_add, 276fcf5ef2aSThomas Huth .region_del = kvm_arm_devlistener_del, 277fcf5ef2aSThomas Huth }; 278fcf5ef2aSThomas Huth 279fcf5ef2aSThomas Huth static void kvm_arm_set_device_addr(KVMDevice *kd) 280fcf5ef2aSThomas Huth { 281fcf5ef2aSThomas Huth struct kvm_device_attr *attr = &kd->kdattr; 282fcf5ef2aSThomas Huth int ret; 283fcf5ef2aSThomas Huth 284fcf5ef2aSThomas Huth /* If the device control API is available and we have a device fd on the 285fcf5ef2aSThomas Huth * KVMDevice struct, let's use the newer API 286fcf5ef2aSThomas Huth */ 287fcf5ef2aSThomas Huth if (kd->dev_fd >= 0) { 288fcf5ef2aSThomas Huth uint64_t addr = kd->kda.addr; 28919d1bd0bSEric Auger 29019d1bd0bSEric Auger addr |= kd->kda_addr_ormask; 291fcf5ef2aSThomas Huth attr->addr = (uintptr_t)&addr; 292fcf5ef2aSThomas Huth ret = kvm_device_ioctl(kd->dev_fd, KVM_SET_DEVICE_ATTR, attr); 293fcf5ef2aSThomas Huth } else { 294fcf5ef2aSThomas Huth ret = kvm_vm_ioctl(kvm_state, KVM_ARM_SET_DEVICE_ADDR, &kd->kda); 295fcf5ef2aSThomas Huth } 296fcf5ef2aSThomas Huth 297fcf5ef2aSThomas Huth if (ret < 0) { 298fcf5ef2aSThomas Huth fprintf(stderr, "Failed to set device address: %s\n", 299fcf5ef2aSThomas Huth strerror(-ret)); 300fcf5ef2aSThomas Huth abort(); 301fcf5ef2aSThomas Huth } 302fcf5ef2aSThomas Huth } 303fcf5ef2aSThomas Huth 304fcf5ef2aSThomas Huth static void kvm_arm_machine_init_done(Notifier *notifier, void *data) 305fcf5ef2aSThomas Huth { 306fcf5ef2aSThomas Huth KVMDevice *kd, *tkd; 307fcf5ef2aSThomas Huth 308fcf5ef2aSThomas Huth QSLIST_FOREACH_SAFE(kd, &kvm_devices_head, entries, tkd) { 309fcf5ef2aSThomas Huth if (kd->kda.addr != -1) { 310fcf5ef2aSThomas Huth kvm_arm_set_device_addr(kd); 311fcf5ef2aSThomas Huth } 312fcf5ef2aSThomas Huth memory_region_unref(kd->mr); 3135ff9aaabSZheng Xiang QSLIST_REMOVE_HEAD(&kvm_devices_head, entries); 314fcf5ef2aSThomas Huth g_free(kd); 315fcf5ef2aSThomas Huth } 3160bbe4354SPeter Xu memory_listener_unregister(&devlistener); 317fcf5ef2aSThomas Huth } 318fcf5ef2aSThomas Huth 319fcf5ef2aSThomas Huth static Notifier notify = { 320fcf5ef2aSThomas Huth .notify = kvm_arm_machine_init_done, 321fcf5ef2aSThomas Huth }; 322fcf5ef2aSThomas Huth 323fcf5ef2aSThomas Huth void kvm_arm_register_device(MemoryRegion *mr, uint64_t devid, uint64_t group, 32419d1bd0bSEric Auger uint64_t attr, int dev_fd, uint64_t addr_ormask) 325fcf5ef2aSThomas Huth { 326fcf5ef2aSThomas Huth KVMDevice *kd; 327fcf5ef2aSThomas Huth 328fcf5ef2aSThomas Huth if (!kvm_irqchip_in_kernel()) { 329fcf5ef2aSThomas Huth return; 330fcf5ef2aSThomas Huth } 331fcf5ef2aSThomas Huth 332fcf5ef2aSThomas Huth if (QSLIST_EMPTY(&kvm_devices_head)) { 333fcf5ef2aSThomas Huth memory_listener_register(&devlistener, &address_space_memory); 334fcf5ef2aSThomas Huth qemu_add_machine_init_done_notifier(¬ify); 335fcf5ef2aSThomas Huth } 336fcf5ef2aSThomas Huth kd = g_new0(KVMDevice, 1); 337fcf5ef2aSThomas Huth kd->mr = mr; 338fcf5ef2aSThomas Huth kd->kda.id = devid; 339fcf5ef2aSThomas Huth kd->kda.addr = -1; 340fcf5ef2aSThomas Huth kd->kdattr.flags = 0; 341fcf5ef2aSThomas Huth kd->kdattr.group = group; 342fcf5ef2aSThomas Huth kd->kdattr.attr = attr; 343fcf5ef2aSThomas Huth kd->dev_fd = dev_fd; 34419d1bd0bSEric Auger kd->kda_addr_ormask = addr_ormask; 345fcf5ef2aSThomas Huth QSLIST_INSERT_HEAD(&kvm_devices_head, kd, entries); 346fcf5ef2aSThomas Huth memory_region_ref(kd->mr); 347fcf5ef2aSThomas Huth } 348fcf5ef2aSThomas Huth 349fcf5ef2aSThomas Huth static int compare_u64(const void *a, const void *b) 350fcf5ef2aSThomas Huth { 351fcf5ef2aSThomas Huth if (*(uint64_t *)a > *(uint64_t *)b) { 352fcf5ef2aSThomas Huth return 1; 353fcf5ef2aSThomas Huth } 354fcf5ef2aSThomas Huth if (*(uint64_t *)a < *(uint64_t *)b) { 355fcf5ef2aSThomas Huth return -1; 356fcf5ef2aSThomas Huth } 357fcf5ef2aSThomas Huth return 0; 358fcf5ef2aSThomas Huth } 359fcf5ef2aSThomas Huth 360*e5ac4200SAndrew Jones /* 361*e5ac4200SAndrew Jones * cpreg_values are sorted in ascending order by KVM register ID 362*e5ac4200SAndrew Jones * (see kvm_arm_init_cpreg_list). This allows us to cheaply find 363*e5ac4200SAndrew Jones * the storage for a KVM register by ID with a binary search. 364*e5ac4200SAndrew Jones */ 365*e5ac4200SAndrew Jones static uint64_t *kvm_arm_get_cpreg_ptr(ARMCPU *cpu, uint64_t regidx) 366*e5ac4200SAndrew Jones { 367*e5ac4200SAndrew Jones uint64_t *res; 368*e5ac4200SAndrew Jones 369*e5ac4200SAndrew Jones res = bsearch(®idx, cpu->cpreg_indexes, cpu->cpreg_array_len, 370*e5ac4200SAndrew Jones sizeof(uint64_t), compare_u64); 371*e5ac4200SAndrew Jones assert(res); 372*e5ac4200SAndrew Jones 373*e5ac4200SAndrew Jones return &cpu->cpreg_values[res - cpu->cpreg_indexes]; 374*e5ac4200SAndrew Jones } 375*e5ac4200SAndrew Jones 376c8a44709SDongjiu Geng /* Initialize the ARMCPU cpreg list according to the kernel's 377fcf5ef2aSThomas Huth * definition of what CPU registers it knows about (and throw away 378fcf5ef2aSThomas Huth * the previous TCG-created cpreg list). 379fcf5ef2aSThomas Huth */ 380fcf5ef2aSThomas Huth int kvm_arm_init_cpreg_list(ARMCPU *cpu) 381fcf5ef2aSThomas Huth { 382fcf5ef2aSThomas Huth struct kvm_reg_list rl; 383fcf5ef2aSThomas Huth struct kvm_reg_list *rlp; 384fcf5ef2aSThomas Huth int i, ret, arraylen; 385fcf5ef2aSThomas Huth CPUState *cs = CPU(cpu); 386fcf5ef2aSThomas Huth 387fcf5ef2aSThomas Huth rl.n = 0; 388fcf5ef2aSThomas Huth ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, &rl); 389fcf5ef2aSThomas Huth if (ret != -E2BIG) { 390fcf5ef2aSThomas Huth return ret; 391fcf5ef2aSThomas Huth } 392fcf5ef2aSThomas Huth rlp = g_malloc(sizeof(struct kvm_reg_list) + rl.n * sizeof(uint64_t)); 393fcf5ef2aSThomas Huth rlp->n = rl.n; 394fcf5ef2aSThomas Huth ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, rlp); 395fcf5ef2aSThomas Huth if (ret) { 396fcf5ef2aSThomas Huth goto out; 397fcf5ef2aSThomas Huth } 398fcf5ef2aSThomas Huth /* Sort the list we get back from the kernel, since cpreg_tuples 399fcf5ef2aSThomas Huth * must be in strictly ascending order. 400fcf5ef2aSThomas Huth */ 401fcf5ef2aSThomas Huth qsort(&rlp->reg, rlp->n, sizeof(rlp->reg[0]), compare_u64); 402fcf5ef2aSThomas Huth 403fcf5ef2aSThomas Huth for (i = 0, arraylen = 0; i < rlp->n; i++) { 404fcf5ef2aSThomas Huth if (!kvm_arm_reg_syncs_via_cpreg_list(rlp->reg[i])) { 405fcf5ef2aSThomas Huth continue; 406fcf5ef2aSThomas Huth } 407fcf5ef2aSThomas Huth switch (rlp->reg[i] & KVM_REG_SIZE_MASK) { 408fcf5ef2aSThomas Huth case KVM_REG_SIZE_U32: 409fcf5ef2aSThomas Huth case KVM_REG_SIZE_U64: 410fcf5ef2aSThomas Huth break; 411fcf5ef2aSThomas Huth default: 412fcf5ef2aSThomas Huth fprintf(stderr, "Can't handle size of register in kernel list\n"); 413fcf5ef2aSThomas Huth ret = -EINVAL; 414fcf5ef2aSThomas Huth goto out; 415fcf5ef2aSThomas Huth } 416fcf5ef2aSThomas Huth 417fcf5ef2aSThomas Huth arraylen++; 418fcf5ef2aSThomas Huth } 419fcf5ef2aSThomas Huth 420fcf5ef2aSThomas Huth cpu->cpreg_indexes = g_renew(uint64_t, cpu->cpreg_indexes, arraylen); 421fcf5ef2aSThomas Huth cpu->cpreg_values = g_renew(uint64_t, cpu->cpreg_values, arraylen); 422fcf5ef2aSThomas Huth cpu->cpreg_vmstate_indexes = g_renew(uint64_t, cpu->cpreg_vmstate_indexes, 423fcf5ef2aSThomas Huth arraylen); 424fcf5ef2aSThomas Huth cpu->cpreg_vmstate_values = g_renew(uint64_t, cpu->cpreg_vmstate_values, 425fcf5ef2aSThomas Huth arraylen); 426fcf5ef2aSThomas Huth cpu->cpreg_array_len = arraylen; 427fcf5ef2aSThomas Huth cpu->cpreg_vmstate_array_len = arraylen; 428fcf5ef2aSThomas Huth 429fcf5ef2aSThomas Huth for (i = 0, arraylen = 0; i < rlp->n; i++) { 430fcf5ef2aSThomas Huth uint64_t regidx = rlp->reg[i]; 431fcf5ef2aSThomas Huth if (!kvm_arm_reg_syncs_via_cpreg_list(regidx)) { 432fcf5ef2aSThomas Huth continue; 433fcf5ef2aSThomas Huth } 434fcf5ef2aSThomas Huth cpu->cpreg_indexes[arraylen] = regidx; 435fcf5ef2aSThomas Huth arraylen++; 436fcf5ef2aSThomas Huth } 437fcf5ef2aSThomas Huth assert(cpu->cpreg_array_len == arraylen); 438fcf5ef2aSThomas Huth 439fcf5ef2aSThomas Huth if (!write_kvmstate_to_list(cpu)) { 440fcf5ef2aSThomas Huth /* Shouldn't happen unless kernel is inconsistent about 441fcf5ef2aSThomas Huth * what registers exist. 442fcf5ef2aSThomas Huth */ 443fcf5ef2aSThomas Huth fprintf(stderr, "Initial read of kernel register state failed\n"); 444fcf5ef2aSThomas Huth ret = -EINVAL; 445fcf5ef2aSThomas Huth goto out; 446fcf5ef2aSThomas Huth } 447fcf5ef2aSThomas Huth 448fcf5ef2aSThomas Huth out: 449fcf5ef2aSThomas Huth g_free(rlp); 450fcf5ef2aSThomas Huth return ret; 451fcf5ef2aSThomas Huth } 452fcf5ef2aSThomas Huth 453fcf5ef2aSThomas Huth bool write_kvmstate_to_list(ARMCPU *cpu) 454fcf5ef2aSThomas Huth { 455fcf5ef2aSThomas Huth CPUState *cs = CPU(cpu); 456fcf5ef2aSThomas Huth int i; 457fcf5ef2aSThomas Huth bool ok = true; 458fcf5ef2aSThomas Huth 459fcf5ef2aSThomas Huth for (i = 0; i < cpu->cpreg_array_len; i++) { 460fcf5ef2aSThomas Huth struct kvm_one_reg r; 461fcf5ef2aSThomas Huth uint64_t regidx = cpu->cpreg_indexes[i]; 462fcf5ef2aSThomas Huth uint32_t v32; 463fcf5ef2aSThomas Huth int ret; 464fcf5ef2aSThomas Huth 465fcf5ef2aSThomas Huth r.id = regidx; 466fcf5ef2aSThomas Huth 467fcf5ef2aSThomas Huth switch (regidx & KVM_REG_SIZE_MASK) { 468fcf5ef2aSThomas Huth case KVM_REG_SIZE_U32: 469fcf5ef2aSThomas Huth r.addr = (uintptr_t)&v32; 470fcf5ef2aSThomas Huth ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r); 471fcf5ef2aSThomas Huth if (!ret) { 472fcf5ef2aSThomas Huth cpu->cpreg_values[i] = v32; 473fcf5ef2aSThomas Huth } 474fcf5ef2aSThomas Huth break; 475fcf5ef2aSThomas Huth case KVM_REG_SIZE_U64: 476fcf5ef2aSThomas Huth r.addr = (uintptr_t)(cpu->cpreg_values + i); 477fcf5ef2aSThomas Huth ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r); 478fcf5ef2aSThomas Huth break; 479fcf5ef2aSThomas Huth default: 480fcf5ef2aSThomas Huth abort(); 481fcf5ef2aSThomas Huth } 482fcf5ef2aSThomas Huth if (ret) { 483fcf5ef2aSThomas Huth ok = false; 484fcf5ef2aSThomas Huth } 485fcf5ef2aSThomas Huth } 486fcf5ef2aSThomas Huth return ok; 487fcf5ef2aSThomas Huth } 488fcf5ef2aSThomas Huth 489fcf5ef2aSThomas Huth bool write_list_to_kvmstate(ARMCPU *cpu, int level) 490fcf5ef2aSThomas Huth { 491fcf5ef2aSThomas Huth CPUState *cs = CPU(cpu); 492fcf5ef2aSThomas Huth int i; 493fcf5ef2aSThomas Huth bool ok = true; 494fcf5ef2aSThomas Huth 495fcf5ef2aSThomas Huth for (i = 0; i < cpu->cpreg_array_len; i++) { 496fcf5ef2aSThomas Huth struct kvm_one_reg r; 497fcf5ef2aSThomas Huth uint64_t regidx = cpu->cpreg_indexes[i]; 498fcf5ef2aSThomas Huth uint32_t v32; 499fcf5ef2aSThomas Huth int ret; 500fcf5ef2aSThomas Huth 501fcf5ef2aSThomas Huth if (kvm_arm_cpreg_level(regidx) > level) { 502fcf5ef2aSThomas Huth continue; 503fcf5ef2aSThomas Huth } 504fcf5ef2aSThomas Huth 505fcf5ef2aSThomas Huth r.id = regidx; 506fcf5ef2aSThomas Huth switch (regidx & KVM_REG_SIZE_MASK) { 507fcf5ef2aSThomas Huth case KVM_REG_SIZE_U32: 508fcf5ef2aSThomas Huth v32 = cpu->cpreg_values[i]; 509fcf5ef2aSThomas Huth r.addr = (uintptr_t)&v32; 510fcf5ef2aSThomas Huth break; 511fcf5ef2aSThomas Huth case KVM_REG_SIZE_U64: 512fcf5ef2aSThomas Huth r.addr = (uintptr_t)(cpu->cpreg_values + i); 513fcf5ef2aSThomas Huth break; 514fcf5ef2aSThomas Huth default: 515fcf5ef2aSThomas Huth abort(); 516fcf5ef2aSThomas Huth } 517fcf5ef2aSThomas Huth ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &r); 518fcf5ef2aSThomas Huth if (ret) { 519fcf5ef2aSThomas Huth /* We might fail for "unknown register" and also for 520fcf5ef2aSThomas Huth * "you tried to set a register which is constant with 521fcf5ef2aSThomas Huth * a different value from what it actually contains". 522fcf5ef2aSThomas Huth */ 523fcf5ef2aSThomas Huth ok = false; 524fcf5ef2aSThomas Huth } 525fcf5ef2aSThomas Huth } 526fcf5ef2aSThomas Huth return ok; 527fcf5ef2aSThomas Huth } 528fcf5ef2aSThomas Huth 529*e5ac4200SAndrew Jones void kvm_arm_cpu_pre_save(ARMCPU *cpu) 530*e5ac4200SAndrew Jones { 531*e5ac4200SAndrew Jones /* KVM virtual time adjustment */ 532*e5ac4200SAndrew Jones if (cpu->kvm_vtime_dirty) { 533*e5ac4200SAndrew Jones *kvm_arm_get_cpreg_ptr(cpu, KVM_REG_ARM_TIMER_CNT) = cpu->kvm_vtime; 534*e5ac4200SAndrew Jones } 535*e5ac4200SAndrew Jones } 536*e5ac4200SAndrew Jones 537*e5ac4200SAndrew Jones void kvm_arm_cpu_post_load(ARMCPU *cpu) 538*e5ac4200SAndrew Jones { 539*e5ac4200SAndrew Jones /* KVM virtual time adjustment */ 540*e5ac4200SAndrew Jones if (cpu->kvm_adjvtime) { 541*e5ac4200SAndrew Jones cpu->kvm_vtime = *kvm_arm_get_cpreg_ptr(cpu, KVM_REG_ARM_TIMER_CNT); 542*e5ac4200SAndrew Jones cpu->kvm_vtime_dirty = true; 543*e5ac4200SAndrew Jones } 544*e5ac4200SAndrew Jones } 545*e5ac4200SAndrew Jones 546fcf5ef2aSThomas Huth void kvm_arm_reset_vcpu(ARMCPU *cpu) 547fcf5ef2aSThomas Huth { 548fcf5ef2aSThomas Huth int ret; 549fcf5ef2aSThomas Huth 550fcf5ef2aSThomas Huth /* Re-init VCPU so that all registers are set to 551fcf5ef2aSThomas Huth * their respective reset values. 552fcf5ef2aSThomas Huth */ 553fcf5ef2aSThomas Huth ret = kvm_arm_vcpu_init(CPU(cpu)); 554fcf5ef2aSThomas Huth if (ret < 0) { 555fcf5ef2aSThomas Huth fprintf(stderr, "kvm_arm_vcpu_init failed: %s\n", strerror(-ret)); 556fcf5ef2aSThomas Huth abort(); 557fcf5ef2aSThomas Huth } 558fcf5ef2aSThomas Huth if (!write_kvmstate_to_list(cpu)) { 559fcf5ef2aSThomas Huth fprintf(stderr, "write_kvmstate_to_list failed\n"); 560fcf5ef2aSThomas Huth abort(); 561fcf5ef2aSThomas Huth } 562b698e4eeSPeter Maydell /* 563b698e4eeSPeter Maydell * Sync the reset values also into the CPUState. This is necessary 564b698e4eeSPeter Maydell * because the next thing we do will be a kvm_arch_put_registers() 565b698e4eeSPeter Maydell * which will update the list values from the CPUState before copying 566b698e4eeSPeter Maydell * the list values back to KVM. It's OK to ignore failure returns here 567b698e4eeSPeter Maydell * for the same reason we do so in kvm_arch_get_registers(). 568b698e4eeSPeter Maydell */ 569b698e4eeSPeter Maydell write_list_to_cpustate(cpu); 570fcf5ef2aSThomas Huth } 571fcf5ef2aSThomas Huth 572fcf5ef2aSThomas Huth /* 573fcf5ef2aSThomas Huth * Update KVM's MP_STATE based on what QEMU thinks it is 574fcf5ef2aSThomas Huth */ 575fcf5ef2aSThomas Huth int kvm_arm_sync_mpstate_to_kvm(ARMCPU *cpu) 576fcf5ef2aSThomas Huth { 577fcf5ef2aSThomas Huth if (cap_has_mp_state) { 578fcf5ef2aSThomas Huth struct kvm_mp_state mp_state = { 579062ba099SAlex Bennée .mp_state = (cpu->power_state == PSCI_OFF) ? 580062ba099SAlex Bennée KVM_MP_STATE_STOPPED : KVM_MP_STATE_RUNNABLE 581fcf5ef2aSThomas Huth }; 582fcf5ef2aSThomas Huth int ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_MP_STATE, &mp_state); 583fcf5ef2aSThomas Huth if (ret) { 584fcf5ef2aSThomas Huth fprintf(stderr, "%s: failed to set MP_STATE %d/%s\n", 585fcf5ef2aSThomas Huth __func__, ret, strerror(-ret)); 586fcf5ef2aSThomas Huth return -1; 587fcf5ef2aSThomas Huth } 588fcf5ef2aSThomas Huth } 589fcf5ef2aSThomas Huth 590fcf5ef2aSThomas Huth return 0; 591fcf5ef2aSThomas Huth } 592fcf5ef2aSThomas Huth 593fcf5ef2aSThomas Huth /* 594fcf5ef2aSThomas Huth * Sync the KVM MP_STATE into QEMU 595fcf5ef2aSThomas Huth */ 596fcf5ef2aSThomas Huth int kvm_arm_sync_mpstate_to_qemu(ARMCPU *cpu) 597fcf5ef2aSThomas Huth { 598fcf5ef2aSThomas Huth if (cap_has_mp_state) { 599fcf5ef2aSThomas Huth struct kvm_mp_state mp_state; 600fcf5ef2aSThomas Huth int ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_MP_STATE, &mp_state); 601fcf5ef2aSThomas Huth if (ret) { 602fcf5ef2aSThomas Huth fprintf(stderr, "%s: failed to get MP_STATE %d/%s\n", 603fcf5ef2aSThomas Huth __func__, ret, strerror(-ret)); 604fcf5ef2aSThomas Huth abort(); 605fcf5ef2aSThomas Huth } 606062ba099SAlex Bennée cpu->power_state = (mp_state.mp_state == KVM_MP_STATE_STOPPED) ? 607062ba099SAlex Bennée PSCI_OFF : PSCI_ON; 608fcf5ef2aSThomas Huth } 609fcf5ef2aSThomas Huth 610fcf5ef2aSThomas Huth return 0; 611fcf5ef2aSThomas Huth } 612fcf5ef2aSThomas Huth 613*e5ac4200SAndrew Jones void kvm_arm_get_virtual_time(CPUState *cs) 614*e5ac4200SAndrew Jones { 615*e5ac4200SAndrew Jones ARMCPU *cpu = ARM_CPU(cs); 616*e5ac4200SAndrew Jones struct kvm_one_reg reg = { 617*e5ac4200SAndrew Jones .id = KVM_REG_ARM_TIMER_CNT, 618*e5ac4200SAndrew Jones .addr = (uintptr_t)&cpu->kvm_vtime, 619*e5ac4200SAndrew Jones }; 620*e5ac4200SAndrew Jones int ret; 621*e5ac4200SAndrew Jones 622*e5ac4200SAndrew Jones if (cpu->kvm_vtime_dirty) { 623*e5ac4200SAndrew Jones return; 624*e5ac4200SAndrew Jones } 625*e5ac4200SAndrew Jones 626*e5ac4200SAndrew Jones ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, ®); 627*e5ac4200SAndrew Jones if (ret) { 628*e5ac4200SAndrew Jones error_report("Failed to get KVM_REG_ARM_TIMER_CNT"); 629*e5ac4200SAndrew Jones abort(); 630*e5ac4200SAndrew Jones } 631*e5ac4200SAndrew Jones 632*e5ac4200SAndrew Jones cpu->kvm_vtime_dirty = true; 633*e5ac4200SAndrew Jones } 634*e5ac4200SAndrew Jones 635*e5ac4200SAndrew Jones void kvm_arm_put_virtual_time(CPUState *cs) 636*e5ac4200SAndrew Jones { 637*e5ac4200SAndrew Jones ARMCPU *cpu = ARM_CPU(cs); 638*e5ac4200SAndrew Jones struct kvm_one_reg reg = { 639*e5ac4200SAndrew Jones .id = KVM_REG_ARM_TIMER_CNT, 640*e5ac4200SAndrew Jones .addr = (uintptr_t)&cpu->kvm_vtime, 641*e5ac4200SAndrew Jones }; 642*e5ac4200SAndrew Jones int ret; 643*e5ac4200SAndrew Jones 644*e5ac4200SAndrew Jones if (!cpu->kvm_vtime_dirty) { 645*e5ac4200SAndrew Jones return; 646*e5ac4200SAndrew Jones } 647*e5ac4200SAndrew Jones 648*e5ac4200SAndrew Jones ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, ®); 649*e5ac4200SAndrew Jones if (ret) { 650*e5ac4200SAndrew Jones error_report("Failed to set KVM_REG_ARM_TIMER_CNT"); 651*e5ac4200SAndrew Jones abort(); 652*e5ac4200SAndrew Jones } 653*e5ac4200SAndrew Jones 654*e5ac4200SAndrew Jones cpu->kvm_vtime_dirty = false; 655*e5ac4200SAndrew Jones } 656*e5ac4200SAndrew Jones 657202ccb6bSDongjiu Geng int kvm_put_vcpu_events(ARMCPU *cpu) 658202ccb6bSDongjiu Geng { 659202ccb6bSDongjiu Geng CPUARMState *env = &cpu->env; 660202ccb6bSDongjiu Geng struct kvm_vcpu_events events; 661202ccb6bSDongjiu Geng int ret; 662202ccb6bSDongjiu Geng 663202ccb6bSDongjiu Geng if (!kvm_has_vcpu_events()) { 664202ccb6bSDongjiu Geng return 0; 665202ccb6bSDongjiu Geng } 666202ccb6bSDongjiu Geng 667202ccb6bSDongjiu Geng memset(&events, 0, sizeof(events)); 668202ccb6bSDongjiu Geng events.exception.serror_pending = env->serror.pending; 669202ccb6bSDongjiu Geng 670202ccb6bSDongjiu Geng /* Inject SError to guest with specified syndrome if host kernel 671202ccb6bSDongjiu Geng * supports it, otherwise inject SError without syndrome. 672202ccb6bSDongjiu Geng */ 673202ccb6bSDongjiu Geng if (cap_has_inject_serror_esr) { 674202ccb6bSDongjiu Geng events.exception.serror_has_esr = env->serror.has_esr; 675202ccb6bSDongjiu Geng events.exception.serror_esr = env->serror.esr; 676202ccb6bSDongjiu Geng } 677202ccb6bSDongjiu Geng 678202ccb6bSDongjiu Geng ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_VCPU_EVENTS, &events); 679202ccb6bSDongjiu Geng if (ret) { 680202ccb6bSDongjiu Geng error_report("failed to put vcpu events"); 681202ccb6bSDongjiu Geng } 682202ccb6bSDongjiu Geng 683202ccb6bSDongjiu Geng return ret; 684202ccb6bSDongjiu Geng } 685202ccb6bSDongjiu Geng 686202ccb6bSDongjiu Geng int kvm_get_vcpu_events(ARMCPU *cpu) 687202ccb6bSDongjiu Geng { 688202ccb6bSDongjiu Geng CPUARMState *env = &cpu->env; 689202ccb6bSDongjiu Geng struct kvm_vcpu_events events; 690202ccb6bSDongjiu Geng int ret; 691202ccb6bSDongjiu Geng 692202ccb6bSDongjiu Geng if (!kvm_has_vcpu_events()) { 693202ccb6bSDongjiu Geng return 0; 694202ccb6bSDongjiu Geng } 695202ccb6bSDongjiu Geng 696202ccb6bSDongjiu Geng memset(&events, 0, sizeof(events)); 697202ccb6bSDongjiu Geng ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_VCPU_EVENTS, &events); 698202ccb6bSDongjiu Geng if (ret) { 699202ccb6bSDongjiu Geng error_report("failed to get vcpu events"); 700202ccb6bSDongjiu Geng return ret; 701202ccb6bSDongjiu Geng } 702202ccb6bSDongjiu Geng 703202ccb6bSDongjiu Geng env->serror.pending = events.exception.serror_pending; 704202ccb6bSDongjiu Geng env->serror.has_esr = events.exception.serror_has_esr; 705202ccb6bSDongjiu Geng env->serror.esr = events.exception.serror_esr; 706202ccb6bSDongjiu Geng 707202ccb6bSDongjiu Geng return 0; 708202ccb6bSDongjiu Geng } 709202ccb6bSDongjiu Geng 710fcf5ef2aSThomas Huth void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run) 711fcf5ef2aSThomas Huth { 712fcf5ef2aSThomas Huth } 713fcf5ef2aSThomas Huth 714fcf5ef2aSThomas Huth MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *run) 715fcf5ef2aSThomas Huth { 7165d721b78SAlexander Graf ARMCPU *cpu; 7175d721b78SAlexander Graf uint32_t switched_level; 7185d721b78SAlexander Graf 7195d721b78SAlexander Graf if (kvm_irqchip_in_kernel()) { 7205d721b78SAlexander Graf /* 7215d721b78SAlexander Graf * We only need to sync timer states with user-space interrupt 7225d721b78SAlexander Graf * controllers, so return early and save cycles if we don't. 7235d721b78SAlexander Graf */ 7245d721b78SAlexander Graf return MEMTXATTRS_UNSPECIFIED; 7255d721b78SAlexander Graf } 7265d721b78SAlexander Graf 7275d721b78SAlexander Graf cpu = ARM_CPU(cs); 7285d721b78SAlexander Graf 7295d721b78SAlexander Graf /* Synchronize our shadowed in-kernel device irq lines with the kvm ones */ 7305d721b78SAlexander Graf if (run->s.regs.device_irq_level != cpu->device_irq_level) { 7315d721b78SAlexander Graf switched_level = cpu->device_irq_level ^ run->s.regs.device_irq_level; 7325d721b78SAlexander Graf 7335d721b78SAlexander Graf qemu_mutex_lock_iothread(); 7345d721b78SAlexander Graf 7355d721b78SAlexander Graf if (switched_level & KVM_ARM_DEV_EL1_VTIMER) { 7365d721b78SAlexander Graf qemu_set_irq(cpu->gt_timer_outputs[GTIMER_VIRT], 7375d721b78SAlexander Graf !!(run->s.regs.device_irq_level & 7385d721b78SAlexander Graf KVM_ARM_DEV_EL1_VTIMER)); 7395d721b78SAlexander Graf switched_level &= ~KVM_ARM_DEV_EL1_VTIMER; 7405d721b78SAlexander Graf } 7415d721b78SAlexander Graf 7425d721b78SAlexander Graf if (switched_level & KVM_ARM_DEV_EL1_PTIMER) { 7435d721b78SAlexander Graf qemu_set_irq(cpu->gt_timer_outputs[GTIMER_PHYS], 7445d721b78SAlexander Graf !!(run->s.regs.device_irq_level & 7455d721b78SAlexander Graf KVM_ARM_DEV_EL1_PTIMER)); 7465d721b78SAlexander Graf switched_level &= ~KVM_ARM_DEV_EL1_PTIMER; 7475d721b78SAlexander Graf } 7485d721b78SAlexander Graf 749b1659527SAndrew Jones if (switched_level & KVM_ARM_DEV_PMU) { 750b1659527SAndrew Jones qemu_set_irq(cpu->pmu_interrupt, 751b1659527SAndrew Jones !!(run->s.regs.device_irq_level & KVM_ARM_DEV_PMU)); 752b1659527SAndrew Jones switched_level &= ~KVM_ARM_DEV_PMU; 753b1659527SAndrew Jones } 7545d721b78SAlexander Graf 7555d721b78SAlexander Graf if (switched_level) { 7565d721b78SAlexander Graf qemu_log_mask(LOG_UNIMP, "%s: unhandled in-kernel device IRQ %x\n", 7575d721b78SAlexander Graf __func__, switched_level); 7585d721b78SAlexander Graf } 7595d721b78SAlexander Graf 7605d721b78SAlexander Graf /* We also mark unknown levels as processed to not waste cycles */ 7615d721b78SAlexander Graf cpu->device_irq_level = run->s.regs.device_irq_level; 7625d721b78SAlexander Graf qemu_mutex_unlock_iothread(); 7635d721b78SAlexander Graf } 7645d721b78SAlexander Graf 765fcf5ef2aSThomas Huth return MEMTXATTRS_UNSPECIFIED; 766fcf5ef2aSThomas Huth } 767fcf5ef2aSThomas Huth 768*e5ac4200SAndrew Jones void kvm_arm_vm_state_change(void *opaque, int running, RunState state) 769*e5ac4200SAndrew Jones { 770*e5ac4200SAndrew Jones CPUState *cs = opaque; 771*e5ac4200SAndrew Jones ARMCPU *cpu = ARM_CPU(cs); 772*e5ac4200SAndrew Jones 773*e5ac4200SAndrew Jones if (running) { 774*e5ac4200SAndrew Jones if (cpu->kvm_adjvtime) { 775*e5ac4200SAndrew Jones kvm_arm_put_virtual_time(cs); 776*e5ac4200SAndrew Jones } 777*e5ac4200SAndrew Jones } else { 778*e5ac4200SAndrew Jones if (cpu->kvm_adjvtime) { 779*e5ac4200SAndrew Jones kvm_arm_get_virtual_time(cs); 780*e5ac4200SAndrew Jones } 781*e5ac4200SAndrew Jones } 782*e5ac4200SAndrew Jones } 783fcf5ef2aSThomas Huth 784fcf5ef2aSThomas Huth int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run) 785fcf5ef2aSThomas Huth { 786fcf5ef2aSThomas Huth int ret = 0; 787fcf5ef2aSThomas Huth 788fcf5ef2aSThomas Huth switch (run->exit_reason) { 789fcf5ef2aSThomas Huth case KVM_EXIT_DEBUG: 790fcf5ef2aSThomas Huth if (kvm_arm_handle_debug(cs, &run->debug.arch)) { 791fcf5ef2aSThomas Huth ret = EXCP_DEBUG; 792fcf5ef2aSThomas Huth } /* otherwise return to guest */ 793fcf5ef2aSThomas Huth break; 794fcf5ef2aSThomas Huth default: 795fcf5ef2aSThomas Huth qemu_log_mask(LOG_UNIMP, "%s: un-handled exit reason %d\n", 796fcf5ef2aSThomas Huth __func__, run->exit_reason); 797fcf5ef2aSThomas Huth break; 798fcf5ef2aSThomas Huth } 799fcf5ef2aSThomas Huth return ret; 800fcf5ef2aSThomas Huth } 801fcf5ef2aSThomas Huth 802fcf5ef2aSThomas Huth bool kvm_arch_stop_on_emulation_error(CPUState *cs) 803fcf5ef2aSThomas Huth { 804fcf5ef2aSThomas Huth return true; 805fcf5ef2aSThomas Huth } 806fcf5ef2aSThomas Huth 807fcf5ef2aSThomas Huth int kvm_arch_process_async_events(CPUState *cs) 808fcf5ef2aSThomas Huth { 809fcf5ef2aSThomas Huth return 0; 810fcf5ef2aSThomas Huth } 811fcf5ef2aSThomas Huth 812fcf5ef2aSThomas Huth /* The #ifdef protections are until 32bit headers are imported and can 813fcf5ef2aSThomas Huth * be removed once both 32 and 64 bit reach feature parity. 814fcf5ef2aSThomas Huth */ 815fcf5ef2aSThomas Huth void kvm_arch_update_guest_debug(CPUState *cs, struct kvm_guest_debug *dbg) 816fcf5ef2aSThomas Huth { 817fcf5ef2aSThomas Huth #ifdef KVM_GUESTDBG_USE_SW_BP 818fcf5ef2aSThomas Huth if (kvm_sw_breakpoints_active(cs)) { 819fcf5ef2aSThomas Huth dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP; 820fcf5ef2aSThomas Huth } 821fcf5ef2aSThomas Huth #endif 822fcf5ef2aSThomas Huth #ifdef KVM_GUESTDBG_USE_HW 823fcf5ef2aSThomas Huth if (kvm_arm_hw_debug_active(cs)) { 824fcf5ef2aSThomas Huth dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW; 825fcf5ef2aSThomas Huth kvm_arm_copy_hw_debug_data(&dbg->arch); 826fcf5ef2aSThomas Huth } 827fcf5ef2aSThomas Huth #endif 828fcf5ef2aSThomas Huth } 829fcf5ef2aSThomas Huth 830fcf5ef2aSThomas Huth void kvm_arch_init_irq_routing(KVMState *s) 831fcf5ef2aSThomas Huth { 832fcf5ef2aSThomas Huth } 833fcf5ef2aSThomas Huth 8344376c40dSPaolo Bonzini int kvm_arch_irqchip_create(KVMState *s) 835fcf5ef2aSThomas Huth { 8364376c40dSPaolo Bonzini if (kvm_kernel_irqchip_split()) { 837fcf5ef2aSThomas Huth perror("-machine kernel_irqchip=split is not supported on ARM."); 838fcf5ef2aSThomas Huth exit(1); 839fcf5ef2aSThomas Huth } 840fcf5ef2aSThomas Huth 841fcf5ef2aSThomas Huth /* If we can create the VGIC using the newer device control API, we 842fcf5ef2aSThomas Huth * let the device do this when it initializes itself, otherwise we 843fcf5ef2aSThomas Huth * fall back to the old API */ 844fcf5ef2aSThomas Huth return kvm_check_extension(s, KVM_CAP_DEVICE_CTRL); 845fcf5ef2aSThomas Huth } 846fcf5ef2aSThomas Huth 847fcf5ef2aSThomas Huth int kvm_arm_vgic_probe(void) 848fcf5ef2aSThomas Huth { 849fcf5ef2aSThomas Huth if (kvm_create_device(kvm_state, 850fcf5ef2aSThomas Huth KVM_DEV_TYPE_ARM_VGIC_V3, true) == 0) { 851fcf5ef2aSThomas Huth return 3; 852fcf5ef2aSThomas Huth } else if (kvm_create_device(kvm_state, 853fcf5ef2aSThomas Huth KVM_DEV_TYPE_ARM_VGIC_V2, true) == 0) { 854fcf5ef2aSThomas Huth return 2; 855fcf5ef2aSThomas Huth } else { 856fcf5ef2aSThomas Huth return 0; 857fcf5ef2aSThomas Huth } 858fcf5ef2aSThomas Huth } 859fcf5ef2aSThomas Huth 860f6530926SEric Auger int kvm_arm_set_irq(int cpu, int irqtype, int irq, int level) 861f6530926SEric Auger { 862f6530926SEric Auger int kvm_irq = (irqtype << KVM_ARM_IRQ_TYPE_SHIFT) | irq; 863f6530926SEric Auger int cpu_idx1 = cpu % 256; 864f6530926SEric Auger int cpu_idx2 = cpu / 256; 865f6530926SEric Auger 866f6530926SEric Auger kvm_irq |= (cpu_idx1 << KVM_ARM_IRQ_VCPU_SHIFT) | 867f6530926SEric Auger (cpu_idx2 << KVM_ARM_IRQ_VCPU2_SHIFT); 868f6530926SEric Auger 869f6530926SEric Auger return kvm_set_irq(kvm_state, kvm_irq, !!level); 870f6530926SEric Auger } 871f6530926SEric Auger 872fcf5ef2aSThomas Huth int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route, 873fcf5ef2aSThomas Huth uint64_t address, uint32_t data, PCIDevice *dev) 874fcf5ef2aSThomas Huth { 875b05c81d2SEric Auger AddressSpace *as = pci_device_iommu_address_space(dev); 876b05c81d2SEric Auger hwaddr xlat, len, doorbell_gpa; 877b05c81d2SEric Auger MemoryRegionSection mrs; 878b05c81d2SEric Auger MemoryRegion *mr; 879b05c81d2SEric Auger int ret = 1; 880b05c81d2SEric Auger 881b05c81d2SEric Auger if (as == &address_space_memory) { 882fcf5ef2aSThomas Huth return 0; 883fcf5ef2aSThomas Huth } 884fcf5ef2aSThomas Huth 885b05c81d2SEric Auger /* MSI doorbell address is translated by an IOMMU */ 886b05c81d2SEric Auger 887b05c81d2SEric Auger rcu_read_lock(); 888bc6b1cecSPeter Maydell mr = address_space_translate(as, address, &xlat, &len, true, 889bc6b1cecSPeter Maydell MEMTXATTRS_UNSPECIFIED); 890b05c81d2SEric Auger if (!mr) { 891b05c81d2SEric Auger goto unlock; 892b05c81d2SEric Auger } 893b05c81d2SEric Auger mrs = memory_region_find(mr, xlat, 1); 894b05c81d2SEric Auger if (!mrs.mr) { 895b05c81d2SEric Auger goto unlock; 896b05c81d2SEric Auger } 897b05c81d2SEric Auger 898b05c81d2SEric Auger doorbell_gpa = mrs.offset_within_address_space; 899b05c81d2SEric Auger memory_region_unref(mrs.mr); 900b05c81d2SEric Auger 901b05c81d2SEric Auger route->u.msi.address_lo = doorbell_gpa; 902b05c81d2SEric Auger route->u.msi.address_hi = doorbell_gpa >> 32; 903b05c81d2SEric Auger 904b05c81d2SEric Auger trace_kvm_arm_fixup_msi_route(address, doorbell_gpa); 905b05c81d2SEric Auger 906b05c81d2SEric Auger ret = 0; 907b05c81d2SEric Auger 908b05c81d2SEric Auger unlock: 909b05c81d2SEric Auger rcu_read_unlock(); 910b05c81d2SEric Auger return ret; 911b05c81d2SEric Auger } 912b05c81d2SEric Auger 913fcf5ef2aSThomas Huth int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry *route, 914fcf5ef2aSThomas Huth int vector, PCIDevice *dev) 915fcf5ef2aSThomas Huth { 916fcf5ef2aSThomas Huth return 0; 917fcf5ef2aSThomas Huth } 918fcf5ef2aSThomas Huth 919fcf5ef2aSThomas Huth int kvm_arch_release_virq_post(int virq) 920fcf5ef2aSThomas Huth { 921fcf5ef2aSThomas Huth return 0; 922fcf5ef2aSThomas Huth } 923fcf5ef2aSThomas Huth 924fcf5ef2aSThomas Huth int kvm_arch_msi_data_to_gsi(uint32_t data) 925fcf5ef2aSThomas Huth { 926fcf5ef2aSThomas Huth return (data - 32) & 0xffff; 927fcf5ef2aSThomas Huth } 928