xref: /qemu/target/arm/tcg/m-nocp.decode (revision 5ac034b1)
1# M-profile UserFault.NOCP exception handling
2#
3#  Copyright (c) 2020 Linaro, Ltd
4#
5# This library is free software; you can redistribute it and/or
6# modify it under the terms of the GNU Lesser General Public
7# License as published by the Free Software Foundation; either
8# version 2.1 of the License, or (at your option) any later version.
9#
10# This library is distributed in the hope that it will be useful,
11# but WITHOUT ANY WARRANTY; without even the implied warranty of
12# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
13# Lesser General Public License for more details.
14#
15# You should have received a copy of the GNU Lesser General Public
16# License along with this library; if not, see <http://www.gnu.org/licenses/>.
17
18#
19# This file is processed by scripts/decodetree.py
20#
21# For M-profile, the architecture specifies that NOCP UsageFaults
22# should take precedence over UNDEF faults over the whole wide
23# range of coprocessor-space encodings, with the exception of
24# VLLDM and VLSTM. (Compare v8.1M IsCPInstruction() pseudocode and
25# v8M Arm ARM rule R_QLGM.) This isn't mandatory for v8.0M but we choose
26# to behave the same as v8.1M.
27# This decode is handled before any others (and in particular before
28# decoding FP instructions which are in the coprocessor space).
29# If the coprocessor is not present or disabled then we will generate
30# the NOCP exception; otherwise we let the insn through to the main decode.
31
32%vd_dp  22:1 12:4
33%vd_sp  12:4 22:1
34
35&nocp cp
36
37# M-profile VLDR/VSTR to sysreg
38%vldr_sysreg 22:1 13:3
39%imm7_0x4 0:7 !function=times_4
40
41&vldr_sysreg rn reg imm a w p
42@vldr_sysreg .... ... . a:1 . . . rn:4 ... . ... .. ....... \
43             reg=%vldr_sysreg imm=%imm7_0x4 &vldr_sysreg
44
45{
46  # Special cases which do not take an early NOCP: VLLDM and VLSTM
47  VLLDM_VLSTM  1110 1100 001 l:1 rn:4 0000 1010 op:1 000 0000
48  # VSCCLRM (new in v8.1M) is similar:
49  VSCCLRM      1110 1100 1.01 1111 .... 1011 imm:7 0   vd=%vd_dp size=3
50  VSCCLRM      1110 1100 1.01 1111 .... 1010 imm:8     vd=%vd_sp size=2
51
52  # FP system register accesses: these are a special case because accesses
53  # to FPCXT_NS succeed even if the FPU is disabled. We therefore need
54  # to handle them before the big NOCP blocks. Note that within these
55  # insns NOCP still has higher priority than UNDEFs; this is implemented
56  # by their returning 'false' for UNDEF so as to fall through into the
57  # NOCP check (in contrast to VLLDM etc, which call unallocated_encoding()
58  # for the UNDEFs there that must take precedence over NOCP.)
59
60  VMSR_VMRS    ---- 1110 111 l:1 reg:4 rt:4 1010 0001 0000
61
62  # P=0 W=0 is SEE "Related encodings", so split into two patterns
63  VLDR_sysreg  ---- 110 1 . . w:1 1 .... ... 0 111 11 ....... @vldr_sysreg p=1
64  VLDR_sysreg  ---- 110 0 . . 1   1 .... ... 0 111 11 ....... @vldr_sysreg p=0 w=1
65  VSTR_sysreg  ---- 110 1 . . w:1 0 .... ... 0 111 11 ....... @vldr_sysreg p=1
66  VSTR_sysreg  ---- 110 0 . . 1   0 .... ... 0 111 11 ....... @vldr_sysreg p=0 w=1
67
68  NOCP         111- 1110 ---- ---- ---- cp:4 ---- ---- &nocp
69  NOCP         111- 110- ---- ---- ---- cp:4 ---- ---- &nocp
70  # From v8.1M onwards this range will also NOCP:
71  NOCP_8_1     111- 1111 ---- ---- ---- ---- ---- ---- &nocp cp=10
72}
73