xref: /qemu/target/hexagon/reg_fields_def.h.inc (revision 79854b95)
1/*
2 *  Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
3 *
4 *  This program is free software; you can redistribute it and/or modify
5 *  it under the terms of the GNU General Public License as published by
6 *  the Free Software Foundation; either version 2 of the License, or
7 *  (at your option) any later version.
8 *
9 *  This program is distributed in the hope that it will be useful,
10 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
11 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12 *  GNU General Public License for more details.
13 *
14 *  You should have received a copy of the GNU General Public License
15 *  along with this program; if not, see <http://www.gnu.org/licenses/>.
16 */
17
18/*
19 * For registers that have individual fields, explain them here
20 *   DEF_REG_FIELD(tag,
21 *                 bit start offset,
22 *                 width
23 */
24
25/* USR fields */
26DEF_REG_FIELD(USR_OVF,            0, 1)
27DEF_REG_FIELD(USR_FPINVF,         1, 1)
28DEF_REG_FIELD(USR_FPDBZF,         2, 1)
29DEF_REG_FIELD(USR_FPOVFF,         3, 1)
30DEF_REG_FIELD(USR_FPUNFF,         4, 1)
31DEF_REG_FIELD(USR_FPINPF,         5, 1)
32
33DEF_REG_FIELD(USR_LPCFG,          8, 2)
34
35DEF_REG_FIELD(USR_FPRND,         22, 2)
36
37DEF_REG_FIELD(USR_FPINVE,        25, 1)
38DEF_REG_FIELD(USR_FPDBZE,        26, 1)
39DEF_REG_FIELD(USR_FPOVFE,        27, 1)
40DEF_REG_FIELD(USR_FPUNFE,        28, 1)
41DEF_REG_FIELD(USR_FPINPE,        29, 1)
42