1 /* 2 * x86 KVM CPU type initialization 3 * 4 * Copyright 2021 SUSE LLC 5 * 6 * This work is licensed under the terms of the GNU GPL, version 2 or later. 7 * See the COPYING file in the top-level directory. 8 */ 9 10 #include "qemu/osdep.h" 11 #include "cpu.h" 12 #include "host-cpu.h" 13 #include "kvm-cpu.h" 14 #include "qapi/error.h" 15 #include "sysemu/sysemu.h" 16 #include "hw/boards.h" 17 18 #include "kvm_i386.h" 19 #include "hw/core/accel-cpu.h" 20 21 static bool kvm_cpu_realizefn(CPUState *cs, Error **errp) 22 { 23 X86CPU *cpu = X86_CPU(cs); 24 CPUX86State *env = &cpu->env; 25 26 /* 27 * The realize order is important, since x86_cpu_realize() checks if 28 * nothing else has been set by the user (or by accelerators) in 29 * cpu->ucode_rev and cpu->phys_bits, and updates the CPUID results in 30 * mwait.ecx. 31 * This accel realization code also assumes cpu features are already expanded. 32 * 33 * realize order: 34 * 35 * x86_cpu_realize(): 36 * -> x86_cpu_expand_features() 37 * -> cpu_exec_realizefn(): 38 * -> accel_cpu_realizefn() 39 * kvm_cpu_realizefn() -> host_cpu_realizefn() 40 * -> check/update ucode_rev, phys_bits, mwait 41 */ 42 if (cpu->max_features) { 43 if (enable_cpu_pm && kvm_has_waitpkg()) { 44 env->features[FEAT_7_0_ECX] |= CPUID_7_0_ECX_WAITPKG; 45 } 46 if (cpu->ucode_rev == 0) { 47 cpu->ucode_rev = 48 kvm_arch_get_supported_msr_feature(kvm_state, 49 MSR_IA32_UCODE_REV); 50 } 51 } 52 return host_cpu_realizefn(cs, errp); 53 } 54 55 static bool lmce_supported(void) 56 { 57 uint64_t mce_cap = 0; 58 59 if (kvm_ioctl(kvm_state, KVM_X86_GET_MCE_CAP_SUPPORTED, &mce_cap) < 0) { 60 return false; 61 } 62 return !!(mce_cap & MCG_LMCE_P); 63 } 64 65 static void kvm_cpu_max_instance_init(X86CPU *cpu) 66 { 67 CPUX86State *env = &cpu->env; 68 KVMState *s = kvm_state; 69 70 host_cpu_max_instance_init(cpu); 71 72 if (lmce_supported()) { 73 object_property_set_bool(OBJECT(cpu), "lmce", true, &error_abort); 74 } 75 76 env->cpuid_min_level = 77 kvm_arch_get_supported_cpuid(s, 0x0, 0, R_EAX); 78 env->cpuid_min_xlevel = 79 kvm_arch_get_supported_cpuid(s, 0x80000000, 0, R_EAX); 80 env->cpuid_min_xlevel2 = 81 kvm_arch_get_supported_cpuid(s, 0xC0000000, 0, R_EAX); 82 } 83 84 static void kvm_cpu_xsave_init(void) 85 { 86 static bool first = true; 87 uint32_t eax, ebx, ecx, edx; 88 int i; 89 90 if (!first) { 91 return; 92 } 93 first = false; 94 95 /* x87 and SSE states are in the legacy region of the XSAVE area. */ 96 x86_ext_save_areas[XSTATE_FP_BIT].offset = 0; 97 x86_ext_save_areas[XSTATE_SSE_BIT].offset = 0; 98 99 for (i = XSTATE_SSE_BIT + 1; i < XSAVE_STATE_AREA_COUNT; i++) { 100 ExtSaveArea *esa = &x86_ext_save_areas[i]; 101 102 if (esa->size) { 103 host_cpuid(0xd, i, &eax, &ebx, &ecx, &edx); 104 if (eax != 0) { 105 assert(esa->size == eax); 106 esa->offset = ebx; 107 esa->ecx = ecx; 108 } 109 } 110 } 111 } 112 113 /* 114 * KVM-specific features that are automatically added/removed 115 * from cpudef models when KVM is enabled. 116 * Only for builtin_x86_defs models initialized with x86_register_cpudef_types. 117 * 118 * NOTE: features can be enabled by default only if they were 119 * already available in the oldest kernel version supported 120 * by the KVM accelerator (see "OS requirements" section at 121 * docs/system/target-i386.rst) 122 */ 123 static PropValue kvm_default_props[] = { 124 { "kvmclock", "on" }, 125 { "kvm-nopiodelay", "on" }, 126 { "kvm-asyncpf", "on" }, 127 { "kvm-steal-time", "on" }, 128 { "kvm-pv-eoi", "on" }, 129 { "kvmclock-stable-bit", "on" }, 130 { "x2apic", "on" }, 131 { "kvm-msi-ext-dest-id", "off" }, 132 { "acpi", "off" }, 133 { "monitor", "off" }, 134 { "svm", "off" }, 135 { NULL, NULL }, 136 }; 137 138 /* 139 * Only for builtin_x86_defs models initialized with x86_register_cpudef_types. 140 */ 141 void x86_cpu_change_kvm_default(const char *prop, const char *value) 142 { 143 PropValue *pv; 144 for (pv = kvm_default_props; pv->prop; pv++) { 145 if (!strcmp(pv->prop, prop)) { 146 pv->value = value; 147 break; 148 } 149 } 150 151 /* 152 * It is valid to call this function only for properties that 153 * are already present in the kvm_default_props table. 154 */ 155 assert(pv->prop); 156 } 157 158 static void kvm_cpu_instance_init(CPUState *cs) 159 { 160 X86CPU *cpu = X86_CPU(cs); 161 X86CPUClass *xcc = X86_CPU_GET_CLASS(cpu); 162 163 host_cpu_instance_init(cpu); 164 165 if (xcc->model) { 166 /* only applies to builtin_x86_defs cpus */ 167 if (!kvm_irqchip_in_kernel()) { 168 x86_cpu_change_kvm_default("x2apic", "off"); 169 } else if (kvm_irqchip_is_split() && kvm_enable_x2apic()) { 170 x86_cpu_change_kvm_default("kvm-msi-ext-dest-id", "on"); 171 } 172 173 /* Special cases not set in the X86CPUDefinition structs: */ 174 x86_cpu_apply_props(cpu, kvm_default_props); 175 } 176 177 if (cpu->max_features) { 178 kvm_cpu_max_instance_init(cpu); 179 } 180 181 kvm_cpu_xsave_init(); 182 } 183 184 static void kvm_cpu_accel_class_init(ObjectClass *oc, void *data) 185 { 186 AccelCPUClass *acc = ACCEL_CPU_CLASS(oc); 187 188 acc->cpu_realizefn = kvm_cpu_realizefn; 189 acc->cpu_instance_init = kvm_cpu_instance_init; 190 } 191 static const TypeInfo kvm_cpu_accel_type_info = { 192 .name = ACCEL_CPU_NAME("kvm"), 193 194 .parent = TYPE_ACCEL_CPU, 195 .class_init = kvm_cpu_accel_class_init, 196 .abstract = true, 197 }; 198 static void kvm_cpu_accel_register_types(void) 199 { 200 type_register_static(&kvm_cpu_accel_type_info); 201 } 202 type_init(kvm_cpu_accel_register_types); 203