xref: /qemu/target/i386/tcg/sysemu/fpu_helper.c (revision b49f4755)
1 /*
2  *  x86 FPU, MMX/3DNow!/SSE/SSE2/SSE3/SSSE3/SSE4/PNI helpers (sysemu code)
3  *
4  *  Copyright (c) 2003 Fabrice Bellard
5  *
6  * This library is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU Lesser General Public
8  * License as published by the Free Software Foundation; either
9  * version 2.1 of the License, or (at your option) any later version.
10  *
11  * This library is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14  * Lesser General Public License for more details.
15  *
16  * You should have received a copy of the GNU Lesser General Public
17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18  */
19 
20 #include "qemu/osdep.h"
21 #include "qemu/main-loop.h"
22 #include "cpu.h"
23 #include "hw/irq.h"
24 
25 static qemu_irq ferr_irq;
26 
27 void x86_register_ferr_irq(qemu_irq irq)
28 {
29     ferr_irq = irq;
30 }
31 
32 void fpu_check_raise_ferr_irq(CPUX86State *env)
33 {
34     if (ferr_irq && !(env->hflags2 & HF2_IGNNE_MASK)) {
35         qemu_mutex_lock_iothread();
36         qemu_irq_raise(ferr_irq);
37         qemu_mutex_unlock_iothread();
38         return;
39     }
40 }
41 
42 void cpu_clear_ignne(void)
43 {
44     CPUX86State *env = &X86_CPU(first_cpu)->env;
45     env->hflags2 &= ~HF2_IGNNE_MASK;
46 }
47 
48 void cpu_set_ignne(void)
49 {
50     CPUX86State *env = &X86_CPU(first_cpu)->env;
51 
52     assert(qemu_mutex_iothread_locked());
53 
54     env->hflags2 |= HF2_IGNNE_MASK;
55     /*
56      * We get here in response to a write to port F0h.  The chipset should
57      * deassert FP_IRQ and FERR# instead should stay signaled until FPSW_SE is
58      * cleared, because FERR# and FP_IRQ are two separate pins on real
59      * hardware.  However, we don't model FERR# as a qemu_irq, so we just
60      * do directly what the chipset would do, i.e. deassert FP_IRQ.
61      */
62     qemu_irq_lower(ferr_irq);
63 }
64