1/* SPDX-License-Identifier: GPL-2.0-or-later */
2/*
3 * Copyright (c) 2021 Loongson Technology Corporation Limited
4 */
5
6static bool gen_ll(DisasContext *ctx, arg_rr_i *a, MemOp mop)
7{
8    TCGv dest = gpr_dst(ctx, a->rd, EXT_NONE);
9    TCGv src1 = gpr_src(ctx, a->rj, EXT_NONE);
10    TCGv t0 = make_address_i(ctx, src1, a->imm);
11
12    tcg_gen_qemu_ld_i64(dest, t0, ctx->mem_idx, mop);
13    tcg_gen_st_tl(t0, tcg_env, offsetof(CPULoongArchState, lladdr));
14    tcg_gen_st_tl(dest, tcg_env, offsetof(CPULoongArchState, llval));
15    gen_set_gpr(a->rd, dest, EXT_NONE);
16
17    return true;
18}
19
20static bool gen_sc(DisasContext *ctx, arg_rr_i *a, MemOp mop)
21{
22    TCGv dest = gpr_dst(ctx, a->rd, EXT_NONE);
23    TCGv src1 = gpr_src(ctx, a->rj, EXT_NONE);
24    TCGv src2 = gpr_src(ctx, a->rd, EXT_NONE);
25    TCGv t0 = tcg_temp_new();
26    TCGv val = tcg_temp_new();
27
28    TCGLabel *l1 = gen_new_label();
29    TCGLabel *done = gen_new_label();
30
31    tcg_gen_addi_tl(t0, src1, a->imm);
32    tcg_gen_brcond_tl(TCG_COND_EQ, t0, cpu_lladdr, l1);
33    tcg_gen_movi_tl(dest, 0);
34    tcg_gen_br(done);
35
36    gen_set_label(l1);
37    tcg_gen_mov_tl(val, src2);
38    /* generate cmpxchg */
39    tcg_gen_atomic_cmpxchg_tl(t0, cpu_lladdr, cpu_llval,
40                              val, ctx->mem_idx, mop);
41    tcg_gen_setcond_tl(TCG_COND_EQ, dest, t0, cpu_llval);
42    gen_set_label(done);
43    gen_set_gpr(a->rd, dest, EXT_NONE);
44
45    return true;
46}
47
48static bool gen_am(DisasContext *ctx, arg_rrr *a,
49                   void (*func)(TCGv, TCGv, TCGv, TCGArg, MemOp),
50                   MemOp mop)
51{
52    TCGv dest = gpr_dst(ctx, a->rd, EXT_NONE);
53    TCGv addr = gpr_src(ctx, a->rj, EXT_NONE);
54    TCGv val = gpr_src(ctx, a->rk, EXT_NONE);
55
56    if (a->rd != 0 && (a->rj == a->rd || a->rk == a->rd)) {
57        qemu_log_mask(LOG_GUEST_ERROR,
58                      "Warning: source register overlaps destination register"
59                      "in atomic insn at pc=0x" TARGET_FMT_lx "\n",
60                      ctx->base.pc_next - 4);
61        return false;
62    }
63
64    addr = make_address_i(ctx, addr, 0);
65
66    func(dest, addr, val, ctx->mem_idx, mop);
67    gen_set_gpr(a->rd, dest, EXT_NONE);
68
69    return true;
70}
71
72TRANS(ll_w, ALL, gen_ll, MO_TESL)
73TRANS(sc_w, ALL, gen_sc, MO_TESL)
74TRANS(ll_d, 64, gen_ll, MO_TEUQ)
75TRANS(sc_d, 64, gen_sc, MO_TEUQ)
76TRANS(amswap_w, LAM, gen_am, tcg_gen_atomic_xchg_tl, MO_TESL)
77TRANS(amswap_d, LAM, gen_am, tcg_gen_atomic_xchg_tl, MO_TEUQ)
78TRANS(amadd_w, LAM, gen_am, tcg_gen_atomic_fetch_add_tl, MO_TESL)
79TRANS(amadd_d, LAM, gen_am, tcg_gen_atomic_fetch_add_tl, MO_TEUQ)
80TRANS(amand_w, LAM, gen_am, tcg_gen_atomic_fetch_and_tl, MO_TESL)
81TRANS(amand_d, LAM, gen_am, tcg_gen_atomic_fetch_and_tl, MO_TEUQ)
82TRANS(amor_w, LAM, gen_am, tcg_gen_atomic_fetch_or_tl, MO_TESL)
83TRANS(amor_d, LAM, gen_am, tcg_gen_atomic_fetch_or_tl, MO_TEUQ)
84TRANS(amxor_w, LAM, gen_am, tcg_gen_atomic_fetch_xor_tl, MO_TESL)
85TRANS(amxor_d, LAM, gen_am, tcg_gen_atomic_fetch_xor_tl, MO_TEUQ)
86TRANS(ammax_w, LAM, gen_am, tcg_gen_atomic_fetch_smax_tl, MO_TESL)
87TRANS(ammax_d, LAM, gen_am, tcg_gen_atomic_fetch_smax_tl, MO_TEUQ)
88TRANS(ammin_w, LAM, gen_am, tcg_gen_atomic_fetch_smin_tl, MO_TESL)
89TRANS(ammin_d, LAM, gen_am, tcg_gen_atomic_fetch_smin_tl, MO_TEUQ)
90TRANS(ammax_wu, LAM, gen_am, tcg_gen_atomic_fetch_umax_tl, MO_TESL)
91TRANS(ammax_du, LAM, gen_am, tcg_gen_atomic_fetch_umax_tl, MO_TEUQ)
92TRANS(ammin_wu, LAM, gen_am, tcg_gen_atomic_fetch_umin_tl, MO_TESL)
93TRANS(ammin_du, LAM, gen_am, tcg_gen_atomic_fetch_umin_tl, MO_TEUQ)
94TRANS(amswap_db_w, LAM, gen_am, tcg_gen_atomic_xchg_tl, MO_TESL)
95TRANS(amswap_db_d, LAM, gen_am, tcg_gen_atomic_xchg_tl, MO_TEUQ)
96TRANS(amadd_db_w, LAM, gen_am, tcg_gen_atomic_fetch_add_tl, MO_TESL)
97TRANS(amadd_db_d, LAM, gen_am, tcg_gen_atomic_fetch_add_tl, MO_TEUQ)
98TRANS(amand_db_w, LAM, gen_am, tcg_gen_atomic_fetch_and_tl, MO_TESL)
99TRANS(amand_db_d, LAM, gen_am, tcg_gen_atomic_fetch_and_tl, MO_TEUQ)
100TRANS(amor_db_w, LAM, gen_am, tcg_gen_atomic_fetch_or_tl, MO_TESL)
101TRANS(amor_db_d, LAM, gen_am, tcg_gen_atomic_fetch_or_tl, MO_TEUQ)
102TRANS(amxor_db_w, LAM, gen_am, tcg_gen_atomic_fetch_xor_tl, MO_TESL)
103TRANS(amxor_db_d, LAM, gen_am, tcg_gen_atomic_fetch_xor_tl, MO_TEUQ)
104TRANS(ammax_db_w, LAM, gen_am, tcg_gen_atomic_fetch_smax_tl, MO_TESL)
105TRANS(ammax_db_d, LAM, gen_am, tcg_gen_atomic_fetch_smax_tl, MO_TEUQ)
106TRANS(ammin_db_w, LAM, gen_am, tcg_gen_atomic_fetch_smin_tl, MO_TESL)
107TRANS(ammin_db_d, LAM, gen_am, tcg_gen_atomic_fetch_smin_tl, MO_TEUQ)
108TRANS(ammax_db_wu, LAM, gen_am, tcg_gen_atomic_fetch_umax_tl, MO_TESL)
109TRANS(ammax_db_du, LAM, gen_am, tcg_gen_atomic_fetch_umax_tl, MO_TEUQ)
110TRANS(ammin_db_wu, LAM, gen_am, tcg_gen_atomic_fetch_umin_tl, MO_TESL)
111TRANS(ammin_db_du, LAM, gen_am, tcg_gen_atomic_fetch_umin_tl, MO_TEUQ)
112