xref: /qemu/target/ppc/compat.c (revision 00fcd100)
1 /*
2  *  PowerPC CPU initialization for qemu.
3  *
4  *  Copyright 2016, David Gibson, Red Hat Inc. <dgibson@redhat.com>
5  *
6  * This library is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU Lesser General Public
8  * License as published by the Free Software Foundation; either
9  * version 2 of the License, or (at your option) any later version.
10  *
11  * This library is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14  * Lesser General Public License for more details.
15  *
16  * You should have received a copy of the GNU Lesser General Public
17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18  */
19 
20 #include "qemu/osdep.h"
21 #include "sysemu/hw_accel.h"
22 #include "sysemu/kvm.h"
23 #include "kvm_ppc.h"
24 #include "sysemu/cpus.h"
25 #include "qemu/error-report.h"
26 #include "qapi/error.h"
27 #include "cpu-models.h"
28 
29 typedef struct {
30     uint32_t pvr;
31     uint64_t pcr;
32     uint64_t pcr_level;
33     int max_threads;
34 } CompatInfo;
35 
36 static const CompatInfo compat_table[] = {
37     /*
38      * Ordered from oldest to newest - the code relies on this
39      */
40     { /* POWER6, ISA2.05 */
41         .pvr = CPU_POWERPC_LOGICAL_2_05,
42         .pcr = PCR_COMPAT_3_00 | PCR_COMPAT_2_07 | PCR_COMPAT_2_06 |
43                PCR_COMPAT_2_05 | PCR_TM_DIS | PCR_VSX_DIS,
44         .pcr_level = PCR_COMPAT_2_05,
45         .max_threads = 2,
46     },
47     { /* POWER7, ISA2.06 */
48         .pvr = CPU_POWERPC_LOGICAL_2_06,
49         .pcr = PCR_COMPAT_3_00 | PCR_COMPAT_2_07 | PCR_COMPAT_2_06 | PCR_TM_DIS,
50         .pcr_level = PCR_COMPAT_2_06,
51         .max_threads = 4,
52     },
53     {
54         .pvr = CPU_POWERPC_LOGICAL_2_06_PLUS,
55         .pcr = PCR_COMPAT_3_00 | PCR_COMPAT_2_07 | PCR_COMPAT_2_06 | PCR_TM_DIS,
56         .pcr_level = PCR_COMPAT_2_06,
57         .max_threads = 4,
58     },
59     { /* POWER8, ISA2.07 */
60         .pvr = CPU_POWERPC_LOGICAL_2_07,
61         .pcr = PCR_COMPAT_3_00 | PCR_COMPAT_2_07,
62         .pcr_level = PCR_COMPAT_2_07,
63         .max_threads = 8,
64     },
65     { /* POWER9, ISA3.00 */
66         .pvr = CPU_POWERPC_LOGICAL_3_00,
67         .pcr = PCR_COMPAT_3_00,
68         .pcr_level = PCR_COMPAT_3_00,
69         .max_threads = 4,
70     },
71 };
72 
73 static const CompatInfo *compat_by_pvr(uint32_t pvr)
74 {
75     int i;
76 
77     for (i = 0; i < ARRAY_SIZE(compat_table); i++) {
78         if (compat_table[i].pvr == pvr) {
79             return &compat_table[i];
80         }
81     }
82     return NULL;
83 }
84 
85 bool ppc_check_compat(PowerPCCPU *cpu, uint32_t compat_pvr,
86                       uint32_t min_compat_pvr, uint32_t max_compat_pvr)
87 {
88     PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
89     const CompatInfo *compat = compat_by_pvr(compat_pvr);
90     const CompatInfo *min = compat_by_pvr(min_compat_pvr);
91     const CompatInfo *max = compat_by_pvr(max_compat_pvr);
92 
93 #if !defined(CONFIG_USER_ONLY)
94     g_assert(cpu->vhyp);
95 #endif
96     g_assert(!min_compat_pvr || min);
97     g_assert(!max_compat_pvr || max);
98 
99     if (!compat) {
100         /* Not a recognized logical PVR */
101         return false;
102     }
103     if ((min && (compat < min)) || (max && (compat > max))) {
104         /* Outside specified range */
105         return false;
106     }
107     if (!(pcc->pcr_supported & compat->pcr_level)) {
108         /* Not supported by this CPU */
109         return false;
110     }
111     return true;
112 }
113 
114 void ppc_set_compat(PowerPCCPU *cpu, uint32_t compat_pvr, Error **errp)
115 {
116     const CompatInfo *compat = compat_by_pvr(compat_pvr);
117     CPUPPCState *env = &cpu->env;
118     PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
119     uint64_t pcr;
120 
121     if (!compat_pvr) {
122         pcr = 0;
123     } else if (!compat) {
124         error_setg(errp, "Unknown compatibility PVR 0x%08"PRIx32, compat_pvr);
125         return;
126     } else if (!ppc_check_compat(cpu, compat_pvr, 0, 0)) {
127         error_setg(errp, "Compatibility PVR 0x%08"PRIx32" not valid for CPU",
128                    compat_pvr);
129         return;
130     } else {
131         pcr = compat->pcr;
132     }
133 
134     cpu_synchronize_state(CPU(cpu));
135 
136     cpu->compat_pvr = compat_pvr;
137     env->spr[SPR_PCR] = pcr & pcc->pcr_mask;
138 
139     if (kvm_enabled()) {
140         int ret = kvmppc_set_compat(cpu, cpu->compat_pvr);
141         if (ret < 0) {
142             error_setg_errno(errp, -ret,
143                              "Unable to set CPU compatibility mode in KVM");
144         }
145     }
146 }
147 
148 typedef struct {
149     uint32_t compat_pvr;
150     Error *err;
151 } SetCompatState;
152 
153 static void do_set_compat(CPUState *cs, run_on_cpu_data arg)
154 {
155     PowerPCCPU *cpu = POWERPC_CPU(cs);
156     SetCompatState *s = arg.host_ptr;
157 
158     ppc_set_compat(cpu, s->compat_pvr, &s->err);
159 }
160 
161 void ppc_set_compat_all(uint32_t compat_pvr, Error **errp)
162 {
163     CPUState *cs;
164 
165     CPU_FOREACH(cs) {
166         SetCompatState s = {
167             .compat_pvr = compat_pvr,
168             .err = NULL,
169         };
170 
171         run_on_cpu(cs, do_set_compat, RUN_ON_CPU_HOST_PTR(&s));
172 
173         if (s.err) {
174             error_propagate(errp, s.err);
175             return;
176         }
177     }
178 }
179 
180 int ppc_compat_max_threads(PowerPCCPU *cpu)
181 {
182     const CompatInfo *compat = compat_by_pvr(cpu->compat_pvr);
183     int n_threads = CPU(cpu)->nr_threads;
184 
185     if (cpu->compat_pvr) {
186         g_assert(compat);
187         n_threads = MIN(n_threads, compat->max_threads);
188     }
189 
190     return n_threads;
191 }
192