1# 2# Power ISA decode for 32-bit insns (opcode space 0) 3# 4# Copyright (c) 2021 Instituto de Pesquisas Eldorado (eldorado.org.br) 5# 6# This library is free software; you can redistribute it and/or 7# modify it under the terms of the GNU Lesser General Public 8# License as published by the Free Software Foundation; either 9# version 2.1 of the License, or (at your option) any later version. 10# 11# This library is distributed in the hope that it will be useful, 12# but WITHOUT ANY WARRANTY; without even the implied warranty of 13# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14# Lesser General Public License for more details. 15# 16# You should have received a copy of the GNU Lesser General Public 17# License along with this library; if not, see <http://www.gnu.org/licenses/>. 18# 19 20&D rt ra si:int64_t 21@D ...... rt:5 ra:5 si:s16 &D 22 23&D_bf bf l:bool ra imm 24@D_bfs ...... bf:3 - l:1 ra:5 imm:s16 &D_bf 25@D_bfu ...... bf:3 - l:1 ra:5 imm:16 &D_bf 26 27%dq_si 4:s12 !function=times_16 28%dq_rtp 22:4 !function=times_2 29@DQ_rtp ...... ....0 ra:5 ............ .... &D rt=%dq_rtp si=%dq_si 30 31%ds_si 2:s14 !function=times_4 32@DS ...... rt:5 ra:5 .............. .. &D si=%ds_si 33 34%ds_rtp 22:4 !function=times_2 35@DS_rtp ...... ....0 ra:5 .............. .. &D rt=%ds_rtp si=%ds_si 36 37&DX rt d 38%dx_d 6:s10 16:5 0:1 39@DX ...... rt:5 ..... .......... ..... . &DX d=%dx_d 40 41&VX vrt vra vrb 42@VX ...... vrt:5 vra:5 vrb:5 .......... . &VX 43 44&X rt ra rb 45@X ...... rt:5 ra:5 rb:5 .......... . &X 46 47&X_bi rt bi 48@X_bi ...... rt:5 bi:5 ----- .......... - &X_bi 49 50&X_bfl bf l:bool ra rb 51@X_bfl ...... bf:3 - l:1 ra:5 rb:5 ..........- &X_bfl 52 53&X_frtp_vrb frtp vrb 54%x_frtp 22:4 !function=times_2 55@X_frtp_vrb ...... ....0 ..... vrb:5 .......... . &X_frtp_vrb frtp=%x_frtp 56 57### Fixed-Point Load Instructions 58 59LBZ 100010 ..... ..... ................ @D 60LBZU 100011 ..... ..... ................ @D 61LBZX 011111 ..... ..... ..... 0001010111 - @X 62LBZUX 011111 ..... ..... ..... 0001110111 - @X 63 64LHZ 101000 ..... ..... ................ @D 65LHZU 101001 ..... ..... ................ @D 66LHZX 011111 ..... ..... ..... 0100010111 - @X 67LHZUX 011111 ..... ..... ..... 0100110111 - @X 68 69LHA 101010 ..... ..... ................ @D 70LHAU 101011 ..... ..... ................ @D 71LHAX 011111 ..... ..... ..... 0101010111 - @X 72LHAXU 011111 ..... ..... ..... 0101110111 - @X 73 74LWZ 100000 ..... ..... ................ @D 75LWZU 100001 ..... ..... ................ @D 76LWZX 011111 ..... ..... ..... 0000010111 - @X 77LWZUX 011111 ..... ..... ..... 0000110111 - @X 78 79LWA 111010 ..... ..... ..............10 @DS 80LWAX 011111 ..... ..... ..... 0101010101 - @X 81LWAUX 011111 ..... ..... ..... 0101110101 - @X 82 83LD 111010 ..... ..... ..............00 @DS 84LDU 111010 ..... ..... ..............01 @DS 85LDX 011111 ..... ..... ..... 0000010101 - @X 86LDUX 011111 ..... ..... ..... 0000110101 - @X 87 88LQ 111000 ..... ..... ............ ---- @DQ_rtp 89 90### Fixed-Point Store Instructions 91 92STB 100110 ..... ..... ................ @D 93STBU 100111 ..... ..... ................ @D 94STBX 011111 ..... ..... ..... 0011010111 - @X 95STBUX 011111 ..... ..... ..... 0011110111 - @X 96 97STH 101100 ..... ..... ................ @D 98STHU 101101 ..... ..... ................ @D 99STHX 011111 ..... ..... ..... 0110010111 - @X 100STHUX 011111 ..... ..... ..... 0110110111 - @X 101 102STW 100100 ..... ..... ................ @D 103STWU 100101 ..... ..... ................ @D 104STWX 011111 ..... ..... ..... 0010010111 - @X 105STWUX 011111 ..... ..... ..... 0010110111 - @X 106 107STD 111110 ..... ..... ..............00 @DS 108STDU 111110 ..... ..... ..............01 @DS 109STDX 011111 ..... ..... ..... 0010010101 - @X 110STDUX 011111 ..... ..... ..... 0010110101 - @X 111 112STQ 111110 ..... ..... ..............10 @DS_rtp 113 114### Fixed-Point Compare Instructions 115 116CMP 011111 ... - . ..... ..... 0000000000 - @X_bfl 117CMPL 011111 ... - . ..... ..... 0000100000 - @X_bfl 118CMPI 001011 ... - . ..... ................ @D_bfs 119CMPLI 001010 ... - . ..... ................ @D_bfu 120 121### Fixed-Point Arithmetic Instructions 122 123ADDI 001110 ..... ..... ................ @D 124ADDIS 001111 ..... ..... ................ @D 125 126ADDPCIS 010011 ..... ..... .......... 00010 . @DX 127 128## Fixed-Point Logical Instructions 129 130CFUGED 011111 ..... ..... ..... 0011011100 - @X 131CNTLZDM 011111 ..... ..... ..... 0000111011 - @X 132CNTTZDM 011111 ..... ..... ..... 1000111011 - @X 133PDEPD 011111 ..... ..... ..... 0010011100 - @X 134PEXTD 011111 ..... ..... ..... 0010111100 - @X 135 136### Float-Point Load Instructions 137 138LFS 110000 ..... ..... ................ @D 139LFSU 110001 ..... ..... ................ @D 140LFSX 011111 ..... ..... ..... 1000010111 - @X 141LFSUX 011111 ..... ..... ..... 1000110111 - @X 142 143LFD 110010 ..... ..... ................ @D 144LFDU 110011 ..... ..... ................ @D 145LFDX 011111 ..... ..... ..... 1001010111 - @X 146LFDUX 011111 ..... ..... ..... 1001110111 - @X 147 148### Float-Point Store Instructions 149 150STFS 110100 ..... ...... ............... @D 151STFSU 110101 ..... ...... ............... @D 152STFSX 011111 ..... ...... .... 1010010111 - @X 153STFSUX 011111 ..... ...... .... 1010110111 - @X 154 155STFD 110110 ..... ...... ............... @D 156STFDU 110111 ..... ...... ............... @D 157STFDX 011111 ..... ...... .... 1011010111 - @X 158STFDUX 011111 ..... ...... .... 1011110111 - @X 159 160### Move To/From System Register Instructions 161 162SETBC 011111 ..... ..... ----- 0110000000 - @X_bi 163SETBCR 011111 ..... ..... ----- 0110100000 - @X_bi 164SETNBC 011111 ..... ..... ----- 0111000000 - @X_bi 165SETNBCR 011111 ..... ..... ----- 0111100000 - @X_bi 166 167### Decimal Floating-Point Conversion Instructions 168 169DCFFIXQQ 111111 ..... 00000 ..... 1111100010 - @X_frtp_vrb 170 171## Vector Bit Manipulation Instruction 172 173VCFUGED 000100 ..... ..... ..... 10101001101 @VX 174