1 /* 2 * PowerPC internal definitions for qemu. 3 * 4 * This library is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU Lesser General Public 6 * License as published by the Free Software Foundation; either 7 * version 2.1 of the License, or (at your option) any later version. 8 * 9 * This library is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 12 * Lesser General Public License for more details. 13 * 14 * You should have received a copy of the GNU Lesser General Public 15 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 16 */ 17 18 #ifndef PPC_INTERNAL_H 19 #define PPC_INTERNAL_H 20 21 #include "exec/breakpoint.h" 22 #include "hw/registerfields.h" 23 24 /* PM instructions */ 25 typedef enum { 26 PPC_PM_DOZE, 27 PPC_PM_NAP, 28 PPC_PM_SLEEP, 29 PPC_PM_RVWINKLE, 30 PPC_PM_STOP, 31 } powerpc_pm_insn_t; 32 33 #define FUNC_MASK(name, ret_type, size, max_val) \ 34 static inline ret_type name(uint##size##_t start, \ 35 uint##size##_t end) \ 36 { \ 37 ret_type ret, max_bit = size - 1; \ 38 \ 39 if (likely(start == 0)) { \ 40 ret = max_val << (max_bit - end); \ 41 } else if (likely(end == max_bit)) { \ 42 ret = max_val >> start; \ 43 } else { \ 44 ret = (((uint##size##_t)(-1ULL)) >> (start)) ^ \ 45 (((uint##size##_t)(-1ULL) >> (end)) >> 1); \ 46 if (unlikely(start > end)) { \ 47 return ~ret; \ 48 } \ 49 } \ 50 \ 51 return ret; \ 52 } 53 54 #if defined(TARGET_PPC64) 55 FUNC_MASK(MASK, target_ulong, 64, UINT64_MAX); 56 #else 57 FUNC_MASK(MASK, target_ulong, 32, UINT32_MAX); 58 #endif 59 FUNC_MASK(mask_u32, uint32_t, 32, UINT32_MAX); 60 FUNC_MASK(mask_u64, uint64_t, 64, UINT64_MAX); 61 62 /*****************************************************************************/ 63 /*** Instruction decoding ***/ 64 #define EXTRACT_HELPER(name, shift, nb) \ 65 static inline uint32_t name(uint32_t opcode) \ 66 { \ 67 return extract32(opcode, shift, nb); \ 68 } 69 70 #define EXTRACT_SHELPER(name, shift, nb) \ 71 static inline int32_t name(uint32_t opcode) \ 72 { \ 73 return sextract32(opcode, shift, nb); \ 74 } 75 76 #define EXTRACT_HELPER_SPLIT(name, shift1, nb1, shift2, nb2) \ 77 static inline uint32_t name(uint32_t opcode) \ 78 { \ 79 return extract32(opcode, shift1, nb1) << nb2 | \ 80 extract32(opcode, shift2, nb2); \ 81 } 82 83 #define EXTRACT_HELPER_SPLIT_3(name, \ 84 d0_bits, shift_op_d0, shift_d0, \ 85 d1_bits, shift_op_d1, shift_d1, \ 86 d2_bits, shift_op_d2, shift_d2) \ 87 static inline int16_t name(uint32_t opcode) \ 88 { \ 89 return \ 90 (((opcode >> (shift_op_d0)) & ((1 << (d0_bits)) - 1)) << (shift_d0)) | \ 91 (((opcode >> (shift_op_d1)) & ((1 << (d1_bits)) - 1)) << (shift_d1)) | \ 92 (((opcode >> (shift_op_d2)) & ((1 << (d2_bits)) - 1)) << (shift_d2)); \ 93 } 94 95 96 /* Opcode part 1 */ 97 EXTRACT_HELPER(opc1, 26, 6); 98 /* Opcode part 2 */ 99 EXTRACT_HELPER(opc2, 1, 5); 100 /* Opcode part 3 */ 101 EXTRACT_HELPER(opc3, 6, 5); 102 /* Opcode part 4 */ 103 EXTRACT_HELPER(opc4, 16, 5); 104 /* Update Cr0 flags */ 105 EXTRACT_HELPER(Rc, 0, 1); 106 /* Update Cr6 flags (Altivec) */ 107 EXTRACT_HELPER(Rc21, 10, 1); 108 /* Destination */ 109 EXTRACT_HELPER(rD, 21, 5); 110 /* Source */ 111 EXTRACT_HELPER(rS, 21, 5); 112 /* First operand */ 113 EXTRACT_HELPER(rA, 16, 5); 114 /* Second operand */ 115 EXTRACT_HELPER(rB, 11, 5); 116 /* Third operand */ 117 EXTRACT_HELPER(rC, 6, 5); 118 /*** Get CRn ***/ 119 EXTRACT_HELPER(crfD, 23, 3); 120 EXTRACT_HELPER(BF, 23, 3); 121 EXTRACT_HELPER(crfS, 18, 3); 122 EXTRACT_HELPER(crbD, 21, 5); 123 EXTRACT_HELPER(crbA, 16, 5); 124 EXTRACT_HELPER(crbB, 11, 5); 125 /* SPR / TBL */ 126 EXTRACT_HELPER(_SPR, 11, 10); 127 static inline uint32_t SPR(uint32_t opcode) 128 { 129 uint32_t sprn = _SPR(opcode); 130 131 return ((sprn >> 5) & 0x1F) | ((sprn & 0x1F) << 5); 132 } 133 /*** Get constants ***/ 134 /* 16 bits signed immediate value */ 135 EXTRACT_SHELPER(SIMM, 0, 16); 136 /* 16 bits unsigned immediate value */ 137 EXTRACT_HELPER(UIMM, 0, 16); 138 /* 5 bits signed immediate value */ 139 EXTRACT_SHELPER(SIMM5, 16, 5); 140 /* 5 bits signed immediate value */ 141 EXTRACT_HELPER(UIMM5, 16, 5); 142 /* 4 bits unsigned immediate value */ 143 EXTRACT_HELPER(UIMM4, 16, 4); 144 /* Bit count */ 145 EXTRACT_HELPER(NB, 11, 5); 146 /* Shift count */ 147 EXTRACT_HELPER(SH, 11, 5); 148 /* lwat/stwat/ldat/lwat */ 149 EXTRACT_HELPER(FC, 11, 5); 150 /* Vector shift count */ 151 EXTRACT_HELPER(VSH, 6, 4); 152 /* Mask start */ 153 EXTRACT_HELPER(MB, 6, 5); 154 /* Mask end */ 155 EXTRACT_HELPER(ME, 1, 5); 156 /* Trap operand */ 157 EXTRACT_HELPER(TO, 21, 5); 158 159 EXTRACT_HELPER(CRM, 12, 8); 160 161 #ifndef CONFIG_USER_ONLY 162 EXTRACT_HELPER(SR, 16, 4); 163 #endif 164 165 /* mtfsf/mtfsfi */ 166 EXTRACT_HELPER(FPBF, 23, 3); 167 EXTRACT_HELPER(FPIMM, 12, 4); 168 EXTRACT_HELPER(FPL, 25, 1); 169 EXTRACT_HELPER(FPFLM, 17, 8); 170 EXTRACT_HELPER(FPW, 16, 1); 171 172 /* addpcis */ 173 EXTRACT_HELPER_SPLIT_3(DX, 10, 6, 6, 5, 16, 1, 1, 0, 0) 174 #if defined(TARGET_PPC64) 175 /* darn */ 176 EXTRACT_HELPER(L, 16, 2); 177 #endif 178 /* wait */ 179 EXTRACT_HELPER(WC, 21, 2); 180 EXTRACT_HELPER(PL, 16, 2); 181 182 /*** Jump target decoding ***/ 183 /* Immediate address */ 184 static inline target_ulong LI(uint32_t opcode) 185 { 186 return (opcode >> 0) & 0x03FFFFFC; 187 } 188 189 static inline uint32_t BD(uint32_t opcode) 190 { 191 return (opcode >> 0) & 0xFFFC; 192 } 193 194 EXTRACT_HELPER(BO, 21, 5); 195 EXTRACT_HELPER(BI, 16, 5); 196 /* Absolute/relative address */ 197 EXTRACT_HELPER(AA, 1, 1); 198 /* Link */ 199 EXTRACT_HELPER(LK, 0, 1); 200 201 /* DFP Z22-form */ 202 EXTRACT_HELPER(DCM, 10, 6) 203 204 /* DFP Z23-form */ 205 EXTRACT_HELPER(RMC, 9, 2) 206 EXTRACT_HELPER(Rrm, 16, 1) 207 208 EXTRACT_HELPER_SPLIT(DQxT, 3, 1, 21, 5); 209 EXTRACT_HELPER_SPLIT(xT, 0, 1, 21, 5); 210 EXTRACT_HELPER_SPLIT(xS, 0, 1, 21, 5); 211 EXTRACT_HELPER_SPLIT(xA, 2, 1, 16, 5); 212 EXTRACT_HELPER_SPLIT(xB, 1, 1, 11, 5); 213 EXTRACT_HELPER_SPLIT(xC, 3, 1, 6, 5); 214 EXTRACT_HELPER(DM, 8, 2); 215 EXTRACT_HELPER(UIM, 16, 2); 216 EXTRACT_HELPER(SHW, 8, 2); 217 EXTRACT_HELPER(SP, 19, 2); 218 EXTRACT_HELPER(IMM8, 11, 8); 219 EXTRACT_HELPER(DCMX, 16, 7); 220 EXTRACT_HELPER_SPLIT_3(DCMX_XV, 5, 16, 0, 1, 2, 5, 1, 6, 6); 221 222 void helper_compute_fprf_float16(CPUPPCState *env, float16 arg); 223 void helper_compute_fprf_float32(CPUPPCState *env, float32 arg); 224 void helper_compute_fprf_float128(CPUPPCState *env, float128 arg); 225 226 /* translate.c */ 227 228 int ppc_fixup_cpu(PowerPCCPU *cpu); 229 void create_ppc_opcodes(PowerPCCPU *cpu, Error **errp); 230 void destroy_ppc_opcodes(PowerPCCPU *cpu); 231 232 /* gdbstub.c */ 233 void ppc_gdb_init(CPUState *cs, PowerPCCPUClass *ppc); 234 const gchar *ppc_gdb_arch_name(CPUState *cs); 235 236 /** 237 * prot_for_access_type: 238 * @access_type: Access type 239 * 240 * Return the protection bit required for the given access type. 241 */ 242 static inline int prot_for_access_type(MMUAccessType access_type) 243 { 244 switch (access_type) { 245 case MMU_INST_FETCH: 246 return PAGE_EXEC; 247 case MMU_DATA_LOAD: 248 return PAGE_READ; 249 case MMU_DATA_STORE: 250 return PAGE_WRITE; 251 } 252 g_assert_not_reached(); 253 } 254 255 #ifndef CONFIG_USER_ONLY 256 257 /* PowerPC MMU emulation */ 258 259 typedef struct mmu_ctx_t mmu_ctx_t; 260 261 bool ppc_xlate(PowerPCCPU *cpu, vaddr eaddr, MMUAccessType access_type, 262 hwaddr *raddrp, int *psizep, int *protp, 263 int mmu_idx, bool guest_visible); 264 int get_physical_address_wtlb(CPUPPCState *env, mmu_ctx_t *ctx, 265 target_ulong eaddr, 266 MMUAccessType access_type, int type, 267 int mmu_idx); 268 /* Software driven TLB helpers */ 269 int ppc6xx_tlb_getnum(CPUPPCState *env, target_ulong eaddr, 270 int way, int is_code); 271 /* Context used internally during MMU translations */ 272 struct mmu_ctx_t { 273 hwaddr raddr; /* Real address */ 274 hwaddr eaddr; /* Effective address */ 275 int prot; /* Protection bits */ 276 hwaddr hash[2]; /* Pagetable hash values */ 277 target_ulong ptem; /* Virtual segment ID | API */ 278 int key; /* Access key */ 279 int nx; /* Non-execute area */ 280 }; 281 282 #endif /* !CONFIG_USER_ONLY */ 283 284 /* Common routines used by software and hardware TLBs emulation */ 285 static inline int pte_is_valid(target_ulong pte0) 286 { 287 return pte0 & 0x80000000 ? 1 : 0; 288 } 289 290 static inline void pte_invalidate(target_ulong *pte0) 291 { 292 *pte0 &= ~0x80000000; 293 } 294 295 #define PTE_PTEM_MASK 0x7FFFFFBF 296 #define PTE_CHECK_MASK (TARGET_PAGE_MASK | 0x7B) 297 298 #ifdef CONFIG_USER_ONLY 299 void ppc_cpu_record_sigsegv(CPUState *cs, vaddr addr, 300 MMUAccessType access_type, 301 bool maperr, uintptr_t ra); 302 #else 303 bool ppc_cpu_tlb_fill(CPUState *cs, vaddr address, int size, 304 MMUAccessType access_type, int mmu_idx, 305 bool probe, uintptr_t retaddr); 306 G_NORETURN void ppc_cpu_do_unaligned_access(CPUState *cs, vaddr addr, 307 MMUAccessType access_type, int mmu_idx, 308 uintptr_t retaddr); 309 void ppc_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, 310 vaddr addr, unsigned size, 311 MMUAccessType access_type, 312 int mmu_idx, MemTxAttrs attrs, 313 MemTxResult response, uintptr_t retaddr); 314 void ppc_cpu_debug_excp_handler(CPUState *cs); 315 bool ppc_cpu_debug_check_breakpoint(CPUState *cs); 316 bool ppc_cpu_debug_check_watchpoint(CPUState *cs, CPUWatchpoint *wp); 317 #endif 318 319 FIELD(GER_MSK, XMSK, 0, 4) 320 FIELD(GER_MSK, YMSK, 4, 4) 321 FIELD(GER_MSK, PMSK, 8, 8) 322 323 static inline int ger_pack_masks(int pmsk, int ymsk, int xmsk) 324 { 325 int msk = 0; 326 msk = FIELD_DP32(msk, GER_MSK, XMSK, xmsk); 327 msk = FIELD_DP32(msk, GER_MSK, YMSK, ymsk); 328 msk = FIELD_DP32(msk, GER_MSK, PMSK, pmsk); 329 return msk; 330 } 331 332 #endif /* PPC_INTERNAL_H */ 333