xref: /qemu/target/riscv/fpu_helper.c (revision dcaaf2bf) 
1 /*
2  * RISC-V FPU Emulation Helpers for QEMU.
3  *
4  * Copyright (c) 2016-2017 Sagar Karandikar, sagark@eecs.berkeley.edu
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms and conditions of the GNU General Public License,
8  * version 2 or later, as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License along with
16  * this program.  If not, see <http://www.gnu.org/licenses/>.
17  */
18 
19 #include "qemu/osdep.h"
20 #include "cpu.h"
21 #include "qemu/host-utils.h"
22 #include "exec/exec-all.h"
23 #include "exec/helper-proto.h"
24 #include "fpu/softfloat.h"
25 #include "internals.h"
26 
27 target_ulong riscv_cpu_get_fflags(CPURISCVState *env)
28 {
29     int soft = get_float_exception_flags(&env->fp_status);
30     target_ulong hard = 0;
31 
32     hard |= (soft & float_flag_inexact) ? FPEXC_NX : 0;
33     hard |= (soft & float_flag_underflow) ? FPEXC_UF : 0;
34     hard |= (soft & float_flag_overflow) ? FPEXC_OF : 0;
35     hard |= (soft & float_flag_divbyzero) ? FPEXC_DZ : 0;
36     hard |= (soft & float_flag_invalid) ? FPEXC_NV : 0;
37 
38     return hard;
39 }
40 
41 void riscv_cpu_set_fflags(CPURISCVState *env, target_ulong hard)
42 {
43     int soft = 0;
44 
45     soft |= (hard & FPEXC_NX) ? float_flag_inexact : 0;
46     soft |= (hard & FPEXC_UF) ? float_flag_underflow : 0;
47     soft |= (hard & FPEXC_OF) ? float_flag_overflow : 0;
48     soft |= (hard & FPEXC_DZ) ? float_flag_divbyzero : 0;
49     soft |= (hard & FPEXC_NV) ? float_flag_invalid : 0;
50 
51     set_float_exception_flags(soft, &env->fp_status);
52 }
53 
54 void helper_set_rounding_mode(CPURISCVState *env, uint32_t rm)
55 {
56     int softrm;
57 
58     if (rm == RISCV_FRM_DYN) {
59         rm = env->frm;
60     }
61     switch (rm) {
62     case RISCV_FRM_RNE:
63         softrm = float_round_nearest_even;
64         break;
65     case RISCV_FRM_RTZ:
66         softrm = float_round_to_zero;
67         break;
68     case RISCV_FRM_RDN:
69         softrm = float_round_down;
70         break;
71     case RISCV_FRM_RUP:
72         softrm = float_round_up;
73         break;
74     case RISCV_FRM_RMM:
75         softrm = float_round_ties_away;
76         break;
77     default:
78         riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC());
79     }
80 
81     set_float_rounding_mode(softrm, &env->fp_status);
82 }
83 
84 void helper_set_rounding_mode_chkfrm(CPURISCVState *env, uint32_t rm)
85 {
86     int softrm;
87 
88     /* Always validate frm, even if rm != DYN. */
89     if (unlikely(env->frm >= 5)) {
90         riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC());
91     }
92     if (rm == RISCV_FRM_DYN) {
93         rm = env->frm;
94     }
95     switch (rm) {
96     case RISCV_FRM_RNE:
97         softrm = float_round_nearest_even;
98         break;
99     case RISCV_FRM_RTZ:
100         softrm = float_round_to_zero;
101         break;
102     case RISCV_FRM_RDN:
103         softrm = float_round_down;
104         break;
105     case RISCV_FRM_RUP:
106         softrm = float_round_up;
107         break;
108     case RISCV_FRM_RMM:
109         softrm = float_round_ties_away;
110         break;
111     case RISCV_FRM_ROD:
112         softrm = float_round_to_odd;
113         break;
114     default:
115         g_assert_not_reached();
116     }
117 
118     set_float_rounding_mode(softrm, &env->fp_status);
119 }
120 
121 static uint64_t do_fmadd_h(CPURISCVState *env, uint64_t rs1, uint64_t rs2,
122                            uint64_t rs3, int flags)
123 {
124     float16 frs1 = check_nanbox_h(env, rs1);
125     float16 frs2 = check_nanbox_h(env, rs2);
126     float16 frs3 = check_nanbox_h(env, rs3);
127     return nanbox_h(env, float16_muladd(frs1, frs2, frs3, flags,
128                                         &env->fp_status));
129 }
130 
131 static uint64_t do_fmadd_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2,
132                            uint64_t rs3, int flags)
133 {
134     float32 frs1 = check_nanbox_s(env, rs1);
135     float32 frs2 = check_nanbox_s(env, rs2);
136     float32 frs3 = check_nanbox_s(env, rs3);
137     return nanbox_s(env, float32_muladd(frs1, frs2, frs3, flags,
138                                         &env->fp_status));
139 }
140 
141 uint64_t helper_fmadd_s(CPURISCVState *env, uint64_t frs1, uint64_t frs2,
142                         uint64_t frs3)
143 {
144     return do_fmadd_s(env, frs1, frs2, frs3, 0);
145 }
146 
147 uint64_t helper_fmadd_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2,
148                         uint64_t frs3)
149 {
150     return float64_muladd(frs1, frs2, frs3, 0, &env->fp_status);
151 }
152 
153 uint64_t helper_fmadd_h(CPURISCVState *env, uint64_t frs1, uint64_t frs2,
154                         uint64_t frs3)
155 {
156     return do_fmadd_h(env, frs1, frs2, frs3, 0);
157 }
158 
159 uint64_t helper_fmsub_s(CPURISCVState *env, uint64_t frs1, uint64_t frs2,
160                         uint64_t frs3)
161 {
162     return do_fmadd_s(env, frs1, frs2, frs3, float_muladd_negate_c);
163 }
164 
165 uint64_t helper_fmsub_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2,
166                         uint64_t frs3)
167 {
168     return float64_muladd(frs1, frs2, frs3, float_muladd_negate_c,
169                           &env->fp_status);
170 }
171 
172 uint64_t helper_fmsub_h(CPURISCVState *env, uint64_t frs1, uint64_t frs2,
173                         uint64_t frs3)
174 {
175     return do_fmadd_h(env, frs1, frs2, frs3, float_muladd_negate_c);
176 }
177 
178 uint64_t helper_fnmsub_s(CPURISCVState *env, uint64_t frs1, uint64_t frs2,
179                          uint64_t frs3)
180 {
181     return do_fmadd_s(env, frs1, frs2, frs3, float_muladd_negate_product);
182 }
183 
184 uint64_t helper_fnmsub_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2,
185                          uint64_t frs3)
186 {
187     return float64_muladd(frs1, frs2, frs3, float_muladd_negate_product,
188                           &env->fp_status);
189 }
190 
191 uint64_t helper_fnmsub_h(CPURISCVState *env, uint64_t frs1, uint64_t frs2,
192                          uint64_t frs3)
193 {
194     return do_fmadd_h(env, frs1, frs2, frs3, float_muladd_negate_product);
195 }
196 
197 uint64_t helper_fnmadd_s(CPURISCVState *env, uint64_t frs1, uint64_t frs2,
198                          uint64_t frs3)
199 {
200     return do_fmadd_s(env, frs1, frs2, frs3,
201                       float_muladd_negate_c | float_muladd_negate_product);
202 }
203 
204 uint64_t helper_fnmadd_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2,
205                          uint64_t frs3)
206 {
207     return float64_muladd(frs1, frs2, frs3, float_muladd_negate_c |
208                           float_muladd_negate_product, &env->fp_status);
209 }
210 
211 uint64_t helper_fnmadd_h(CPURISCVState *env, uint64_t frs1, uint64_t frs2,
212                          uint64_t frs3)
213 {
214     return do_fmadd_h(env, frs1, frs2, frs3,
215                       float_muladd_negate_c | float_muladd_negate_product);
216 }
217 
218 uint64_t helper_fadd_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
219 {
220     float32 frs1 = check_nanbox_s(env, rs1);
221     float32 frs2 = check_nanbox_s(env, rs2);
222     return nanbox_s(env, float32_add(frs1, frs2, &env->fp_status));
223 }
224 
225 uint64_t helper_fsub_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
226 {
227     float32 frs1 = check_nanbox_s(env, rs1);
228     float32 frs2 = check_nanbox_s(env, rs2);
229     return nanbox_s(env, float32_sub(frs1, frs2, &env->fp_status));
230 }
231 
232 uint64_t helper_fmul_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
233 {
234     float32 frs1 = check_nanbox_s(env, rs1);
235     float32 frs2 = check_nanbox_s(env, rs2);
236     return nanbox_s(env, float32_mul(frs1, frs2, &env->fp_status));
237 }
238 
239 uint64_t helper_fdiv_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
240 {
241     float32 frs1 = check_nanbox_s(env, rs1);
242     float32 frs2 = check_nanbox_s(env, rs2);
243     return nanbox_s(env, float32_div(frs1, frs2, &env->fp_status));
244 }
245 
246 uint64_t helper_fmin_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
247 {
248     float32 frs1 = check_nanbox_s(env, rs1);
249     float32 frs2 = check_nanbox_s(env, rs2);
250     return nanbox_s(env, env->priv_ver < PRIV_VERSION_1_11_0 ?
251                          float32_minnum(frs1, frs2, &env->fp_status) :
252                          float32_minimum_number(frs1, frs2, &env->fp_status));
253 }
254 
255 uint64_t helper_fminm_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
256 {
257     float32 frs1 = check_nanbox_s(env, rs1);
258     float32 frs2 = check_nanbox_s(env, rs2);
259     float32 ret = float32_min(frs1, frs2, &env->fp_status);
260     return nanbox_s(env, ret);
261 }
262 
263 uint64_t helper_fmax_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
264 {
265     float32 frs1 = check_nanbox_s(env, rs1);
266     float32 frs2 = check_nanbox_s(env, rs2);
267     return nanbox_s(env, env->priv_ver < PRIV_VERSION_1_11_0 ?
268                          float32_maxnum(frs1, frs2, &env->fp_status) :
269                          float32_maximum_number(frs1, frs2, &env->fp_status));
270 }
271 
272 uint64_t helper_fmaxm_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
273 {
274     float32 frs1 = check_nanbox_s(env, rs1);
275     float32 frs2 = check_nanbox_s(env, rs2);
276     float32 ret = float32_max(frs1, frs2, &env->fp_status);
277     return nanbox_s(env, ret);
278 }
279 
280 uint64_t helper_fsqrt_s(CPURISCVState *env, uint64_t rs1)
281 {
282     float32 frs1 = check_nanbox_s(env, rs1);
283     return nanbox_s(env, float32_sqrt(frs1, &env->fp_status));
284 }
285 
286 target_ulong helper_fle_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
287 {
288     float32 frs1 = check_nanbox_s(env, rs1);
289     float32 frs2 = check_nanbox_s(env, rs2);
290     return float32_le(frs1, frs2, &env->fp_status);
291 }
292 
293 target_ulong helper_fleq_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
294 {
295     float32 frs1 = check_nanbox_s(env, rs1);
296     float32 frs2 = check_nanbox_s(env, rs2);
297     return float32_le_quiet(frs1, frs2, &env->fp_status);
298 }
299 
300 target_ulong helper_flt_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
301 {
302     float32 frs1 = check_nanbox_s(env, rs1);
303     float32 frs2 = check_nanbox_s(env, rs2);
304     return float32_lt(frs1, frs2, &env->fp_status);
305 }
306 
307 target_ulong helper_fltq_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
308 {
309     float32 frs1 = check_nanbox_s(env, rs1);
310     float32 frs2 = check_nanbox_s(env, rs2);
311     return float32_lt_quiet(frs1, frs2, &env->fp_status);
312 }
313 
314 target_ulong helper_feq_s(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
315 {
316     float32 frs1 = check_nanbox_s(env, rs1);
317     float32 frs2 = check_nanbox_s(env, rs2);
318     return float32_eq_quiet(frs1, frs2, &env->fp_status);
319 }
320 
321 target_ulong helper_fcvt_w_s(CPURISCVState *env, uint64_t rs1)
322 {
323     float32 frs1 = check_nanbox_s(env, rs1);
324     return float32_to_int32(frs1, &env->fp_status);
325 }
326 
327 target_ulong helper_fcvt_wu_s(CPURISCVState *env, uint64_t rs1)
328 {
329     float32 frs1 = check_nanbox_s(env, rs1);
330     return (int32_t)float32_to_uint32(frs1, &env->fp_status);
331 }
332 
333 target_ulong helper_fcvt_l_s(CPURISCVState *env, uint64_t rs1)
334 {
335     float32 frs1 = check_nanbox_s(env, rs1);
336     return float32_to_int64(frs1, &env->fp_status);
337 }
338 
339 target_ulong helper_fcvt_lu_s(CPURISCVState *env, uint64_t rs1)
340 {
341     float32 frs1 = check_nanbox_s(env, rs1);
342     return float32_to_uint64(frs1, &env->fp_status);
343 }
344 
345 uint64_t helper_fcvt_s_w(CPURISCVState *env, target_ulong rs1)
346 {
347     return nanbox_s(env, int32_to_float32((int32_t)rs1, &env->fp_status));
348 }
349 
350 uint64_t helper_fcvt_s_wu(CPURISCVState *env, target_ulong rs1)
351 {
352     return nanbox_s(env, uint32_to_float32((uint32_t)rs1, &env->fp_status));
353 }
354 
355 uint64_t helper_fcvt_s_l(CPURISCVState *env, target_ulong rs1)
356 {
357     return nanbox_s(env, int64_to_float32(rs1, &env->fp_status));
358 }
359 
360 uint64_t helper_fcvt_s_lu(CPURISCVState *env, target_ulong rs1)
361 {
362     return nanbox_s(env, uint64_to_float32(rs1, &env->fp_status));
363 }
364 
365 target_ulong helper_fclass_s(CPURISCVState *env, uint64_t rs1)
366 {
367     float32 frs1 = check_nanbox_s(env, rs1);
368     return fclass_s(frs1);
369 }
370 
371 uint64_t helper_fround_s(CPURISCVState *env, uint64_t rs1)
372 {
373     float_status *fs = &env->fp_status;
374     uint16_t nx_old = get_float_exception_flags(fs) & float_flag_inexact;
375     float32 frs1 = check_nanbox_s(env, rs1);
376 
377     frs1 = float32_round_to_int(frs1, fs);
378 
379     /* Restore the original NX flag. */
380     uint16_t flags = get_float_exception_flags(fs);
381     flags &= ~float_flag_inexact;
382     flags |= nx_old;
383     set_float_exception_flags(flags, fs);
384 
385     return nanbox_s(env, frs1);
386 }
387 
388 uint64_t helper_froundnx_s(CPURISCVState *env, uint64_t rs1)
389 {
390     float32 frs1 = check_nanbox_s(env, rs1);
391     frs1 = float32_round_to_int(frs1, &env->fp_status);
392     return nanbox_s(env, frs1);
393 }
394 
395 uint64_t helper_fadd_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2)
396 {
397     return float64_add(frs1, frs2, &env->fp_status);
398 }
399 
400 uint64_t helper_fsub_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2)
401 {
402     return float64_sub(frs1, frs2, &env->fp_status);
403 }
404 
405 uint64_t helper_fmul_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2)
406 {
407     return float64_mul(frs1, frs2, &env->fp_status);
408 }
409 
410 uint64_t helper_fdiv_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2)
411 {
412     return float64_div(frs1, frs2, &env->fp_status);
413 }
414 
415 uint64_t helper_fmin_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2)
416 {
417     return env->priv_ver < PRIV_VERSION_1_11_0 ?
418            float64_minnum(frs1, frs2, &env->fp_status) :
419            float64_minimum_number(frs1, frs2, &env->fp_status);
420 }
421 
422 uint64_t helper_fminm_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2)
423 {
424     return float64_min(frs1, frs2, &env->fp_status);
425 }
426 
427 uint64_t helper_fmax_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2)
428 {
429     return env->priv_ver < PRIV_VERSION_1_11_0 ?
430            float64_maxnum(frs1, frs2, &env->fp_status) :
431            float64_maximum_number(frs1, frs2, &env->fp_status);
432 }
433 
434 uint64_t helper_fmaxm_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2)
435 {
436     return float64_max(frs1, frs2, &env->fp_status);
437 }
438 
439 uint64_t helper_fcvt_s_d(CPURISCVState *env, uint64_t rs1)
440 {
441     return nanbox_s(env, float64_to_float32(rs1, &env->fp_status));
442 }
443 
444 uint64_t helper_fcvt_d_s(CPURISCVState *env, uint64_t rs1)
445 {
446     float32 frs1 = check_nanbox_s(env, rs1);
447     return float32_to_float64(frs1, &env->fp_status);
448 }
449 
450 uint64_t helper_fsqrt_d(CPURISCVState *env, uint64_t frs1)
451 {
452     return float64_sqrt(frs1, &env->fp_status);
453 }
454 
455 target_ulong helper_fle_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2)
456 {
457     return float64_le(frs1, frs2, &env->fp_status);
458 }
459 
460 target_ulong helper_fleq_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2)
461 {
462     return float64_le_quiet(frs1, frs2, &env->fp_status);
463 }
464 
465 target_ulong helper_flt_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2)
466 {
467     return float64_lt(frs1, frs2, &env->fp_status);
468 }
469 
470 target_ulong helper_fltq_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2)
471 {
472     return float64_lt_quiet(frs1, frs2, &env->fp_status);
473 }
474 
475 target_ulong helper_feq_d(CPURISCVState *env, uint64_t frs1, uint64_t frs2)
476 {
477     return float64_eq_quiet(frs1, frs2, &env->fp_status);
478 }
479 
480 target_ulong helper_fcvt_w_d(CPURISCVState *env, uint64_t frs1)
481 {
482     return float64_to_int32(frs1, &env->fp_status);
483 }
484 
485 uint64_t helper_fcvtmod_w_d(CPURISCVState *env, uint64_t value)
486 {
487     return float64_to_int32_modulo(value, float_round_to_zero, &env->fp_status);
488 }
489 
490 target_ulong helper_fcvt_wu_d(CPURISCVState *env, uint64_t frs1)
491 {
492     return (int32_t)float64_to_uint32(frs1, &env->fp_status);
493 }
494 
495 target_ulong helper_fcvt_l_d(CPURISCVState *env, uint64_t frs1)
496 {
497     return float64_to_int64(frs1, &env->fp_status);
498 }
499 
500 target_ulong helper_fcvt_lu_d(CPURISCVState *env, uint64_t frs1)
501 {
502     return float64_to_uint64(frs1, &env->fp_status);
503 }
504 
505 uint64_t helper_fcvt_d_w(CPURISCVState *env, target_ulong rs1)
506 {
507     return int32_to_float64((int32_t)rs1, &env->fp_status);
508 }
509 
510 uint64_t helper_fcvt_d_wu(CPURISCVState *env, target_ulong rs1)
511 {
512     return uint32_to_float64((uint32_t)rs1, &env->fp_status);
513 }
514 
515 uint64_t helper_fcvt_d_l(CPURISCVState *env, target_ulong rs1)
516 {
517     return int64_to_float64(rs1, &env->fp_status);
518 }
519 
520 uint64_t helper_fcvt_d_lu(CPURISCVState *env, target_ulong rs1)
521 {
522     return uint64_to_float64(rs1, &env->fp_status);
523 }
524 
525 target_ulong helper_fclass_d(uint64_t frs1)
526 {
527     return fclass_d(frs1);
528 }
529 
530 uint64_t helper_fround_d(CPURISCVState *env, uint64_t frs1)
531 {
532     float_status *fs = &env->fp_status;
533     uint16_t nx_old = get_float_exception_flags(fs) & float_flag_inexact;
534 
535     frs1 = float64_round_to_int(frs1, fs);
536 
537     /* Restore the original NX flag. */
538     uint16_t flags = get_float_exception_flags(fs);
539     flags &= ~float_flag_inexact;
540     flags |= nx_old;
541     set_float_exception_flags(flags, fs);
542 
543     return frs1;
544 }
545 
546 uint64_t helper_froundnx_d(CPURISCVState *env, uint64_t frs1)
547 {
548     return float64_round_to_int(frs1, &env->fp_status);
549 }
550 
551 uint64_t helper_fadd_h(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
552 {
553     float16 frs1 = check_nanbox_h(env, rs1);
554     float16 frs2 = check_nanbox_h(env, rs2);
555     return nanbox_h(env, float16_add(frs1, frs2, &env->fp_status));
556 }
557 
558 uint64_t helper_fsub_h(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
559 {
560     float16 frs1 = check_nanbox_h(env, rs1);
561     float16 frs2 = check_nanbox_h(env, rs2);
562     return nanbox_h(env, float16_sub(frs1, frs2, &env->fp_status));
563 }
564 
565 uint64_t helper_fmul_h(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
566 {
567     float16 frs1 = check_nanbox_h(env, rs1);
568     float16 frs2 = check_nanbox_h(env, rs2);
569     return nanbox_h(env, float16_mul(frs1, frs2, &env->fp_status));
570 }
571 
572 uint64_t helper_fdiv_h(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
573 {
574     float16 frs1 = check_nanbox_h(env, rs1);
575     float16 frs2 = check_nanbox_h(env, rs2);
576     return nanbox_h(env, float16_div(frs1, frs2, &env->fp_status));
577 }
578 
579 uint64_t helper_fmin_h(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
580 {
581     float16 frs1 = check_nanbox_h(env, rs1);
582     float16 frs2 = check_nanbox_h(env, rs2);
583     return nanbox_h(env, env->priv_ver < PRIV_VERSION_1_11_0 ?
584                          float16_minnum(frs1, frs2, &env->fp_status) :
585                          float16_minimum_number(frs1, frs2, &env->fp_status));
586 }
587 
588 uint64_t helper_fminm_h(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
589 {
590     float16 frs1 = check_nanbox_h(env, rs1);
591     float16 frs2 = check_nanbox_h(env, rs2);
592     float16 ret = float16_min(frs1, frs2, &env->fp_status);
593     return nanbox_h(env, ret);
594 }
595 
596 uint64_t helper_fmax_h(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
597 {
598     float16 frs1 = check_nanbox_h(env, rs1);
599     float16 frs2 = check_nanbox_h(env, rs2);
600     return nanbox_h(env, env->priv_ver < PRIV_VERSION_1_11_0 ?
601                          float16_maxnum(frs1, frs2, &env->fp_status) :
602                          float16_maximum_number(frs1, frs2, &env->fp_status));
603 }
604 
605 uint64_t helper_fmaxm_h(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
606 {
607     float16 frs1 = check_nanbox_h(env, rs1);
608     float16 frs2 = check_nanbox_h(env, rs2);
609     float16 ret = float16_max(frs1, frs2, &env->fp_status);
610     return nanbox_h(env, ret);
611 }
612 
613 uint64_t helper_fsqrt_h(CPURISCVState *env, uint64_t rs1)
614 {
615     float16 frs1 = check_nanbox_h(env, rs1);
616     return nanbox_h(env, float16_sqrt(frs1, &env->fp_status));
617 }
618 
619 target_ulong helper_fle_h(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
620 {
621     float16 frs1 = check_nanbox_h(env, rs1);
622     float16 frs2 = check_nanbox_h(env, rs2);
623     return float16_le(frs1, frs2, &env->fp_status);
624 }
625 
626 target_ulong helper_fleq_h(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
627 {
628     float16 frs1 = check_nanbox_h(env, rs1);
629     float16 frs2 = check_nanbox_h(env, rs2);
630     return float16_le_quiet(frs1, frs2, &env->fp_status);
631 }
632 
633 target_ulong helper_flt_h(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
634 {
635     float16 frs1 = check_nanbox_h(env, rs1);
636     float16 frs2 = check_nanbox_h(env, rs2);
637     return float16_lt(frs1, frs2, &env->fp_status);
638 }
639 
640 target_ulong helper_fltq_h(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
641 {
642     float16 frs1 = check_nanbox_h(env, rs1);
643     float16 frs2 = check_nanbox_h(env, rs2);
644     return float16_lt_quiet(frs1, frs2, &env->fp_status);
645 }
646 
647 target_ulong helper_feq_h(CPURISCVState *env, uint64_t rs1, uint64_t rs2)
648 {
649     float16 frs1 = check_nanbox_h(env, rs1);
650     float16 frs2 = check_nanbox_h(env, rs2);
651     return float16_eq_quiet(frs1, frs2, &env->fp_status);
652 }
653 
654 target_ulong helper_fclass_h(CPURISCVState *env, uint64_t rs1)
655 {
656     float16 frs1 = check_nanbox_h(env, rs1);
657     return fclass_h(frs1);
658 }
659 
660 uint64_t helper_fround_h(CPURISCVState *env, uint64_t rs1)
661 {
662     float_status *fs = &env->fp_status;
663     uint16_t nx_old = get_float_exception_flags(fs) & float_flag_inexact;
664     float16 frs1 = check_nanbox_h(env, rs1);
665 
666     frs1 = float16_round_to_int(frs1, fs);
667 
668     /* Restore the original NX flag. */
669     uint16_t flags = get_float_exception_flags(fs);
670     flags &= ~float_flag_inexact;
671     flags |= nx_old;
672     set_float_exception_flags(flags, fs);
673 
674     return nanbox_h(env, frs1);
675 }
676 
677 uint64_t helper_froundnx_h(CPURISCVState *env, uint64_t rs1)
678 {
679     float16 frs1 = check_nanbox_s(env, rs1);
680     frs1 = float16_round_to_int(frs1, &env->fp_status);
681     return nanbox_h(env, frs1);
682 }
683 
684 target_ulong helper_fcvt_w_h(CPURISCVState *env, uint64_t rs1)
685 {
686     float16 frs1 = check_nanbox_h(env, rs1);
687     return float16_to_int32(frs1, &env->fp_status);
688 }
689 
690 target_ulong helper_fcvt_wu_h(CPURISCVState *env, uint64_t rs1)
691 {
692     float16 frs1 = check_nanbox_h(env, rs1);
693     return (int32_t)float16_to_uint32(frs1, &env->fp_status);
694 }
695 
696 target_ulong helper_fcvt_l_h(CPURISCVState *env, uint64_t rs1)
697 {
698     float16 frs1 = check_nanbox_h(env, rs1);
699     return float16_to_int64(frs1, &env->fp_status);
700 }
701 
702 target_ulong helper_fcvt_lu_h(CPURISCVState *env, uint64_t rs1)
703 {
704     float16 frs1 = check_nanbox_h(env, rs1);
705     return float16_to_uint64(frs1, &env->fp_status);
706 }
707 
708 uint64_t helper_fcvt_h_w(CPURISCVState *env, target_ulong rs1)
709 {
710     return nanbox_h(env, int32_to_float16((int32_t)rs1, &env->fp_status));
711 }
712 
713 uint64_t helper_fcvt_h_wu(CPURISCVState *env, target_ulong rs1)
714 {
715     return nanbox_h(env, uint32_to_float16((uint32_t)rs1, &env->fp_status));
716 }
717 
718 uint64_t helper_fcvt_h_l(CPURISCVState *env, target_ulong rs1)
719 {
720     return nanbox_h(env, int64_to_float16(rs1, &env->fp_status));
721 }
722 
723 uint64_t helper_fcvt_h_lu(CPURISCVState *env, target_ulong rs1)
724 {
725     return nanbox_h(env, uint64_to_float16(rs1, &env->fp_status));
726 }
727 
728 uint64_t helper_fcvt_h_s(CPURISCVState *env, uint64_t rs1)
729 {
730     float32 frs1 = check_nanbox_s(env, rs1);
731     return nanbox_h(env, float32_to_float16(frs1, true, &env->fp_status));
732 }
733 
734 uint64_t helper_fcvt_s_h(CPURISCVState *env, uint64_t rs1)
735 {
736     float16 frs1 = check_nanbox_h(env, rs1);
737     return nanbox_s(env, float16_to_float32(frs1, true, &env->fp_status));
738 }
739 
740 uint64_t helper_fcvt_h_d(CPURISCVState *env, uint64_t rs1)
741 {
742     return nanbox_h(env, float64_to_float16(rs1, true, &env->fp_status));
743 }
744 
745 uint64_t helper_fcvt_d_h(CPURISCVState *env, uint64_t rs1)
746 {
747     float16 frs1 = check_nanbox_h(env, rs1);
748     return float16_to_float64(frs1, true, &env->fp_status);
749 }
750 
751 uint64_t helper_fcvt_bf16_s(CPURISCVState *env, uint64_t rs1)
752 {
753     float32 frs1 = check_nanbox_s(env, rs1);
754     return nanbox_h(env, float32_to_bfloat16(frs1, &env->fp_status));
755 }
756 
757 uint64_t helper_fcvt_s_bf16(CPURISCVState *env, uint64_t rs1)
758 {
759     float16 frs1 = check_nanbox_h(env, rs1);
760     return nanbox_s(env, bfloat16_to_float32(frs1, &env->fp_status));
761 }
762