xref: /qemu/tcg/loongarch64/tcg-insn-defs.c.inc (revision 0ec8384f) 
1/* SPDX-License-Identifier: MIT */
2/*
3 * LoongArch instruction formats, opcodes, and encoders for TCG use.
4 *
5 * This file is auto-generated by genqemutcgdefs from
6 * https://github.com/loongson-community/loongarch-opcodes,
7 * from commit 25ca7effe9d88101c1cf96c4005423643386d81f.
8 * DO NOT EDIT.
9 */
10
11typedef enum {
12    OPC_CLZ_W = 0x00001400,
13    OPC_CTZ_W = 0x00001c00,
14    OPC_CLZ_D = 0x00002400,
15    OPC_CTZ_D = 0x00002c00,
16    OPC_REVB_2H = 0x00003000,
17    OPC_REVB_2W = 0x00003800,
18    OPC_REVB_D = 0x00003c00,
19    OPC_SEXT_H = 0x00005800,
20    OPC_SEXT_B = 0x00005c00,
21    OPC_ADD_W = 0x00100000,
22    OPC_ADD_D = 0x00108000,
23    OPC_SUB_W = 0x00110000,
24    OPC_SUB_D = 0x00118000,
25    OPC_SLT = 0x00120000,
26    OPC_SLTU = 0x00128000,
27    OPC_MASKEQZ = 0x00130000,
28    OPC_MASKNEZ = 0x00138000,
29    OPC_NOR = 0x00140000,
30    OPC_AND = 0x00148000,
31    OPC_OR = 0x00150000,
32    OPC_XOR = 0x00158000,
33    OPC_ORN = 0x00160000,
34    OPC_ANDN = 0x00168000,
35    OPC_SLL_W = 0x00170000,
36    OPC_SRL_W = 0x00178000,
37    OPC_SRA_W = 0x00180000,
38    OPC_SLL_D = 0x00188000,
39    OPC_SRL_D = 0x00190000,
40    OPC_SRA_D = 0x00198000,
41    OPC_ROTR_W = 0x001b0000,
42    OPC_ROTR_D = 0x001b8000,
43    OPC_MUL_W = 0x001c0000,
44    OPC_MULH_W = 0x001c8000,
45    OPC_MULH_WU = 0x001d0000,
46    OPC_MUL_D = 0x001d8000,
47    OPC_MULH_D = 0x001e0000,
48    OPC_MULH_DU = 0x001e8000,
49    OPC_DIV_W = 0x00200000,
50    OPC_MOD_W = 0x00208000,
51    OPC_DIV_WU = 0x00210000,
52    OPC_MOD_WU = 0x00218000,
53    OPC_DIV_D = 0x00220000,
54    OPC_MOD_D = 0x00228000,
55    OPC_DIV_DU = 0x00230000,
56    OPC_MOD_DU = 0x00238000,
57    OPC_SLLI_W = 0x00408000,
58    OPC_SLLI_D = 0x00410000,
59    OPC_SRLI_W = 0x00448000,
60    OPC_SRLI_D = 0x00450000,
61    OPC_SRAI_W = 0x00488000,
62    OPC_SRAI_D = 0x00490000,
63    OPC_ROTRI_W = 0x004c8000,
64    OPC_ROTRI_D = 0x004d0000,
65    OPC_BSTRINS_W = 0x00600000,
66    OPC_BSTRPICK_W = 0x00608000,
67    OPC_BSTRINS_D = 0x00800000,
68    OPC_BSTRPICK_D = 0x00c00000,
69    OPC_SLTI = 0x02000000,
70    OPC_SLTUI = 0x02400000,
71    OPC_ADDI_W = 0x02800000,
72    OPC_ADDI_D = 0x02c00000,
73    OPC_CU52I_D = 0x03000000,
74    OPC_ANDI = 0x03400000,
75    OPC_ORI = 0x03800000,
76    OPC_XORI = 0x03c00000,
77    OPC_ADDU16I_D = 0x10000000,
78    OPC_LU12I_W = 0x14000000,
79    OPC_CU32I_D = 0x16000000,
80    OPC_PCADDU2I = 0x18000000,
81    OPC_PCALAU12I = 0x1a000000,
82    OPC_PCADDU12I = 0x1c000000,
83    OPC_PCADDU18I = 0x1e000000,
84    OPC_LD_B = 0x28000000,
85    OPC_LD_H = 0x28400000,
86    OPC_LD_W = 0x28800000,
87    OPC_LD_D = 0x28c00000,
88    OPC_ST_B = 0x29000000,
89    OPC_ST_H = 0x29400000,
90    OPC_ST_W = 0x29800000,
91    OPC_ST_D = 0x29c00000,
92    OPC_LD_BU = 0x2a000000,
93    OPC_LD_HU = 0x2a400000,
94    OPC_LD_WU = 0x2a800000,
95    OPC_LDX_B = 0x38000000,
96    OPC_LDX_H = 0x38040000,
97    OPC_LDX_W = 0x38080000,
98    OPC_LDX_D = 0x380c0000,
99    OPC_STX_B = 0x38100000,
100    OPC_STX_H = 0x38140000,
101    OPC_STX_W = 0x38180000,
102    OPC_STX_D = 0x381c0000,
103    OPC_LDX_BU = 0x38200000,
104    OPC_LDX_HU = 0x38240000,
105    OPC_LDX_WU = 0x38280000,
106    OPC_DBAR = 0x38720000,
107    OPC_JIRL = 0x4c000000,
108    OPC_B = 0x50000000,
109    OPC_BL = 0x54000000,
110    OPC_BEQ = 0x58000000,
111    OPC_BNE = 0x5c000000,
112    OPC_BGT = 0x60000000,
113    OPC_BLE = 0x64000000,
114    OPC_BGTU = 0x68000000,
115    OPC_BLEU = 0x6c000000,
116} LoongArchInsn;
117
118static int32_t __attribute__((unused))
119encode_d_slot(LoongArchInsn opc, uint32_t d)
120{
121    return opc | d;
122}
123
124static int32_t __attribute__((unused))
125encode_dj_slots(LoongArchInsn opc, uint32_t d, uint32_t j)
126{
127    return opc | d | j << 5;
128}
129
130static int32_t __attribute__((unused))
131encode_djk_slots(LoongArchInsn opc, uint32_t d, uint32_t j, uint32_t k)
132{
133    return opc | d | j << 5 | k << 10;
134}
135
136static int32_t __attribute__((unused))
137encode_djkm_slots(LoongArchInsn opc, uint32_t d, uint32_t j, uint32_t k,
138                  uint32_t m)
139{
140    return opc | d | j << 5 | k << 10 | m << 16;
141}
142
143static int32_t __attribute__((unused))
144encode_dk_slots(LoongArchInsn opc, uint32_t d, uint32_t k)
145{
146    return opc | d | k << 10;
147}
148
149static int32_t __attribute__((unused))
150encode_dj_insn(LoongArchInsn opc, TCGReg d, TCGReg j)
151{
152    tcg_debug_assert(d >= 0 && d <= 0x1f);
153    tcg_debug_assert(j >= 0 && j <= 0x1f);
154    return encode_dj_slots(opc, d, j);
155}
156
157static int32_t __attribute__((unused))
158encode_djk_insn(LoongArchInsn opc, TCGReg d, TCGReg j, TCGReg k)
159{
160    tcg_debug_assert(d >= 0 && d <= 0x1f);
161    tcg_debug_assert(j >= 0 && j <= 0x1f);
162    tcg_debug_assert(k >= 0 && k <= 0x1f);
163    return encode_djk_slots(opc, d, j, k);
164}
165
166static int32_t __attribute__((unused))
167encode_djsk12_insn(LoongArchInsn opc, TCGReg d, TCGReg j, int32_t sk12)
168{
169    tcg_debug_assert(d >= 0 && d <= 0x1f);
170    tcg_debug_assert(j >= 0 && j <= 0x1f);
171    tcg_debug_assert(sk12 >= -0x800 && sk12 <= 0x7ff);
172    return encode_djk_slots(opc, d, j, sk12 & 0xfff);
173}
174
175static int32_t __attribute__((unused))
176encode_djsk16_insn(LoongArchInsn opc, TCGReg d, TCGReg j, int32_t sk16)
177{
178    tcg_debug_assert(d >= 0 && d <= 0x1f);
179    tcg_debug_assert(j >= 0 && j <= 0x1f);
180    tcg_debug_assert(sk16 >= -0x8000 && sk16 <= 0x7fff);
181    return encode_djk_slots(opc, d, j, sk16 & 0xffff);
182}
183
184static int32_t __attribute__((unused))
185encode_djuk12_insn(LoongArchInsn opc, TCGReg d, TCGReg j, uint32_t uk12)
186{
187    tcg_debug_assert(d >= 0 && d <= 0x1f);
188    tcg_debug_assert(j >= 0 && j <= 0x1f);
189    tcg_debug_assert(uk12 <= 0xfff);
190    return encode_djk_slots(opc, d, j, uk12);
191}
192
193static int32_t __attribute__((unused))
194encode_djuk5_insn(LoongArchInsn opc, TCGReg d, TCGReg j, uint32_t uk5)
195{
196    tcg_debug_assert(d >= 0 && d <= 0x1f);
197    tcg_debug_assert(j >= 0 && j <= 0x1f);
198    tcg_debug_assert(uk5 <= 0x1f);
199    return encode_djk_slots(opc, d, j, uk5);
200}
201
202static int32_t __attribute__((unused))
203encode_djuk5um5_insn(LoongArchInsn opc, TCGReg d, TCGReg j, uint32_t uk5,
204                     uint32_t um5)
205{
206    tcg_debug_assert(d >= 0 && d <= 0x1f);
207    tcg_debug_assert(j >= 0 && j <= 0x1f);
208    tcg_debug_assert(uk5 <= 0x1f);
209    tcg_debug_assert(um5 <= 0x1f);
210    return encode_djkm_slots(opc, d, j, uk5, um5);
211}
212
213static int32_t __attribute__((unused))
214encode_djuk6_insn(LoongArchInsn opc, TCGReg d, TCGReg j, uint32_t uk6)
215{
216    tcg_debug_assert(d >= 0 && d <= 0x1f);
217    tcg_debug_assert(j >= 0 && j <= 0x1f);
218    tcg_debug_assert(uk6 <= 0x3f);
219    return encode_djk_slots(opc, d, j, uk6);
220}
221
222static int32_t __attribute__((unused))
223encode_djuk6um6_insn(LoongArchInsn opc, TCGReg d, TCGReg j, uint32_t uk6,
224                     uint32_t um6)
225{
226    tcg_debug_assert(d >= 0 && d <= 0x1f);
227    tcg_debug_assert(j >= 0 && j <= 0x1f);
228    tcg_debug_assert(uk6 <= 0x3f);
229    tcg_debug_assert(um6 <= 0x3f);
230    return encode_djkm_slots(opc, d, j, uk6, um6);
231}
232
233static int32_t __attribute__((unused))
234encode_dsj20_insn(LoongArchInsn opc, TCGReg d, int32_t sj20)
235{
236    tcg_debug_assert(d >= 0 && d <= 0x1f);
237    tcg_debug_assert(sj20 >= -0x80000 && sj20 <= 0x7ffff);
238    return encode_dj_slots(opc, d, sj20 & 0xfffff);
239}
240
241static int32_t __attribute__((unused))
242encode_sd10k16_insn(LoongArchInsn opc, int32_t sd10k16)
243{
244    tcg_debug_assert(sd10k16 >= -0x2000000 && sd10k16 <= 0x1ffffff);
245    return encode_dk_slots(opc, (sd10k16 >> 16) & 0x3ff, sd10k16 & 0xffff);
246}
247
248static int32_t __attribute__((unused))
249encode_ud15_insn(LoongArchInsn opc, uint32_t ud15)
250{
251    tcg_debug_assert(ud15 <= 0x7fff);
252    return encode_d_slot(opc, ud15);
253}
254
255/* Emits the `clz.w d, j` instruction.  */
256static void __attribute__((unused))
257tcg_out_opc_clz_w(TCGContext *s, TCGReg d, TCGReg j)
258{
259    tcg_out32(s, encode_dj_insn(OPC_CLZ_W, d, j));
260}
261
262/* Emits the `ctz.w d, j` instruction.  */
263static void __attribute__((unused))
264tcg_out_opc_ctz_w(TCGContext *s, TCGReg d, TCGReg j)
265{
266    tcg_out32(s, encode_dj_insn(OPC_CTZ_W, d, j));
267}
268
269/* Emits the `clz.d d, j` instruction.  */
270static void __attribute__((unused))
271tcg_out_opc_clz_d(TCGContext *s, TCGReg d, TCGReg j)
272{
273    tcg_out32(s, encode_dj_insn(OPC_CLZ_D, d, j));
274}
275
276/* Emits the `ctz.d d, j` instruction.  */
277static void __attribute__((unused))
278tcg_out_opc_ctz_d(TCGContext *s, TCGReg d, TCGReg j)
279{
280    tcg_out32(s, encode_dj_insn(OPC_CTZ_D, d, j));
281}
282
283/* Emits the `revb.2h d, j` instruction.  */
284static void __attribute__((unused))
285tcg_out_opc_revb_2h(TCGContext *s, TCGReg d, TCGReg j)
286{
287    tcg_out32(s, encode_dj_insn(OPC_REVB_2H, d, j));
288}
289
290/* Emits the `revb.2w d, j` instruction.  */
291static void __attribute__((unused))
292tcg_out_opc_revb_2w(TCGContext *s, TCGReg d, TCGReg j)
293{
294    tcg_out32(s, encode_dj_insn(OPC_REVB_2W, d, j));
295}
296
297/* Emits the `revb.d d, j` instruction.  */
298static void __attribute__((unused))
299tcg_out_opc_revb_d(TCGContext *s, TCGReg d, TCGReg j)
300{
301    tcg_out32(s, encode_dj_insn(OPC_REVB_D, d, j));
302}
303
304/* Emits the `sext.h d, j` instruction.  */
305static void __attribute__((unused))
306tcg_out_opc_sext_h(TCGContext *s, TCGReg d, TCGReg j)
307{
308    tcg_out32(s, encode_dj_insn(OPC_SEXT_H, d, j));
309}
310
311/* Emits the `sext.b d, j` instruction.  */
312static void __attribute__((unused))
313tcg_out_opc_sext_b(TCGContext *s, TCGReg d, TCGReg j)
314{
315    tcg_out32(s, encode_dj_insn(OPC_SEXT_B, d, j));
316}
317
318/* Emits the `add.w d, j, k` instruction.  */
319static void __attribute__((unused))
320tcg_out_opc_add_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
321{
322    tcg_out32(s, encode_djk_insn(OPC_ADD_W, d, j, k));
323}
324
325/* Emits the `add.d d, j, k` instruction.  */
326static void __attribute__((unused))
327tcg_out_opc_add_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
328{
329    tcg_out32(s, encode_djk_insn(OPC_ADD_D, d, j, k));
330}
331
332/* Emits the `sub.w d, j, k` instruction.  */
333static void __attribute__((unused))
334tcg_out_opc_sub_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
335{
336    tcg_out32(s, encode_djk_insn(OPC_SUB_W, d, j, k));
337}
338
339/* Emits the `sub.d d, j, k` instruction.  */
340static void __attribute__((unused))
341tcg_out_opc_sub_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
342{
343    tcg_out32(s, encode_djk_insn(OPC_SUB_D, d, j, k));
344}
345
346/* Emits the `slt d, j, k` instruction.  */
347static void __attribute__((unused))
348tcg_out_opc_slt(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
349{
350    tcg_out32(s, encode_djk_insn(OPC_SLT, d, j, k));
351}
352
353/* Emits the `sltu d, j, k` instruction.  */
354static void __attribute__((unused))
355tcg_out_opc_sltu(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
356{
357    tcg_out32(s, encode_djk_insn(OPC_SLTU, d, j, k));
358}
359
360/* Emits the `maskeqz d, j, k` instruction.  */
361static void __attribute__((unused))
362tcg_out_opc_maskeqz(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
363{
364    tcg_out32(s, encode_djk_insn(OPC_MASKEQZ, d, j, k));
365}
366
367/* Emits the `masknez d, j, k` instruction.  */
368static void __attribute__((unused))
369tcg_out_opc_masknez(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
370{
371    tcg_out32(s, encode_djk_insn(OPC_MASKNEZ, d, j, k));
372}
373
374/* Emits the `nor d, j, k` instruction.  */
375static void __attribute__((unused))
376tcg_out_opc_nor(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
377{
378    tcg_out32(s, encode_djk_insn(OPC_NOR, d, j, k));
379}
380
381/* Emits the `and d, j, k` instruction.  */
382static void __attribute__((unused))
383tcg_out_opc_and(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
384{
385    tcg_out32(s, encode_djk_insn(OPC_AND, d, j, k));
386}
387
388/* Emits the `or d, j, k` instruction.  */
389static void __attribute__((unused))
390tcg_out_opc_or(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
391{
392    tcg_out32(s, encode_djk_insn(OPC_OR, d, j, k));
393}
394
395/* Emits the `xor d, j, k` instruction.  */
396static void __attribute__((unused))
397tcg_out_opc_xor(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
398{
399    tcg_out32(s, encode_djk_insn(OPC_XOR, d, j, k));
400}
401
402/* Emits the `orn d, j, k` instruction.  */
403static void __attribute__((unused))
404tcg_out_opc_orn(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
405{
406    tcg_out32(s, encode_djk_insn(OPC_ORN, d, j, k));
407}
408
409/* Emits the `andn d, j, k` instruction.  */
410static void __attribute__((unused))
411tcg_out_opc_andn(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
412{
413    tcg_out32(s, encode_djk_insn(OPC_ANDN, d, j, k));
414}
415
416/* Emits the `sll.w d, j, k` instruction.  */
417static void __attribute__((unused))
418tcg_out_opc_sll_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
419{
420    tcg_out32(s, encode_djk_insn(OPC_SLL_W, d, j, k));
421}
422
423/* Emits the `srl.w d, j, k` instruction.  */
424static void __attribute__((unused))
425tcg_out_opc_srl_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
426{
427    tcg_out32(s, encode_djk_insn(OPC_SRL_W, d, j, k));
428}
429
430/* Emits the `sra.w d, j, k` instruction.  */
431static void __attribute__((unused))
432tcg_out_opc_sra_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
433{
434    tcg_out32(s, encode_djk_insn(OPC_SRA_W, d, j, k));
435}
436
437/* Emits the `sll.d d, j, k` instruction.  */
438static void __attribute__((unused))
439tcg_out_opc_sll_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
440{
441    tcg_out32(s, encode_djk_insn(OPC_SLL_D, d, j, k));
442}
443
444/* Emits the `srl.d d, j, k` instruction.  */
445static void __attribute__((unused))
446tcg_out_opc_srl_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
447{
448    tcg_out32(s, encode_djk_insn(OPC_SRL_D, d, j, k));
449}
450
451/* Emits the `sra.d d, j, k` instruction.  */
452static void __attribute__((unused))
453tcg_out_opc_sra_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
454{
455    tcg_out32(s, encode_djk_insn(OPC_SRA_D, d, j, k));
456}
457
458/* Emits the `rotr.w d, j, k` instruction.  */
459static void __attribute__((unused))
460tcg_out_opc_rotr_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
461{
462    tcg_out32(s, encode_djk_insn(OPC_ROTR_W, d, j, k));
463}
464
465/* Emits the `rotr.d d, j, k` instruction.  */
466static void __attribute__((unused))
467tcg_out_opc_rotr_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
468{
469    tcg_out32(s, encode_djk_insn(OPC_ROTR_D, d, j, k));
470}
471
472/* Emits the `mul.w d, j, k` instruction.  */
473static void __attribute__((unused))
474tcg_out_opc_mul_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
475{
476    tcg_out32(s, encode_djk_insn(OPC_MUL_W, d, j, k));
477}
478
479/* Emits the `mulh.w d, j, k` instruction.  */
480static void __attribute__((unused))
481tcg_out_opc_mulh_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
482{
483    tcg_out32(s, encode_djk_insn(OPC_MULH_W, d, j, k));
484}
485
486/* Emits the `mulh.wu d, j, k` instruction.  */
487static void __attribute__((unused))
488tcg_out_opc_mulh_wu(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
489{
490    tcg_out32(s, encode_djk_insn(OPC_MULH_WU, d, j, k));
491}
492
493/* Emits the `mul.d d, j, k` instruction.  */
494static void __attribute__((unused))
495tcg_out_opc_mul_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
496{
497    tcg_out32(s, encode_djk_insn(OPC_MUL_D, d, j, k));
498}
499
500/* Emits the `mulh.d d, j, k` instruction.  */
501static void __attribute__((unused))
502tcg_out_opc_mulh_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
503{
504    tcg_out32(s, encode_djk_insn(OPC_MULH_D, d, j, k));
505}
506
507/* Emits the `mulh.du d, j, k` instruction.  */
508static void __attribute__((unused))
509tcg_out_opc_mulh_du(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
510{
511    tcg_out32(s, encode_djk_insn(OPC_MULH_DU, d, j, k));
512}
513
514/* Emits the `div.w d, j, k` instruction.  */
515static void __attribute__((unused))
516tcg_out_opc_div_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
517{
518    tcg_out32(s, encode_djk_insn(OPC_DIV_W, d, j, k));
519}
520
521/* Emits the `mod.w d, j, k` instruction.  */
522static void __attribute__((unused))
523tcg_out_opc_mod_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
524{
525    tcg_out32(s, encode_djk_insn(OPC_MOD_W, d, j, k));
526}
527
528/* Emits the `div.wu d, j, k` instruction.  */
529static void __attribute__((unused))
530tcg_out_opc_div_wu(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
531{
532    tcg_out32(s, encode_djk_insn(OPC_DIV_WU, d, j, k));
533}
534
535/* Emits the `mod.wu d, j, k` instruction.  */
536static void __attribute__((unused))
537tcg_out_opc_mod_wu(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
538{
539    tcg_out32(s, encode_djk_insn(OPC_MOD_WU, d, j, k));
540}
541
542/* Emits the `div.d d, j, k` instruction.  */
543static void __attribute__((unused))
544tcg_out_opc_div_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
545{
546    tcg_out32(s, encode_djk_insn(OPC_DIV_D, d, j, k));
547}
548
549/* Emits the `mod.d d, j, k` instruction.  */
550static void __attribute__((unused))
551tcg_out_opc_mod_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
552{
553    tcg_out32(s, encode_djk_insn(OPC_MOD_D, d, j, k));
554}
555
556/* Emits the `div.du d, j, k` instruction.  */
557static void __attribute__((unused))
558tcg_out_opc_div_du(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
559{
560    tcg_out32(s, encode_djk_insn(OPC_DIV_DU, d, j, k));
561}
562
563/* Emits the `mod.du d, j, k` instruction.  */
564static void __attribute__((unused))
565tcg_out_opc_mod_du(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
566{
567    tcg_out32(s, encode_djk_insn(OPC_MOD_DU, d, j, k));
568}
569
570/* Emits the `slli.w d, j, uk5` instruction.  */
571static void __attribute__((unused))
572tcg_out_opc_slli_w(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk5)
573{
574    tcg_out32(s, encode_djuk5_insn(OPC_SLLI_W, d, j, uk5));
575}
576
577/* Emits the `slli.d d, j, uk6` instruction.  */
578static void __attribute__((unused))
579tcg_out_opc_slli_d(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk6)
580{
581    tcg_out32(s, encode_djuk6_insn(OPC_SLLI_D, d, j, uk6));
582}
583
584/* Emits the `srli.w d, j, uk5` instruction.  */
585static void __attribute__((unused))
586tcg_out_opc_srli_w(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk5)
587{
588    tcg_out32(s, encode_djuk5_insn(OPC_SRLI_W, d, j, uk5));
589}
590
591/* Emits the `srli.d d, j, uk6` instruction.  */
592static void __attribute__((unused))
593tcg_out_opc_srli_d(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk6)
594{
595    tcg_out32(s, encode_djuk6_insn(OPC_SRLI_D, d, j, uk6));
596}
597
598/* Emits the `srai.w d, j, uk5` instruction.  */
599static void __attribute__((unused))
600tcg_out_opc_srai_w(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk5)
601{
602    tcg_out32(s, encode_djuk5_insn(OPC_SRAI_W, d, j, uk5));
603}
604
605/* Emits the `srai.d d, j, uk6` instruction.  */
606static void __attribute__((unused))
607tcg_out_opc_srai_d(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk6)
608{
609    tcg_out32(s, encode_djuk6_insn(OPC_SRAI_D, d, j, uk6));
610}
611
612/* Emits the `rotri.w d, j, uk5` instruction.  */
613static void __attribute__((unused))
614tcg_out_opc_rotri_w(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk5)
615{
616    tcg_out32(s, encode_djuk5_insn(OPC_ROTRI_W, d, j, uk5));
617}
618
619/* Emits the `rotri.d d, j, uk6` instruction.  */
620static void __attribute__((unused))
621tcg_out_opc_rotri_d(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk6)
622{
623    tcg_out32(s, encode_djuk6_insn(OPC_ROTRI_D, d, j, uk6));
624}
625
626/* Emits the `bstrins.w d, j, uk5, um5` instruction.  */
627static void __attribute__((unused))
628tcg_out_opc_bstrins_w(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk5,
629                      uint32_t um5)
630{
631    tcg_out32(s, encode_djuk5um5_insn(OPC_BSTRINS_W, d, j, uk5, um5));
632}
633
634/* Emits the `bstrpick.w d, j, uk5, um5` instruction.  */
635static void __attribute__((unused))
636tcg_out_opc_bstrpick_w(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk5,
637                       uint32_t um5)
638{
639    tcg_out32(s, encode_djuk5um5_insn(OPC_BSTRPICK_W, d, j, uk5, um5));
640}
641
642/* Emits the `bstrins.d d, j, uk6, um6` instruction.  */
643static void __attribute__((unused))
644tcg_out_opc_bstrins_d(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk6,
645                      uint32_t um6)
646{
647    tcg_out32(s, encode_djuk6um6_insn(OPC_BSTRINS_D, d, j, uk6, um6));
648}
649
650/* Emits the `bstrpick.d d, j, uk6, um6` instruction.  */
651static void __attribute__((unused))
652tcg_out_opc_bstrpick_d(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk6,
653                       uint32_t um6)
654{
655    tcg_out32(s, encode_djuk6um6_insn(OPC_BSTRPICK_D, d, j, uk6, um6));
656}
657
658/* Emits the `slti d, j, sk12` instruction.  */
659static void __attribute__((unused))
660tcg_out_opc_slti(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
661{
662    tcg_out32(s, encode_djsk12_insn(OPC_SLTI, d, j, sk12));
663}
664
665/* Emits the `sltui d, j, sk12` instruction.  */
666static void __attribute__((unused))
667tcg_out_opc_sltui(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
668{
669    tcg_out32(s, encode_djsk12_insn(OPC_SLTUI, d, j, sk12));
670}
671
672/* Emits the `addi.w d, j, sk12` instruction.  */
673static void __attribute__((unused))
674tcg_out_opc_addi_w(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
675{
676    tcg_out32(s, encode_djsk12_insn(OPC_ADDI_W, d, j, sk12));
677}
678
679/* Emits the `addi.d d, j, sk12` instruction.  */
680static void __attribute__((unused))
681tcg_out_opc_addi_d(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
682{
683    tcg_out32(s, encode_djsk12_insn(OPC_ADDI_D, d, j, sk12));
684}
685
686/* Emits the `cu52i.d d, j, sk12` instruction.  */
687static void __attribute__((unused))
688tcg_out_opc_cu52i_d(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
689{
690    tcg_out32(s, encode_djsk12_insn(OPC_CU52I_D, d, j, sk12));
691}
692
693/* Emits the `andi d, j, uk12` instruction.  */
694static void __attribute__((unused))
695tcg_out_opc_andi(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk12)
696{
697    tcg_out32(s, encode_djuk12_insn(OPC_ANDI, d, j, uk12));
698}
699
700/* Emits the `ori d, j, uk12` instruction.  */
701static void __attribute__((unused))
702tcg_out_opc_ori(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk12)
703{
704    tcg_out32(s, encode_djuk12_insn(OPC_ORI, d, j, uk12));
705}
706
707/* Emits the `xori d, j, uk12` instruction.  */
708static void __attribute__((unused))
709tcg_out_opc_xori(TCGContext *s, TCGReg d, TCGReg j, uint32_t uk12)
710{
711    tcg_out32(s, encode_djuk12_insn(OPC_XORI, d, j, uk12));
712}
713
714/* Emits the `addu16i.d d, j, sk16` instruction.  */
715static void __attribute__((unused))
716tcg_out_opc_addu16i_d(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16)
717{
718    tcg_out32(s, encode_djsk16_insn(OPC_ADDU16I_D, d, j, sk16));
719}
720
721/* Emits the `lu12i.w d, sj20` instruction.  */
722static void __attribute__((unused))
723tcg_out_opc_lu12i_w(TCGContext *s, TCGReg d, int32_t sj20)
724{
725    tcg_out32(s, encode_dsj20_insn(OPC_LU12I_W, d, sj20));
726}
727
728/* Emits the `cu32i.d d, sj20` instruction.  */
729static void __attribute__((unused))
730tcg_out_opc_cu32i_d(TCGContext *s, TCGReg d, int32_t sj20)
731{
732    tcg_out32(s, encode_dsj20_insn(OPC_CU32I_D, d, sj20));
733}
734
735/* Emits the `pcaddu2i d, sj20` instruction.  */
736static void __attribute__((unused))
737tcg_out_opc_pcaddu2i(TCGContext *s, TCGReg d, int32_t sj20)
738{
739    tcg_out32(s, encode_dsj20_insn(OPC_PCADDU2I, d, sj20));
740}
741
742/* Emits the `pcalau12i d, sj20` instruction.  */
743static void __attribute__((unused))
744tcg_out_opc_pcalau12i(TCGContext *s, TCGReg d, int32_t sj20)
745{
746    tcg_out32(s, encode_dsj20_insn(OPC_PCALAU12I, d, sj20));
747}
748
749/* Emits the `pcaddu12i d, sj20` instruction.  */
750static void __attribute__((unused))
751tcg_out_opc_pcaddu12i(TCGContext *s, TCGReg d, int32_t sj20)
752{
753    tcg_out32(s, encode_dsj20_insn(OPC_PCADDU12I, d, sj20));
754}
755
756/* Emits the `pcaddu18i d, sj20` instruction.  */
757static void __attribute__((unused))
758tcg_out_opc_pcaddu18i(TCGContext *s, TCGReg d, int32_t sj20)
759{
760    tcg_out32(s, encode_dsj20_insn(OPC_PCADDU18I, d, sj20));
761}
762
763/* Emits the `ld.b d, j, sk12` instruction.  */
764static void __attribute__((unused))
765tcg_out_opc_ld_b(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
766{
767    tcg_out32(s, encode_djsk12_insn(OPC_LD_B, d, j, sk12));
768}
769
770/* Emits the `ld.h d, j, sk12` instruction.  */
771static void __attribute__((unused))
772tcg_out_opc_ld_h(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
773{
774    tcg_out32(s, encode_djsk12_insn(OPC_LD_H, d, j, sk12));
775}
776
777/* Emits the `ld.w d, j, sk12` instruction.  */
778static void __attribute__((unused))
779tcg_out_opc_ld_w(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
780{
781    tcg_out32(s, encode_djsk12_insn(OPC_LD_W, d, j, sk12));
782}
783
784/* Emits the `ld.d d, j, sk12` instruction.  */
785static void __attribute__((unused))
786tcg_out_opc_ld_d(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
787{
788    tcg_out32(s, encode_djsk12_insn(OPC_LD_D, d, j, sk12));
789}
790
791/* Emits the `st.b d, j, sk12` instruction.  */
792static void __attribute__((unused))
793tcg_out_opc_st_b(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
794{
795    tcg_out32(s, encode_djsk12_insn(OPC_ST_B, d, j, sk12));
796}
797
798/* Emits the `st.h d, j, sk12` instruction.  */
799static void __attribute__((unused))
800tcg_out_opc_st_h(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
801{
802    tcg_out32(s, encode_djsk12_insn(OPC_ST_H, d, j, sk12));
803}
804
805/* Emits the `st.w d, j, sk12` instruction.  */
806static void __attribute__((unused))
807tcg_out_opc_st_w(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
808{
809    tcg_out32(s, encode_djsk12_insn(OPC_ST_W, d, j, sk12));
810}
811
812/* Emits the `st.d d, j, sk12` instruction.  */
813static void __attribute__((unused))
814tcg_out_opc_st_d(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
815{
816    tcg_out32(s, encode_djsk12_insn(OPC_ST_D, d, j, sk12));
817}
818
819/* Emits the `ld.bu d, j, sk12` instruction.  */
820static void __attribute__((unused))
821tcg_out_opc_ld_bu(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
822{
823    tcg_out32(s, encode_djsk12_insn(OPC_LD_BU, d, j, sk12));
824}
825
826/* Emits the `ld.hu d, j, sk12` instruction.  */
827static void __attribute__((unused))
828tcg_out_opc_ld_hu(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
829{
830    tcg_out32(s, encode_djsk12_insn(OPC_LD_HU, d, j, sk12));
831}
832
833/* Emits the `ld.wu d, j, sk12` instruction.  */
834static void __attribute__((unused))
835tcg_out_opc_ld_wu(TCGContext *s, TCGReg d, TCGReg j, int32_t sk12)
836{
837    tcg_out32(s, encode_djsk12_insn(OPC_LD_WU, d, j, sk12));
838}
839
840/* Emits the `ldx.b d, j, k` instruction.  */
841static void __attribute__((unused))
842tcg_out_opc_ldx_b(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
843{
844    tcg_out32(s, encode_djk_insn(OPC_LDX_B, d, j, k));
845}
846
847/* Emits the `ldx.h d, j, k` instruction.  */
848static void __attribute__((unused))
849tcg_out_opc_ldx_h(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
850{
851    tcg_out32(s, encode_djk_insn(OPC_LDX_H, d, j, k));
852}
853
854/* Emits the `ldx.w d, j, k` instruction.  */
855static void __attribute__((unused))
856tcg_out_opc_ldx_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
857{
858    tcg_out32(s, encode_djk_insn(OPC_LDX_W, d, j, k));
859}
860
861/* Emits the `ldx.d d, j, k` instruction.  */
862static void __attribute__((unused))
863tcg_out_opc_ldx_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
864{
865    tcg_out32(s, encode_djk_insn(OPC_LDX_D, d, j, k));
866}
867
868/* Emits the `stx.b d, j, k` instruction.  */
869static void __attribute__((unused))
870tcg_out_opc_stx_b(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
871{
872    tcg_out32(s, encode_djk_insn(OPC_STX_B, d, j, k));
873}
874
875/* Emits the `stx.h d, j, k` instruction.  */
876static void __attribute__((unused))
877tcg_out_opc_stx_h(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
878{
879    tcg_out32(s, encode_djk_insn(OPC_STX_H, d, j, k));
880}
881
882/* Emits the `stx.w d, j, k` instruction.  */
883static void __attribute__((unused))
884tcg_out_opc_stx_w(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
885{
886    tcg_out32(s, encode_djk_insn(OPC_STX_W, d, j, k));
887}
888
889/* Emits the `stx.d d, j, k` instruction.  */
890static void __attribute__((unused))
891tcg_out_opc_stx_d(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
892{
893    tcg_out32(s, encode_djk_insn(OPC_STX_D, d, j, k));
894}
895
896/* Emits the `ldx.bu d, j, k` instruction.  */
897static void __attribute__((unused))
898tcg_out_opc_ldx_bu(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
899{
900    tcg_out32(s, encode_djk_insn(OPC_LDX_BU, d, j, k));
901}
902
903/* Emits the `ldx.hu d, j, k` instruction.  */
904static void __attribute__((unused))
905tcg_out_opc_ldx_hu(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
906{
907    tcg_out32(s, encode_djk_insn(OPC_LDX_HU, d, j, k));
908}
909
910/* Emits the `ldx.wu d, j, k` instruction.  */
911static void __attribute__((unused))
912tcg_out_opc_ldx_wu(TCGContext *s, TCGReg d, TCGReg j, TCGReg k)
913{
914    tcg_out32(s, encode_djk_insn(OPC_LDX_WU, d, j, k));
915}
916
917/* Emits the `dbar ud15` instruction.  */
918static void __attribute__((unused))
919tcg_out_opc_dbar(TCGContext *s, uint32_t ud15)
920{
921    tcg_out32(s, encode_ud15_insn(OPC_DBAR, ud15));
922}
923
924/* Emits the `jirl d, j, sk16` instruction.  */
925static void __attribute__((unused))
926tcg_out_opc_jirl(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16)
927{
928    tcg_out32(s, encode_djsk16_insn(OPC_JIRL, d, j, sk16));
929}
930
931/* Emits the `b sd10k16` instruction.  */
932static void __attribute__((unused))
933tcg_out_opc_b(TCGContext *s, int32_t sd10k16)
934{
935    tcg_out32(s, encode_sd10k16_insn(OPC_B, sd10k16));
936}
937
938/* Emits the `bl sd10k16` instruction.  */
939static void __attribute__((unused))
940tcg_out_opc_bl(TCGContext *s, int32_t sd10k16)
941{
942    tcg_out32(s, encode_sd10k16_insn(OPC_BL, sd10k16));
943}
944
945/* Emits the `beq d, j, sk16` instruction.  */
946static void __attribute__((unused))
947tcg_out_opc_beq(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16)
948{
949    tcg_out32(s, encode_djsk16_insn(OPC_BEQ, d, j, sk16));
950}
951
952/* Emits the `bne d, j, sk16` instruction.  */
953static void __attribute__((unused))
954tcg_out_opc_bne(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16)
955{
956    tcg_out32(s, encode_djsk16_insn(OPC_BNE, d, j, sk16));
957}
958
959/* Emits the `bgt d, j, sk16` instruction.  */
960static void __attribute__((unused))
961tcg_out_opc_bgt(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16)
962{
963    tcg_out32(s, encode_djsk16_insn(OPC_BGT, d, j, sk16));
964}
965
966/* Emits the `ble d, j, sk16` instruction.  */
967static void __attribute__((unused))
968tcg_out_opc_ble(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16)
969{
970    tcg_out32(s, encode_djsk16_insn(OPC_BLE, d, j, sk16));
971}
972
973/* Emits the `bgtu d, j, sk16` instruction.  */
974static void __attribute__((unused))
975tcg_out_opc_bgtu(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16)
976{
977    tcg_out32(s, encode_djsk16_insn(OPC_BGTU, d, j, sk16));
978}
979
980/* Emits the `bleu d, j, sk16` instruction.  */
981static void __attribute__((unused))
982tcg_out_opc_bleu(TCGContext *s, TCGReg d, TCGReg j, int32_t sk16)
983{
984    tcg_out32(s, encode_djsk16_insn(OPC_BLEU, d, j, sk16));
985}
986
987/* End of generated code.  */
988