1 /* 2 * QTest testcase for CXL 3 * 4 * This work is licensed under the terms of the GNU GPL, version 2 or later. 5 * See the COPYING file in the top-level directory. 6 */ 7 8 #include "qemu/osdep.h" 9 #include "libqtest-single.h" 10 11 #define QEMU_PXB_CMD \ 12 "-machine q35,cxl=on " \ 13 "-device pxb-cxl,id=cxl.0,bus=pcie.0,bus_nr=52 " \ 14 "-M cxl-fmw.0.targets.0=cxl.0,cxl-fmw.0.size=4G " 15 16 #define QEMU_2PXB_CMD \ 17 "-machine q35,cxl=on " \ 18 "-device pxb-cxl,id=cxl.0,bus=pcie.0,bus_nr=52 " \ 19 "-device pxb-cxl,id=cxl.1,bus=pcie.0,bus_nr=53 " \ 20 "-M cxl-fmw.0.targets.0=cxl.0,cxl-fmw.0.targets.1=cxl.1,cxl-fmw.0.size=4G " 21 22 #define QEMU_RP \ 23 "-device cxl-rp,id=rp0,bus=cxl.0,chassis=0,slot=0 " 24 25 /* Dual ports on first pxb */ 26 #define QEMU_2RP \ 27 "-device cxl-rp,id=rp0,bus=cxl.0,chassis=0,slot=0 " \ 28 "-device cxl-rp,id=rp1,bus=cxl.0,chassis=0,slot=1 " 29 30 /* Dual ports on each of the pxb instances */ 31 #define QEMU_4RP \ 32 "-device cxl-rp,id=rp0,bus=cxl.0,chassis=0,slot=0 " \ 33 "-device cxl-rp,id=rp1,bus=cxl.0,chassis=0,slot=1 " \ 34 "-device cxl-rp,id=rp2,bus=cxl.1,chassis=0,slot=2 " \ 35 "-device cxl-rp,id=rp3,bus=cxl.1,chassis=0,slot=3 " 36 37 #define QEMU_T3D \ 38 "-object memory-backend-file,id=cxl-mem0,mem-path=%s,size=256M " \ 39 "-object memory-backend-file,id=lsa0,mem-path=%s,size=256M " \ 40 "-device cxl-type3,bus=rp0,memdev=cxl-mem0,lsa=lsa0,id=cxl-pmem0 " 41 42 #define QEMU_2T3D \ 43 "-object memory-backend-file,id=cxl-mem0,mem-path=%s,size=256M " \ 44 "-object memory-backend-file,id=lsa0,mem-path=%s,size=256M " \ 45 "-device cxl-type3,bus=rp0,memdev=cxl-mem0,lsa=lsa0,id=cxl-pmem0 " \ 46 "-object memory-backend-file,id=cxl-mem1,mem-path=%s,size=256M " \ 47 "-object memory-backend-file,id=lsa1,mem-path=%s,size=256M " \ 48 "-device cxl-type3,bus=rp1,memdev=cxl-mem1,lsa=lsa1,id=cxl-pmem1 " 49 50 #define QEMU_4T3D \ 51 "-object memory-backend-file,id=cxl-mem0,mem-path=%s,size=256M " \ 52 "-object memory-backend-file,id=lsa0,mem-path=%s,size=256M " \ 53 "-device cxl-type3,bus=rp0,memdev=cxl-mem0,lsa=lsa0,id=cxl-pmem0 " \ 54 "-object memory-backend-file,id=cxl-mem1,mem-path=%s,size=256M " \ 55 "-object memory-backend-file,id=lsa1,mem-path=%s,size=256M " \ 56 "-device cxl-type3,bus=rp1,memdev=cxl-mem1,lsa=lsa1,id=cxl-pmem1 " \ 57 "-object memory-backend-file,id=cxl-mem2,mem-path=%s,size=256M " \ 58 "-object memory-backend-file,id=lsa2,mem-path=%s,size=256M " \ 59 "-device cxl-type3,bus=rp2,memdev=cxl-mem2,lsa=lsa2,id=cxl-pmem2 " \ 60 "-object memory-backend-file,id=cxl-mem3,mem-path=%s,size=256M " \ 61 "-object memory-backend-file,id=lsa3,mem-path=%s,size=256M " \ 62 "-device cxl-type3,bus=rp3,memdev=cxl-mem3,lsa=lsa3,id=cxl-pmem3 " 63 64 static void cxl_basic_hb(void) 65 { 66 qtest_start("-machine q35,cxl=on"); 67 qtest_end(); 68 } 69 70 static void cxl_basic_pxb(void) 71 { 72 qtest_start("-machine q35,cxl=on -device pxb-cxl,bus=pcie.0"); 73 qtest_end(); 74 } 75 76 static void cxl_pxb_with_window(void) 77 { 78 qtest_start(QEMU_PXB_CMD); 79 qtest_end(); 80 } 81 82 static void cxl_2pxb_with_window(void) 83 { 84 qtest_start(QEMU_2PXB_CMD); 85 qtest_end(); 86 } 87 88 static void cxl_root_port(void) 89 { 90 qtest_start(QEMU_PXB_CMD QEMU_RP); 91 qtest_end(); 92 } 93 94 static void cxl_2root_port(void) 95 { 96 qtest_start(QEMU_PXB_CMD QEMU_2RP); 97 qtest_end(); 98 } 99 100 #ifdef CONFIG_POSIX 101 static void cxl_t3d(void) 102 { 103 g_autoptr(GString) cmdline = g_string_new(NULL); 104 g_autofree const char *tmpfs = NULL; 105 106 tmpfs = g_dir_make_tmp("cxl-test-XXXXXX", NULL); 107 108 g_string_printf(cmdline, QEMU_PXB_CMD QEMU_RP QEMU_T3D, tmpfs, tmpfs); 109 110 qtest_start(cmdline->str); 111 qtest_end(); 112 rmdir(tmpfs); 113 } 114 115 static void cxl_1pxb_2rp_2t3d(void) 116 { 117 g_autoptr(GString) cmdline = g_string_new(NULL); 118 g_autofree const char *tmpfs = NULL; 119 120 tmpfs = g_dir_make_tmp("cxl-test-XXXXXX", NULL); 121 122 g_string_printf(cmdline, QEMU_PXB_CMD QEMU_2RP QEMU_2T3D, 123 tmpfs, tmpfs, tmpfs, tmpfs); 124 125 qtest_start(cmdline->str); 126 qtest_end(); 127 rmdir(tmpfs); 128 } 129 130 static void cxl_2pxb_4rp_4t3d(void) 131 { 132 g_autoptr(GString) cmdline = g_string_new(NULL); 133 g_autofree const char *tmpfs = NULL; 134 135 tmpfs = g_dir_make_tmp("cxl-test-XXXXXX", NULL); 136 137 g_string_printf(cmdline, QEMU_2PXB_CMD QEMU_4RP QEMU_4T3D, 138 tmpfs, tmpfs, tmpfs, tmpfs, tmpfs, tmpfs, 139 tmpfs, tmpfs); 140 141 qtest_start(cmdline->str); 142 qtest_end(); 143 rmdir(tmpfs); 144 } 145 #endif /* CONFIG_POSIX */ 146 147 int main(int argc, char **argv) 148 { 149 g_test_init(&argc, &argv, NULL); 150 151 qtest_add_func("/pci/cxl/basic_hostbridge", cxl_basic_hb); 152 qtest_add_func("/pci/cxl/basic_pxb", cxl_basic_pxb); 153 qtest_add_func("/pci/cxl/pxb_with_window", cxl_pxb_with_window); 154 qtest_add_func("/pci/cxl/pxb_x2_with_window", cxl_2pxb_with_window); 155 qtest_add_func("/pci/cxl/rp", cxl_root_port); 156 qtest_add_func("/pci/cxl/rp_x2", cxl_2root_port); 157 #ifdef CONFIG_POSIX 158 qtest_add_func("/pci/cxl/type3_device", cxl_t3d); 159 qtest_add_func("/pci/cxl/rp_x2_type3_x2", cxl_1pxb_2rp_2t3d); 160 qtest_add_func("/pci/cxl/pxb_x2_root_port_x4_type3_x4", cxl_2pxb_4rp_4t3d); 161 #endif 162 return g_test_run(); 163 } 164