1# -*- Mode: makefile -*- 2# 3# ppc64 specific tweaks 4 5VPATH += $(SRC_PATH)/tests/tcg/ppc64 6 7config-cc.mak: Makefile 8 $(quiet-@)( \ 9 $(call cc-option,-mpower8-vector, CROSS_CC_HAS_POWER8_VECTOR); \ 10 $(call cc-option,-mpower10, CROSS_CC_HAS_POWER10)) 3> config-cc.mak 11 12-include config-cc.mak 13 14ifneq ($(CROSS_CC_HAS_POWER8_VECTOR),) 15PPC64_TESTS=bcdsub non_signalling_xscv 16endif 17$(PPC64_TESTS): CFLAGS += -mpower8-vector 18 19ifneq ($(CROSS_CC_HAS_POWER8_VECTOR),) 20PPC64_TESTS += vsx_f2i_nan 21endif 22vsx_f2i_nan: CFLAGS += -mpower8-vector -I$(SRC_PATH)/include 23 24PPC64_TESTS += mtfsf 25PPC64_TESTS += mffsce 26 27ifneq ($(CROSS_CC_HAS_POWER10),) 28PPC64_TESTS += byte_reverse sha512-vector vector 29endif 30byte_reverse: CFLAGS += -mcpu=power10 31run-byte_reverse: QEMU_OPTS+=-cpu POWER10 32 33sha512-vector: CFLAGS +=-mcpu=power10 -O3 34sha512-vector: sha512.c 35 $(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS) 36 37run-sha512-vector: QEMU_OPTS+=-cpu POWER10 38 39vector: CFLAGS += -mcpu=power10 -I$(SRC_PATH)/include 40run-vector: QEMU_OPTS += -cpu POWER10 41 42PPC64_TESTS += signal_save_restore_xer 43PPC64_TESTS += xxspltw 44PPC64_TESTS += test-aes 45 46ifneq ($(GDB),) 47# Skip for now until vsx registers sorted out 48run-gdbstub-registers: 49 $(call skip-test, $<, "BROKEN reading VSX registers") 50endif 51 52 53TESTS += $(PPC64_TESTS) 54