xref: /qemu/tests/tcg/tricore/link.ld (revision 727385c4)
1/* Default linker script, for normal executables */
2OUTPUT_FORMAT("elf32-tricore")
3OUTPUT_ARCH(tricore)
4ENTRY(_start)
5
6/* the internal ram description */
7MEMORY
8{
9  text_ram (rx!p): org = 0x80000000, len = 15K
10  data_ram (w!xp): org = 0xd0000000, len = 130K
11}
12/*
13 * Define the sizes of the user and system stacks.
14 */
15__USTACK_SIZE = DEFINED (__USTACK_SIZE) ? __USTACK_SIZE : 1K ;
16/*
17 * Define the start address and the size of the context save area.
18 */
19__CSA_BEGIN =  0xd0000000 ;
20__CSA_SIZE =  8k ;
21__CSA_END = __CSA_BEGIN + __CSA_SIZE ;
22
23SECTIONS
24{
25  .text  :
26  {
27    *(.text)
28    . = ALIGN(8);
29  } > text_ram
30
31  .rodata :
32  {
33    *(.rodata)
34    *(.rodata1)
35  } > data_ram
36
37  .data :
38  {
39    . = ALIGN(8) ;
40    *(.data)
41    *(.data.*)
42    . = ALIGN(8) ;
43    __USTACK = . + __USTACK_SIZE -768;
44
45  } > data_ram
46  /*
47   * Allocate space for BSS sections.
48   */
49  .bss  :
50  {
51    BSS_BASE = . ;
52    *(.bss)
53    *(COMMON)
54    . = ALIGN(8) ;
55  } > data_ram
56  /* Make sure CSA, stack and heap addresses are properly aligned.  */
57  _. = ASSERT ((__CSA_BEGIN & 0x3f) == 0 , "illegal CSA start address") ;
58  _. = ASSERT ((__CSA_SIZE & 0x3f) == 0 , "illegal CSA size") ;
59
60}
61