xref: /qemu/tests/tcg/tricore/link.ld (revision f8ed3648)
1/* Default linker script, for normal executables */
2OUTPUT_FORMAT("elf32-tricore")
3OUTPUT_ARCH(tricore)
4ENTRY(_start)
5
6/* the internal ram description */
7MEMORY
8{
9  text_ram (rx!p): org = 0x80000000, len = 15K
10  data_ram (w!xp): org = 0xd0000000, len = 130K
11}
12/*
13 * Define the sizes of the user and system stacks.
14 */
15__ISTACK_SIZE = DEFINED (__ISTACK_SIZE) ? __ISTACK_SIZE : 256 ;
16__USTACK_SIZE = DEFINED (__USTACK_SIZE) ? __USTACK_SIZE : 1K ;
17/*
18 * Define the start address and the size of the context save area.
19 */
20__CSA_BEGIN =  0xd0000000 ;
21__CSA_SIZE =  8k ;
22__CSA_END = __CSA_BEGIN + __CSA_SIZE ;
23
24__TESTDEVICE = 0xf0000000 ;
25
26SECTIONS
27{
28  .text  :
29  {
30    *(.text)
31    . = ALIGN(8);
32  } > text_ram
33
34  .rodata :
35  {
36    *(.rodata)
37    *(.rodata1)
38    /*
39     * Create the clear and copy tables that tell the startup code
40     * which memory areas to clear and to copy, respectively.
41     */
42    . = ALIGN(4) ;
43    PROVIDE(__clear_table = .) ;
44    LONG(0 + ADDR(.bss));     LONG(SIZEOF(.bss));
45    LONG(-1);                 LONG(-1);
46    PROVIDE(__copy_table = .) ;
47    LONG(LOADADDR(.data));    LONG(0 + ADDR(.data));    LONG(SIZEOF(.data));
48    LONG(-1);                 LONG(-1);                 LONG(-1);
49    . = ALIGN(8);
50  } > data_ram
51
52  .data :
53  {
54    . = ALIGN(8) ;
55    *(.data)
56    *(.data.*)
57    . = ALIGN(8) ;
58    __ISTACK = . + __ISTACK_SIZE ;
59    __USTACK = . + __USTACK_SIZE -768;
60
61  } > data_ram
62  /*
63   * Allocate space for BSS sections.
64   */
65  .bss  :
66  {
67    BSS_BASE = . ;
68    *(.bss)
69    *(COMMON)
70    . = ALIGN(8) ;
71  } > data_ram
72  /* Make sure CSA, stack and heap addresses are properly aligned.  */
73  _. = ASSERT ((__CSA_BEGIN & 0x3f) == 0 , "illegal CSA start address") ;
74  _. = ASSERT ((__CSA_SIZE & 0x3f) == 0 , "illegal CSA size") ;
75
76}
77