1 /* 2 * File cpu_arm64.c 3 * 4 * Copyright (C) 2009 Eric Pouech 5 * Copyright (C) 2010-2013 André Hentschel 6 * 7 * This library is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU Lesser General Public 9 * License as published by the Free Software Foundation; either 10 * version 2.1 of the License, or (at your option) any later version. 11 * 12 * This library is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15 * Lesser General Public License for more details. 16 * 17 * You should have received a copy of the GNU Lesser General Public 18 * License along with this library; if not, write to the Free Software 19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA 20 */ 21 22 #include <assert.h> 23 24 #define NONAMELESSUNION 25 #define NONAMELESSSTRUCT 26 #include "ntstatus.h" 27 #define WIN32_NO_STATUS 28 #include "dbghelp_private.h" 29 #include "winternl.h" 30 #include "wine/debug.h" 31 32 WINE_DEFAULT_DEBUG_CHANNEL(dbghelp); 33 34 static BOOL arm64_get_addr(HANDLE hThread, const CONTEXT* ctx, 35 enum cpu_addr ca, ADDRESS64* addr) 36 { 37 addr->Mode = AddrModeFlat; 38 addr->Segment = 0; /* don't need segment */ 39 switch (ca) 40 { 41 #ifdef __aarch64__ 42 case cpu_addr_pc: addr->Offset = ctx->Pc; return TRUE; 43 case cpu_addr_stack: addr->Offset = ctx->Sp; return TRUE; 44 case cpu_addr_frame: addr->Offset = ctx->u.s.Fp; return TRUE; 45 #endif 46 default: addr->Mode = -1; 47 return FALSE; 48 } 49 } 50 51 #ifdef __aarch64__ 52 enum st_mode {stm_start, stm_arm64, stm_done}; 53 54 /* indexes in Reserved array */ 55 #define __CurrentModeCount 0 56 57 #define curr_mode (frame->Reserved[__CurrentModeCount] & 0x0F) 58 #define curr_count (frame->Reserved[__CurrentModeCount] >> 4) 59 60 #define set_curr_mode(m) {frame->Reserved[__CurrentModeCount] &= ~0x0F; frame->Reserved[__CurrentModeCount] |= (m & 0x0F);} 61 #define inc_curr_count() (frame->Reserved[__CurrentModeCount] += 0x10) 62 63 /* fetch_next_frame() 64 * 65 * modify (at least) context.Pc using unwind information 66 * either out of debug info (dwarf), or simple Lr trace 67 */ 68 static BOOL fetch_next_frame(struct cpu_stack_walk* csw, union ctx *pcontext, 69 DWORD_PTR curr_pc) 70 { 71 DWORD64 xframe; 72 CONTEXT *context = &pcontext->ctx; 73 DWORD_PTR oldReturn = context->u.s.Lr; 74 75 if (dwarf2_virtual_unwind(csw, curr_pc, pcontext, &xframe)) 76 { 77 context->Sp = xframe; 78 context->Pc = oldReturn; 79 return TRUE; 80 } 81 82 if (context->Pc == context->u.s.Lr) return FALSE; 83 context->Pc = oldReturn; 84 85 return TRUE; 86 } 87 88 static BOOL arm64_stack_walk(struct cpu_stack_walk *csw, STACKFRAME64 *frame, 89 union ctx *context) 90 { 91 unsigned deltapc = curr_count <= 1 ? 0 : 4; 92 93 /* sanity check */ 94 if (curr_mode >= stm_done) return FALSE; 95 96 TRACE("Enter: PC=%s Frame=%s Return=%s Stack=%s Mode=%s Count=%s\n", 97 wine_dbgstr_addr(&frame->AddrPC), 98 wine_dbgstr_addr(&frame->AddrFrame), 99 wine_dbgstr_addr(&frame->AddrReturn), 100 wine_dbgstr_addr(&frame->AddrStack), 101 curr_mode == stm_start ? "start" : "ARM64", 102 wine_dbgstr_longlong(curr_count)); 103 104 if (curr_mode == stm_start) 105 { 106 /* Init done */ 107 set_curr_mode(stm_arm64); 108 frame->AddrReturn.Mode = frame->AddrStack.Mode = AddrModeFlat; 109 /* don't set up AddrStack on first call. Either the caller has set it up, or 110 * we will get it in the next frame 111 */ 112 memset(&frame->AddrBStore, 0, sizeof(frame->AddrBStore)); 113 } 114 else 115 { 116 if (context->ctx.Sp != frame->AddrStack.Offset) FIXME("inconsistent Stack Pointer\n"); 117 if (context->ctx.Pc != frame->AddrPC.Offset) FIXME("inconsistent Program Counter\n"); 118 119 if (frame->AddrReturn.Offset == 0) goto done_err; 120 if (!fetch_next_frame(csw, context, frame->AddrPC.Offset - deltapc)) 121 goto done_err; 122 } 123 124 memset(&frame->Params, 0, sizeof(frame->Params)); 125 126 /* set frame information */ 127 frame->AddrStack.Offset = context->ctx.Sp; 128 frame->AddrReturn.Offset = context->ctx.u.s.Lr; 129 frame->AddrFrame.Offset = context->ctx.u.s.Fp; 130 frame->AddrPC.Offset = context->ctx.Pc; 131 132 frame->Far = TRUE; 133 frame->Virtual = TRUE; 134 inc_curr_count(); 135 136 TRACE("Leave: PC=%s Frame=%s Return=%s Stack=%s Mode=%s Count=%s FuncTable=%p\n", 137 wine_dbgstr_addr(&frame->AddrPC), 138 wine_dbgstr_addr(&frame->AddrFrame), 139 wine_dbgstr_addr(&frame->AddrReturn), 140 wine_dbgstr_addr(&frame->AddrStack), 141 curr_mode == stm_start ? "start" : "ARM64", 142 wine_dbgstr_longlong(curr_count), 143 frame->FuncTableEntry); 144 145 return TRUE; 146 done_err: 147 set_curr_mode(stm_done); 148 return FALSE; 149 } 150 #else 151 static BOOL arm64_stack_walk(struct cpu_stack_walk* csw, STACKFRAME64 *frame, 152 union ctx *ctx) 153 { 154 return FALSE; 155 } 156 #endif 157 158 static unsigned arm64_map_dwarf_register(unsigned regno, const struct module* module, BOOL eh_frame) 159 { 160 if (regno <= 28) return CV_ARM64_X0 + regno; 161 if (regno == 29) return CV_ARM64_FP; 162 if (regno == 30) return CV_ARM64_LR; 163 if (regno == 31) return CV_ARM64_SP; 164 if (regno >= 64 && regno <= 95) return CV_ARM64_Q0 + regno - 64; 165 166 FIXME("Don't know how to map register %d\n", regno); 167 return CV_ARM64_NOREG; 168 } 169 170 static void *arm64_fetch_context_reg(union ctx *pctx, unsigned regno, unsigned *size) 171 { 172 #ifdef __aarch64__ 173 CONTEXT *ctx = pctx; 174 175 switch (regno) 176 { 177 case CV_ARM64_X0 + 0: 178 case CV_ARM64_X0 + 1: 179 case CV_ARM64_X0 + 2: 180 case CV_ARM64_X0 + 3: 181 case CV_ARM64_X0 + 4: 182 case CV_ARM64_X0 + 5: 183 case CV_ARM64_X0 + 6: 184 case CV_ARM64_X0 + 7: 185 case CV_ARM64_X0 + 8: 186 case CV_ARM64_X0 + 9: 187 case CV_ARM64_X0 + 10: 188 case CV_ARM64_X0 + 11: 189 case CV_ARM64_X0 + 12: 190 case CV_ARM64_X0 + 13: 191 case CV_ARM64_X0 + 14: 192 case CV_ARM64_X0 + 15: 193 case CV_ARM64_X0 + 16: 194 case CV_ARM64_X0 + 17: 195 case CV_ARM64_X0 + 18: 196 case CV_ARM64_X0 + 19: 197 case CV_ARM64_X0 + 20: 198 case CV_ARM64_X0 + 21: 199 case CV_ARM64_X0 + 22: 200 case CV_ARM64_X0 + 23: 201 case CV_ARM64_X0 + 24: 202 case CV_ARM64_X0 + 25: 203 case CV_ARM64_X0 + 26: 204 case CV_ARM64_X0 + 27: 205 case CV_ARM64_X0 + 28: *size = sizeof(ctx->u.X[0]); return &ctx->u.X[regno - CV_ARM64_X0]; 206 case CV_ARM64_PSTATE: *size = sizeof(ctx->Cpsr); return &ctx->Cpsr; 207 case CV_ARM64_FP: *size = sizeof(ctx->u.s.Fp); return &ctx->u.s.Fp; 208 case CV_ARM64_LR: *size = sizeof(ctx->u.s.Lr); return &ctx->u.s.Lr; 209 case CV_ARM64_SP: *size = sizeof(ctx->Sp); return &ctx->Sp; 210 case CV_ARM64_PC: *size = sizeof(ctx->Pc); return &ctx->Pc; 211 } 212 #endif 213 FIXME("Unknown register %x\n", regno); 214 return NULL; 215 } 216 217 static const char* arm64_fetch_regname(unsigned regno) 218 { 219 switch (regno) 220 { 221 case CV_ARM64_PSTATE: return "cpsr"; 222 case CV_ARM64_X0 + 0: return "x0"; 223 case CV_ARM64_X0 + 1: return "x1"; 224 case CV_ARM64_X0 + 2: return "x2"; 225 case CV_ARM64_X0 + 3: return "x3"; 226 case CV_ARM64_X0 + 4: return "x4"; 227 case CV_ARM64_X0 + 5: return "x5"; 228 case CV_ARM64_X0 + 6: return "x6"; 229 case CV_ARM64_X0 + 7: return "x7"; 230 case CV_ARM64_X0 + 8: return "x8"; 231 case CV_ARM64_X0 + 9: return "x9"; 232 case CV_ARM64_X0 + 10: return "x10"; 233 case CV_ARM64_X0 + 11: return "x11"; 234 case CV_ARM64_X0 + 12: return "x12"; 235 case CV_ARM64_X0 + 13: return "x13"; 236 case CV_ARM64_X0 + 14: return "x14"; 237 case CV_ARM64_X0 + 15: return "x15"; 238 case CV_ARM64_X0 + 16: return "x16"; 239 case CV_ARM64_X0 + 17: return "x17"; 240 case CV_ARM64_X0 + 18: return "x18"; 241 case CV_ARM64_X0 + 19: return "x19"; 242 case CV_ARM64_X0 + 20: return "x20"; 243 case CV_ARM64_X0 + 21: return "x21"; 244 case CV_ARM64_X0 + 22: return "x22"; 245 case CV_ARM64_X0 + 23: return "x23"; 246 case CV_ARM64_X0 + 24: return "x24"; 247 case CV_ARM64_X0 + 25: return "x25"; 248 case CV_ARM64_X0 + 26: return "x26"; 249 case CV_ARM64_X0 + 27: return "x27"; 250 case CV_ARM64_X0 + 28: return "x28"; 251 252 case CV_ARM64_FP: return "fp"; 253 case CV_ARM64_LR: return "lr"; 254 case CV_ARM64_SP: return "sp"; 255 case CV_ARM64_PC: return "pc"; 256 } 257 FIXME("Unknown register %x\n", regno); 258 return NULL; 259 } 260 261 static BOOL arm64_fetch_minidump_thread(struct dump_context* dc, unsigned index, unsigned flags, const CONTEXT* ctx) 262 { 263 if (ctx->ContextFlags && (flags & ThreadWriteInstructionWindow)) 264 { 265 /* FIXME: crop values across module boundaries, */ 266 #ifdef __aarch64__ 267 ULONG base = ctx->Pc <= 0x80 ? 0 : ctx->Pc - 0x80; 268 minidump_add_memory_block(dc, base, ctx->Pc + 0x80 - base, 0); 269 #endif 270 } 271 272 return TRUE; 273 } 274 275 static BOOL arm64_fetch_minidump_module(struct dump_context* dc, unsigned index, unsigned flags) 276 { 277 /* FIXME: actually, we should probably take care of FPO data, unless it's stored in 278 * function table minidump stream 279 */ 280 return FALSE; 281 } 282 283 DECLSPEC_HIDDEN struct cpu cpu_arm64 = { 284 IMAGE_FILE_MACHINE_ARM64, 285 8, 286 CV_ARM64_FP, 287 arm64_get_addr, 288 arm64_stack_walk, 289 NULL, 290 arm64_map_dwarf_register, 291 arm64_fetch_context_reg, 292 arm64_fetch_regname, 293 arm64_fetch_minidump_thread, 294 arm64_fetch_minidump_module, 295 }; 296