1 /* 2 * PROJECT: ReactOS nVidia nForce Ethernet Controller Driver 3 * LICENSE: GPL-2.0-or-later (https://spdx.org/licenses/GPL-2.0-or-later) 4 * PURPOSE: Common header file 5 * COPYRIGHT: Copyright 2021-2022 Dmitry Borisov <di.sean@protonmail.com> 6 */ 7 8 #ifndef _NVNET_PCH_ 9 #define _NVNET_PCH_ 10 11 #if !DBG 12 #define NO_KERNEL_LIST_ENTRY_CHECKS 13 #endif 14 #include <ndis.h> 15 16 #include <section_attribs.h> 17 18 #include "eth.h" 19 #include "nic.h" 20 #include "phyreg.h" 21 22 #define NVNET_TAG 'ENVN' 23 24 #if defined(SARCH_XBOX) 25 /* Reduce memory requirements on OG Xbox */ 26 #define NVNET_TRANSMIT_BLOCKS 8 27 #define NVNET_TRANSMIT_DESCRIPTORS 32 28 #define NVNET_TRANSMIT_BUFFERS 1 29 #define NVNET_RECEIVE_DESCRIPTORS 16 30 #else 31 #define NVNET_TRANSMIT_BLOCKS 64 32 #define NVNET_TRANSMIT_DESCRIPTORS 512 33 #define NVNET_TRANSMIT_BUFFERS 16 34 #define NVNET_RECEIVE_DESCRIPTORS 512 35 #endif 36 37 #define NVNET_ALIGNMENT 64 38 39 #define NVNET_RECEIVE_BUFFER_SIZE 2048 40 41 #define NVNET_RECEIVE_PROCESSING_LIMIT 64 42 43 #define NVNET_IM_THRESHOLD 4 44 #define NVNET_IM_MAX_IDLE 40 45 46 #if defined(SARCH_XBOX) 47 #define NVNET_TRANSMIT_HANG_THRESHOLD 3 48 #else 49 #define NVNET_TRANSMIT_HANG_THRESHOLD 5 50 #endif 51 52 #if defined(SARCH_XBOX) 53 #define NVNET_FRAGMENTATION_THRESHOLD 8 54 #else 55 #define NVNET_FRAGMENTATION_THRESHOLD 32 56 #endif 57 58 #define NVNET_MEDIA_DETECTION_INTERVAL 5000 59 60 #define NVNET_MAXIMUM_FRAME_SIZE 1514 61 #define NVNET_MAXIMUM_FRAME_SIZE_JUMBO 9014 62 #define NVNET_MAXIMUM_VLAN_ID 0xFFF 63 64 #define NVNET_MULTICAST_LIST_SIZE 32 65 66 #define NVNET_MINIMUM_LSO_SEGMENT_COUNT 2 67 #define NVNET_MAXIMUM_LSO_FRAME_SIZE 0xFC00 68 69 #define NVNET_PACKET_FILTERS ( \ 70 NDIS_PACKET_TYPE_DIRECTED | \ 71 NDIS_PACKET_TYPE_MULTICAST | \ 72 NDIS_PACKET_TYPE_BROADCAST | \ 73 NDIS_PACKET_TYPE_PROMISCUOUS | \ 74 NDIS_PACKET_TYPE_ALL_MULTICAST) 75 76 #define PACKET_ENTRY(Packet) ((PLIST_ENTRY)(&(Packet)->MiniportReserved[0])) 77 78 typedef enum _NVNET_OPTIMIZATION_MODE 79 { 80 NV_OPTIMIZATION_MODE_DYNAMIC = 0, 81 NV_OPTIMIZATION_MODE_CPU, 82 NV_OPTIMIZATION_MODE_THROUGHPUT 83 } NVNET_OPTIMIZATION_MODE; 84 85 typedef enum _NVNET_FLOW_CONTROL_MODE 86 { 87 NV_FLOW_CONTROL_DISABLE = 0, 88 NV_FLOW_CONTROL_AUTO, 89 NV_FLOW_CONTROL_RX, 90 NV_FLOW_CONTROL_TX, 91 NV_FLOW_CONTROL_RX_TX 92 } NVNET_FLOW_CONTROL_MODE; 93 94 typedef union _NVNET_OFFLOAD 95 { 96 struct { 97 ULONG SendIpOptions:1; 98 ULONG SendTcpOptions:1; 99 ULONG SendTcpChecksum:1; 100 ULONG SendUdpChecksum:1; 101 ULONG SendIpChecksum:1; 102 103 ULONG ReceiveIpOptions:1; 104 ULONG ReceiveTcpOptions:1; 105 ULONG ReceiveTcpChecksum:1; 106 ULONG ReceiveUdpChecksum:1; 107 ULONG ReceiveIpChecksum:1; 108 109 ULONG SendIpV6Options:1; 110 ULONG SendTcpV6Options:1; 111 ULONG SendTcpV6Checksum:1; 112 ULONG SendUdpV6Checksum:1; 113 114 ULONG ReceiveIpV6Options:1; 115 ULONG ReceiveTcpV6Options:1; 116 ULONG ReceiveTcpV6Checksum:1; 117 ULONG ReceiveUdpV6Checksum:1; 118 }; 119 ULONG Value; 120 } NVNET_OFFLOAD, *PNVNET_OFFLOAD; 121 122 typedef struct _NVNET_STATISTICS 123 { 124 ULONG64 HwTxCnt; 125 ULONG64 HwTxZeroReXmt; 126 ULONG64 HwTxOneReXmt; 127 ULONG64 HwTxManyReXmt; 128 ULONG64 HwTxLateCol; 129 ULONG64 HwTxUnderflow; 130 ULONG64 HwTxLossCarrier; 131 ULONG64 HwTxExcessDef; 132 ULONG64 HwTxRetryErr; 133 ULONG64 HwRxFrameErr; 134 ULONG64 HwRxExtraByte; 135 ULONG64 HwRxLateCol; 136 ULONG64 HwRxRunt; 137 ULONG64 HwRxFrameTooLong; 138 ULONG64 HwRxOverflow; 139 ULONG64 HwRxFCSErr; 140 ULONG64 HwRxFrameAlignErr; 141 ULONG64 HwRxLenErr; 142 ULONG64 HwTxDef; 143 ULONG64 HwTxFrame; 144 ULONG64 HwRxCnt; 145 ULONG64 HwTxPause; 146 ULONG64 HwRxPause; 147 ULONG64 HwRxDropFrame; 148 ULONG64 HwRxUnicast; 149 ULONG64 HwRxMulticast; 150 ULONG64 HwRxBroadcast; 151 ULONG64 HwTxUnicast; 152 ULONG64 HwTxMulticast; 153 ULONG64 HwTxBroadcast; 154 155 ULONG64 TransmitOk; 156 ULONG64 ReceiveOk; 157 ULONG64 TransmitErrors; 158 ULONG64 ReceiveErrors; 159 ULONG64 ReceiveNoBuffers; 160 ULONG64 ReceiveCrcErrors; 161 ULONG64 ReceiveAlignmentErrors; 162 ULONG64 TransmitDeferred; 163 ULONG64 TransmitExcessiveCollisions; 164 ULONG64 ReceiveOverrunErrors; 165 ULONG64 TransmitUnderrunErrors; 166 ULONG64 TransmitZeroRetry; 167 ULONG64 TransmitOneRetry; 168 ULONG64 TransmitLostCarrierSense; 169 ULONG64 TransmitLateCollisions; 170 171 ULONG ReceiveIrqNoBuffers; 172 } NVNET_STATISTICS, *PNVNET_STATISTICS; 173 174 typedef struct _NVNET_WAKE_FRAME 175 { 176 union 177 { 178 UCHAR AsUCHAR[16]; 179 ULONG AsULONG[4]; 180 } PatternMask; 181 UCHAR WakeUpPattern[128]; 182 } NVNET_WAKE_FRAME, *PNVNET_WAKE_FRAME; 183 184 typedef struct _NVNET_TX_BUFFER_DATA 185 { 186 PVOID VirtualAddress; 187 NDIS_PHYSICAL_ADDRESS PhysicalAddress; 188 } NVNET_TX_BUFFER_DATA, *PNVNET_TX_BUFFER_DATA; 189 190 typedef struct _NVNET_TX_BUFFER 191 { 192 SINGLE_LIST_ENTRY Link; 193 PVOID VirtualAddress; 194 NDIS_PHYSICAL_ADDRESS PhysicalAddress; 195 } NVNET_TX_BUFFER, *PNVNET_TX_BUFFER; 196 197 typedef union _NVNET_TBD 198 { 199 PNVNET_DESCRIPTOR_32 x32; 200 PNVNET_DESCRIPTOR_64 x64; 201 PVOID Memory; 202 } NVNET_TBD; 203 204 typedef struct _NVNET_TCB 205 { 206 NVNET_TBD Tbd; 207 NVNET_TBD DeferredTbd; 208 PNDIS_PACKET Packet; 209 PNVNET_TX_BUFFER Buffer; 210 ULONG Slots; 211 ULONG Flags; 212 #define NV_TCB_LARGE_SEND 0x00000001 213 #define NV_TCB_CHECKSUM_IP 0x00000002 214 #define NV_TCB_CHECKSUM_TCP 0x00000004 215 #define NV_TCB_CHECKSUM_UDP 0x00000008 216 #define NV_TCB_COALESCE 0x00000010 217 218 ULONG Mss; 219 } NVNET_TCB, *PNVNET_TCB; 220 221 typedef union _NV_RBD 222 { 223 PNVNET_DESCRIPTOR_32 x32; 224 PNVNET_DESCRIPTOR_64 x64; 225 PVOID Memory; 226 } NV_RBD; 227 228 typedef struct _NVNET_RBD 229 { 230 NV_RBD NvRbd; 231 PNDIS_PACKET Packet; 232 PNDIS_BUFFER Buffer; 233 } NVNET_RBD, *PNVNET_RBD; 234 235 typedef struct _NVNET_SEND 236 { 237 NDIS_SPIN_LOCK Lock; 238 PNVNET_TCB HeadTcb; 239 PNVNET_TCB TailTcb; 240 PNVNET_TCB LastTcb; 241 PNVNET_TCB CurrentTcb; 242 PNVNET_TCB DeferredTcb; 243 NVNET_TBD HeadTbd; 244 NVNET_TBD TailTbd; 245 NVNET_TBD CurrentTbd; 246 ULONG TcbSlots; 247 ULONG TbdSlots; 248 ULONG StuckCount; 249 ULONG PacketsCount; 250 SINGLE_LIST_ENTRY BufferList; 251 } NVNET_SEND, *PNVNET_SEND; 252 253 typedef struct _NVNET_RECEIVE 254 { 255 NDIS_SPIN_LOCK Lock; 256 NV_RBD NvRbd; 257 } NVNET_RECEIVE, *PNVNET_RECEIVE; 258 259 typedef struct _NVNET_ADAPTER NVNET_ADAPTER, *PNVNET_ADAPTER; 260 261 typedef VOID 262 (NVNET_TRANSMIT_PACKET)( 263 _In_ PNVNET_ADAPTER Adapter, 264 _In_ PNVNET_TCB Tcb, 265 _In_ PSCATTER_GATHER_LIST SgList); 266 typedef NVNET_TRANSMIT_PACKET *PNVNET_TRANSMIT_PACKET; 267 268 typedef ULONG 269 (NVNET_PROCESS_TRANSMIT)( 270 _In_ PNVNET_ADAPTER Adapter, 271 _Inout_ PLIST_ENTRY SendReadyList); 272 typedef NVNET_PROCESS_TRANSMIT *PNVNET_PROCESS_TRANSMIT; 273 274 typedef ULONG 275 (NVNET_PROCESS_RECEIVE)( 276 _In_ PNVNET_ADAPTER Adapter, 277 _In_ ULONG TotalRxProcessed); 278 typedef NVNET_PROCESS_RECEIVE *PNVNET_PROCESS_RECEIVE; 279 280 typedef struct _NVNET_ADAPTER 281 { 282 volatile PUCHAR IoBase; 283 NDIS_HANDLE AdapterHandle; 284 ULONG Features; 285 ULONG Flags; 286 #define NV_ACTIVE 0x80000000 287 #define NV_SEND_CHECKSUM 0x00000002 288 #define NV_SEND_LARGE_SEND 0x00000004 289 #define NV_SEND_ERRATA_PRESENT 0x00000008 290 291 #define NV_MAC_IN_USE 0x00000010 292 #define NV_GIGABIT_PHY 0x00000020 293 #define NV_UNIT_SEMAPHORE_ACQUIRED 0x00000040 294 #define NV_USE_SOFT_MAC_ADDRESS 0x00000100 295 #define NV_FORCE_SPEED_AND_DUPLEX 0x00000200 296 #define NV_FORCE_FULL_DUPLEX 0x00000400 297 #define NV_USER_SPEED_100 0x00000800 298 #define NV_PACKET_PRIORITY 0x00001000 299 #define NV_VLAN_TAGGING 0x00002000 300 301 ULONG TxRxControl; 302 ULONG InterruptMask; 303 ULONG InterruptStatus; 304 ULONG InterruptIdleCount; 305 ULONG AdapterStatus; 306 NVNET_OPTIMIZATION_MODE OptimizationMode; 307 NVNET_OFFLOAD Offload; 308 ULONG IpHeaderOffset; 309 ULONG PacketFilter; 310 NVNET_SEND Send; 311 312 NVNET_RECEIVE Receive; 313 PUCHAR ReceiveBuffer; 314 ULONG CurrentRx; 315 316 PNVNET_TRANSMIT_PACKET TransmitPacket; 317 PNVNET_PROCESS_TRANSMIT ProcessTransmit; 318 319 NVNET_STATISTICS Statistics; 320 NDIS_SPIN_LOCK Lock; 321 ULONG MaximumFrameSize; 322 ULONG ReceiveBufferSize; 323 ULONG VlanId; 324 ULONG WakeFlags; 325 ULONG PhyAddress; 326 ULONG PhyModel; 327 ULONG PhyRevision; 328 ULONG PhyOui; 329 ULONG PowerStatePending; 330 331 ULONG VlanControl; 332 ULONG PauseFlags; 333 ULONG LinkSpeed; 334 BOOLEAN Connected; 335 BOOLEAN FullDuplex; 336 337 ULONG OriginalMacAddress[2]; 338 UCHAR PermanentMacAddress[ETH_LENGTH_OF_ADDRESS]; 339 UCHAR CurrentMacAddress[ETH_LENGTH_OF_ADDRESS]; 340 341 _Field_range_(0, NVNET_MULTICAST_LIST_SIZE) 342 ULONG MulticastListSize; 343 struct 344 { 345 UCHAR MacAddress[ETH_LENGTH_OF_ADDRESS]; 346 } MulticastList[NVNET_MULTICAST_LIST_SIZE]; 347 348 ULONG WakeFrameBitmap; 349 PNVNET_WAKE_FRAME WakeFrames[NV_WAKEUPPATTERNS_V2]; 350 351 NDIS_HANDLE WrapperConfigurationHandle; 352 353 NDIS_WORK_ITEM PowerWorkItem; 354 NDIS_WORK_ITEM ResetWorkItem; 355 356 _Interlocked_ 357 volatile LONG ResetLock; 358 359 NDIS_PHYSICAL_ADDRESS IoAddress; 360 ULONG IoLength; 361 362 NVNET_FLOW_CONTROL_MODE FlowControlMode; 363 NDIS_MINIPORT_TIMER MediaDetectionTimer; 364 365 USHORT DeviceId; 366 UCHAR RevisionId; 367 368 BOOLEAN InterruptShared; 369 NDIS_MINIPORT_INTERRUPT Interrupt; 370 ULONG InterruptVector; 371 ULONG InterruptLevel; 372 ULONG InterruptFlags; 373 374 NDIS_PHYSICAL_ADDRESS TbdPhys; 375 NDIS_PHYSICAL_ADDRESS RbdPhys; 376 NDIS_PHYSICAL_ADDRESS ReceiveBufferPhys; 377 378 PVOID SendBuffer; 379 PVOID TbdOriginal; 380 PVOID RbdOriginal; 381 PVOID AdapterOriginal; 382 NDIS_PHYSICAL_ADDRESS TbdPhysOriginal; 383 NDIS_PHYSICAL_ADDRESS RbdPhysOriginal; 384 NVNET_TX_BUFFER_DATA SendBufferAllocationData[NVNET_TRANSMIT_BUFFERS]; 385 } NVNET_ADAPTER, *PNVNET_ADAPTER; 386 387 #define NvNetLogError(Adapter, ErrorCode) \ 388 NdisWriteErrorLogEntry((Adapter)->AdapterHandle, ErrorCode, 1, __LINE__) 389 390 NVNET_TRANSMIT_PACKET NvNetTransmitPacket32; 391 NVNET_TRANSMIT_PACKET NvNetTransmitPacket64; 392 NVNET_PROCESS_TRANSMIT ProcessTransmitDescriptorsLegacy; 393 NVNET_PROCESS_TRANSMIT ProcessTransmitDescriptors32; 394 NVNET_PROCESS_TRANSMIT ProcessTransmitDescriptors64; 395 396 CODE_SEG("PAGE") 397 NDIS_STATUS 398 NTAPI 399 MiniportInitialize( 400 _Out_ PNDIS_STATUS OpenErrorStatus, 401 _Out_ PUINT SelectedMediumIndex, 402 _In_ PNDIS_MEDIUM MediumArray, 403 _In_ UINT MediumArraySize, 404 _In_ NDIS_HANDLE MiniportAdapterHandle, 405 _In_ NDIS_HANDLE WrapperConfigurationContext); 406 407 CODE_SEG("PAGE") 408 VOID 409 NvNetFreeAdapter( 410 _In_ PNVNET_ADAPTER Adapter); 411 412 CODE_SEG("PAGE") 413 NDIS_STATUS 414 NvNetRecognizeHardware( 415 _Inout_ PNVNET_ADAPTER Adapter); 416 417 CODE_SEG("PAGE") 418 NDIS_STATUS 419 NvNetGetPermanentMacAddress( 420 _Inout_ PNVNET_ADAPTER Adapter, 421 _Out_writes_bytes_all_(ETH_LENGTH_OF_ADDRESS) PUCHAR MacAddress); 422 423 CODE_SEG("PAGE") 424 VOID 425 NvNetSetupMacAddress( 426 _In_ PNVNET_ADAPTER Adapter, 427 _In_reads_bytes_(ETH_LENGTH_OF_ADDRESS) PUCHAR MacAddress); 428 429 CODE_SEG("PAGE") 430 NDIS_STATUS 431 NvNetInitNIC( 432 _In_ PNVNET_ADAPTER Adapter, 433 _In_ BOOLEAN InitPhy); 434 435 CODE_SEG("PAGE") 436 NDIS_STATUS 437 NvNetFindPhyDevice( 438 _In_ PNVNET_ADAPTER Adapter); 439 440 CODE_SEG("PAGE") 441 NDIS_STATUS 442 NvNetPhyInit( 443 _In_ PNVNET_ADAPTER Adapter); 444 445 VOID 446 SidebandUnitReleaseSemaphore( 447 _In_ PNVNET_ADAPTER Adapter); 448 449 CODE_SEG("PAGE") 450 VOID 451 NvNetStartAdapter( 452 _In_ PNVNET_ADAPTER Adapter); 453 454 DECLSPEC_NOINLINE 455 VOID 456 NvNetPauseProcessing( 457 _In_ PNVNET_ADAPTER Adapter); 458 459 CODE_SEG("PAGE") 460 VOID 461 NvNetStopAdapter( 462 _In_ PNVNET_ADAPTER Adapter); 463 464 CODE_SEG("PAGE") 465 VOID 466 NvNetFlushTransmitQueue( 467 _In_ PNVNET_ADAPTER Adapter, 468 _In_ NDIS_STATUS CompleteStatus); 469 470 KSYNCHRONIZE_ROUTINE NvNetInitPhaseSynchronized; 471 NDIS_TIMER_FUNCTION NvNetMediaDetectionDpc; 472 473 BOOLEAN 474 MiiWrite( 475 _In_ PNVNET_ADAPTER Adapter, 476 _In_ ULONG PhyAddress, 477 _In_ ULONG RegAddress, 478 _In_ ULONG Data); 479 480 BOOLEAN 481 MiiRead( 482 _In_ PNVNET_ADAPTER Adapter, 483 _In_ ULONG PhyAddress, 484 _In_ ULONG RegAddress, 485 _Out_ PULONG Data); 486 487 BOOLEAN 488 NvNetUpdateLinkSpeed( 489 _In_ PNVNET_ADAPTER Adapter); 490 491 VOID 492 NvNetResetReceiverAndTransmitter( 493 _In_ PNVNET_ADAPTER Adapter); 494 495 VOID 496 NvNetStartReceiver( 497 _In_ PNVNET_ADAPTER Adapter); 498 499 VOID 500 NvNetStartTransmitter( 501 _In_ PNVNET_ADAPTER Adapter); 502 503 VOID 504 NvNetStopReceiver( 505 _In_ PNVNET_ADAPTER Adapter); 506 507 VOID 508 NvNetStopTransmitter( 509 _In_ PNVNET_ADAPTER Adapter); 510 511 CODE_SEG("PAGE") 512 VOID 513 NvNetIdleTransmitter( 514 _In_ PNVNET_ADAPTER Adapter, 515 _In_ BOOLEAN ClearPhyControl); 516 517 VOID 518 NvNetUpdatePauseFrame( 519 _Inout_ PNVNET_ADAPTER Adapter, 520 _In_ ULONG PauseFlags); 521 522 VOID 523 NvNetToggleClockPowerGating( 524 _In_ PNVNET_ADAPTER Adapter, 525 _In_ BOOLEAN Gate); 526 527 VOID 528 NvNetSetPowerState( 529 _In_ PNVNET_ADAPTER Adapter, 530 _In_ NDIS_DEVICE_POWER_STATE NewPowerState, 531 _In_ ULONG WakeFlags); 532 533 CODE_SEG("PAGE") 534 VOID 535 NvNetBackoffSetSlotTime( 536 _In_ PNVNET_ADAPTER Adapter); 537 538 VOID 539 NvNetBackoffReseed( 540 _In_ PNVNET_ADAPTER Adapter); 541 542 VOID 543 NvNetBackoffReseedEx( 544 _In_ PNVNET_ADAPTER Adapter); 545 546 NDIS_STATUS 547 NTAPI 548 MiniportSend( 549 _In_ NDIS_HANDLE MiniportAdapterContext, 550 _In_ PNDIS_PACKET Packet, 551 _In_ UINT Flags); 552 553 VOID 554 NTAPI 555 MiniportISR( 556 _Out_ PBOOLEAN InterruptRecognized, 557 _Out_ PBOOLEAN QueueMiniportHandleInterrupt, 558 _In_ NDIS_HANDLE MiniportAdapterContext); 559 560 VOID 561 NTAPI 562 MiniportHandleInterrupt( 563 _In_ NDIS_HANDLE MiniportAdapterContext); 564 565 NDIS_STATUS 566 NTAPI 567 MiniportQueryInformation( 568 _In_ NDIS_HANDLE MiniportAdapterContext, 569 _In_ NDIS_OID Oid, 570 _In_ PVOID InformationBuffer, 571 _In_ ULONG InformationBufferLength, 572 _Out_ PULONG BytesWritten, 573 _Out_ PULONG BytesNeeded); 574 575 NDIS_STATUS 576 NTAPI 577 MiniportSetInformation( 578 _In_ NDIS_HANDLE MiniportAdapterContext, 579 _In_ NDIS_OID Oid, 580 _In_ PVOID InformationBuffer, 581 _In_ ULONG InformationBufferLength, 582 _Out_ PULONG BytesRead, 583 _Out_ PULONG BytesNeeded); 584 585 #define NV_IMPLICIT_ENTRIES(Length) \ 586 (((Length - (NV_MAXIMUM_SG_SIZE + 1)) >> NV_TX2_TSO_MAX_SHIFT) + 1) 587 588 FORCEINLINE 589 VOID 590 NV_RELEASE_TCB( 591 _In_ PNVNET_ADAPTER Adapter, 592 _In_ PNVNET_TCB Tcb) 593 { 594 if (Tcb->Flags & NV_TCB_COALESCE) 595 { 596 PushEntryList(&Adapter->Send.BufferList, &Tcb->Buffer->Link); 597 } 598 599 Tcb->Packet = NULL; 600 601 ++Adapter->Send.TcbSlots; 602 603 Adapter->Send.TbdSlots += Tcb->Slots; 604 605 Adapter->Send.StuckCount = 0; 606 } 607 608 FORCEINLINE 609 PNVNET_TCB 610 NV_NEXT_TCB( 611 _In_ PNVNET_ADAPTER Adapter, 612 _In_ PNVNET_TCB Tcb) 613 { 614 if (Tcb++ == Adapter->Send.TailTcb) 615 return Adapter->Send.HeadTcb; 616 else 617 return Tcb; 618 } 619 620 FORCEINLINE 621 NVNET_TBD 622 NV_NEXT_TBD_32( 623 _In_ PNVNET_ADAPTER Adapter, 624 _In_ NVNET_TBD Tbd) 625 { 626 if (Tbd.x32++ == Adapter->Send.TailTbd.x32) 627 return Adapter->Send.HeadTbd; 628 else 629 return Tbd; 630 } 631 632 FORCEINLINE 633 NVNET_TBD 634 NV_NEXT_TBD_64( 635 _In_ PNVNET_ADAPTER Adapter, 636 _In_ NVNET_TBD Tbd) 637 { 638 if (Tbd.x64++ == Adapter->Send.TailTbd.x64) 639 return Adapter->Send.HeadTbd; 640 else 641 return Tbd; 642 } 643 644 FORCEINLINE 645 VOID 646 NV_WRITE( 647 _In_ PNVNET_ADAPTER Adapter, 648 _In_ NVNET_REGISTER Register, 649 _In_ ULONG Value) 650 { 651 NdisWriteRegisterUlong((PULONG)(Adapter->IoBase + Register), Value); 652 } 653 654 FORCEINLINE 655 ULONG 656 NV_READ( 657 _In_ PNVNET_ADAPTER Adapter, 658 _In_ NVNET_REGISTER Register) 659 { 660 ULONG Value; 661 662 NdisReadRegisterUlong((PULONG)(Adapter->IoBase + Register), &Value); 663 return Value; 664 } 665 666 #define NvNetDisableInterrupts(Adapter) \ 667 NV_WRITE(Adapter, NvRegIrqMask, 0); 668 669 #define NvNetApplyInterruptMask(Adapter) \ 670 NV_WRITE(Adapter, NvRegIrqMask, (Adapter)->InterruptMask); 671 672 #endif /* _NVNET_PCH_ */ 673