1 /* 2 * PROJECT: ReactOS HAL 3 * LICENSE: GPL-2.0-or-later (https://spdx.org/licenses/GPL-2.0-or-later) 4 * FILE: hal/halx86/apic/apicsmp.c 5 * PURPOSE: SMP specific APIC code 6 * PROGRAMMERS: Copyright 2021 Timo Kreuzer (timo.kreuzer@reactos.org) 7 */ 8 9 /* INCLUDES *******************************************************************/ 10 11 #include <hal.h> 12 #include "apicp.h" 13 #define NDEBUG 14 #include <debug.h> 15 16 /* INTERNAL FUNCTIONS *********************************************************/ 17 18 /*! 19 \param Vector - Specifies the interrupt vector to be delivered. 20 21 \param MessageType - Specifies the message type sent to the CPU core 22 interrupt handler. This can be one of the following values: 23 APIC_MT_Fixed - Delivers an interrupt to the target local APIC 24 specified in Destination field. 25 APIC_MT_LowestPriority - Delivers an interrupt to the local APIC 26 executing at the lowest priority of all local APICs. 27 APIC_MT_SMI - Delivers an SMI interrupt to target local APIC(s). 28 APIC_MT_RemoteRead - Delivers a read request to read an APIC register 29 in the target local APIC specified in Destination field. 30 APIC_MT_NMI - Delivers a non-maskable interrupt to the target local 31 APIC specified in the Destination field. Vector is ignored. 32 APIC_MT_INIT - Delivers an INIT request to the target local APIC(s) 33 specified in the Destination field. TriggerMode must be 34 APIC_TGM_Edge, Vector must be 0. 35 APIC_MT_Startup - Delivers a start-up request (SIPI) to the target 36 local APIC(s) specified in Destination field. Vector specifies 37 the startup address. 38 APIC_MT_ExtInt - Delivers an external interrupt to the target local 39 APIC specified in Destination field. 40 41 \param TriggerMode - The trigger mode of the interrupt. Can be: 42 APIC_TGM_Edge - The interrupt is edge triggered. 43 APIC_TGM_Level - The interrupt is level triggered. 44 45 \param DestinationShortHand - Specifies where to send the interrupt. 46 APIC_DSH_Destination 47 APIC_DSH_Self 48 APIC_DSH_AllIncludingSelf 49 APIC_DSH_AllExclusingSelf 50 51 \see "AMD64 Architecture Programmer's Manual Volume 2 System Programming" 52 Chapter 16 "Advanced Programmable Interrupt Controller (APIC)" 53 16.5 "Interprocessor Interrupts (IPI)" 54 55 */ 56 FORCEINLINE 57 VOID 58 ApicRequestGlobalInterrupt( 59 _In_ UCHAR DestinationProcessor, 60 _In_ UCHAR Vector, 61 _In_ APIC_MT MessageType, 62 _In_ APIC_TGM TriggerMode, 63 _In_ APIC_DSH DestinationShortHand) 64 { 65 APIC_INTERRUPT_COMMAND_REGISTER Icr; 66 67 /* Setup the command register */ 68 Icr.LongLong = 0; 69 Icr.Vector = Vector; 70 Icr.MessageType = MessageType; 71 Icr.DestinationMode = APIC_DM_Physical; 72 Icr.DeliveryStatus = 0; 73 Icr.Level = 0; 74 Icr.TriggerMode = TriggerMode; 75 Icr.RemoteReadStatus = 0; 76 Icr.DestinationShortHand = DestinationShortHand; 77 Icr.Destination = DestinationProcessor; 78 79 /* Write the low dword last to send the interrupt */ 80 ApicWrite(APIC_ICR1, Icr.Long1); 81 ApicWrite(APIC_ICR0, Icr.Long0); 82 } 83 84 85 /* SMP SUPPORT FUNCTIONS ******************************************************/ 86 87 // Should be called by SMP version of HalRequestIpi 88 VOID 89 NTAPI 90 HalpRequestIpi(KAFFINITY TargetProcessors) 91 { 92 UNIMPLEMENTED; 93 __debugbreak(); 94 } 95 96 // APIC specific SMP code here 97