1c2c66affSColin Finck 2*0bae06faSAmine Khaldi #ifndef _TSC_H_ 3*0bae06faSAmine Khaldi #define _TSC_H_ 4c2c66affSColin Finck 5c2c66affSColin Finck #define NUM_SAMPLES 4 6c2c66affSColin Finck #define MSR_RDTSC 0x10 7c2c66affSColin Finck 8c2c66affSColin Finck #ifndef __ASM__ 9c2c66affSColin Finck 10c2c66affSColin Finck void __cdecl TscCalibrationISR(void); 11c2c66affSColin Finck extern LARGE_INTEGER HalpCpuClockFrequency; 12c2c66affSColin Finck VOID NTAPI HalpInitializeTsc(void); 13c2c66affSColin Finck 14c2c66affSColin Finck #ifdef _M_AMD64 15c2c66affSColin Finck #define KiGetIdtEntry(Pcr, Vector) &((Pcr)->IdtBase[Vector]) 16c2c66affSColin Finck #else 17c2c66affSColin Finck #define KiGetIdtEntry(Pcr, Vector) &((Pcr)->IDT[Vector]) 18c2c66affSColin Finck #endif 19c2c66affSColin Finck 20c2c66affSColin Finck #endif 21*0bae06faSAmine Khaldi 22*0bae06faSAmine Khaldi #endif /* !_TSC_H_ */ 23