1 /* 2 * 3 */ 4 5 #pragma once 6 7 #ifdef CONFIG_SMP 8 #define HAL_BUILD_TYPE (DBG ? PRCB_BUILD_DEBUG : 0) 9 #else 10 #define HAL_BUILD_TYPE ((DBG ? PRCB_BUILD_DEBUG : 0) | PRCB_BUILD_UNIPROCESSOR) 11 #endif 12 13 typedef struct _HAL_BIOS_FRAME 14 { 15 ULONG SegSs; 16 ULONG Esp; 17 ULONG EFlags; 18 ULONG SegCs; 19 ULONG Eip; 20 PKTRAP_FRAME TrapFrame; 21 ULONG CsLimit; 22 ULONG CsBase; 23 ULONG CsFlags; 24 ULONG SsLimit; 25 ULONG SsBase; 26 ULONG SsFlags; 27 ULONG Prefix; 28 } HAL_BIOS_FRAME, *PHAL_BIOS_FRAME; 29 30 typedef 31 VOID 32 (__cdecl *PHAL_SW_INTERRUPT_HANDLER)( 33 VOID 34 ); 35 36 typedef 37 VOID 38 (FASTCALL *PHAL_SW_INTERRUPT_HANDLER_2ND_ENTRY)( 39 IN PKTRAP_FRAME TrapFrame 40 ); 41 42 #define HAL_APC_REQUEST 0 43 #define HAL_DPC_REQUEST 1 44 45 /* HAL profiling offsets in KeGetPcr()->HalReserved[] */ 46 #define HAL_PROFILING_INTERVAL 0 47 #define HAL_PROFILING_MULTIPLIER 1 48 49 /* Usage flags */ 50 #define IDT_REGISTERED 0x01 51 #define IDT_LATCHED 0x02 52 #define IDT_READ_ONLY 0x04 53 #define IDT_INTERNAL 0x11 54 #define IDT_DEVICE 0x21 55 56 /* Conversion functions */ 57 #define BCD_INT(bcd) \ 58 (((bcd & 0xF0) >> 4) * 10 + (bcd & 0x0F)) 59 #define INT_BCD(int) \ 60 (UCHAR)(((int / 10) << 4) + (int % 10)) 61 62 typedef 63 BOOLEAN 64 (NTAPI *PHAL_DISMISS_INTERRUPT)( 65 IN KIRQL Irql, 66 IN ULONG Irq, 67 OUT PKIRQL OldIrql 68 ); 69 70 BOOLEAN 71 NTAPI 72 HalpDismissIrqGeneric( 73 IN KIRQL Irql, 74 IN ULONG Irq, 75 OUT PKIRQL OldIrql 76 ); 77 78 BOOLEAN 79 NTAPI 80 HalpDismissIrq15( 81 IN KIRQL Irql, 82 IN ULONG Irq, 83 OUT PKIRQL OldIrql 84 ); 85 86 BOOLEAN 87 NTAPI 88 HalpDismissIrq13( 89 IN KIRQL Irql, 90 IN ULONG Irq, 91 OUT PKIRQL OldIrql 92 ); 93 94 BOOLEAN 95 NTAPI 96 HalpDismissIrq07( 97 IN KIRQL Irql, 98 IN ULONG Irq, 99 OUT PKIRQL OldIrql 100 ); 101 102 BOOLEAN 103 NTAPI 104 HalpDismissIrqLevel( 105 IN KIRQL Irql, 106 IN ULONG Irq, 107 OUT PKIRQL OldIrql 108 ); 109 110 BOOLEAN 111 NTAPI 112 HalpDismissIrq15Level( 113 IN KIRQL Irql, 114 IN ULONG Irq, 115 OUT PKIRQL OldIrql 116 ); 117 118 BOOLEAN 119 NTAPI 120 HalpDismissIrq13Level( 121 IN KIRQL Irql, 122 IN ULONG Irq, 123 OUT PKIRQL OldIrql 124 ); 125 126 BOOLEAN 127 NTAPI 128 HalpDismissIrq07Level( 129 IN KIRQL Irql, 130 IN ULONG Irq, 131 OUT PKIRQL OldIrql 132 ); 133 134 VOID 135 __cdecl 136 HalpHardwareInterruptLevel( 137 VOID 138 ); 139 140 // 141 // Hack Flags 142 // 143 #define HALP_REVISION_FROM_HACK_FLAGS(x) ((x) >> 24) 144 #define HALP_REVISION_HACK_FLAGS(x) ((x) >> 12) 145 #define HALP_HACK_FLAGS(x) ((x) & 0xFFF) 146 147 // 148 // Feature flags 149 // 150 #define HALP_CARD_FEATURE_FULL_DECODE 0x0001 151 152 // 153 // Match Flags 154 // 155 #define HALP_CHECK_CARD_REVISION_ID 0x10000 156 #define HALP_CHECK_CARD_SUBVENDOR_ID 0x20000 157 #define HALP_CHECK_CARD_SUBSYSTEM_ID 0x40000 158 159 // 160 // Mm PTE/PDE to Hal PTE/PDE 161 // 162 #define HalAddressToPde(x) (PHARDWARE_PTE)MiAddressToPde(x) 163 #define HalAddressToPte(x) (PHARDWARE_PTE)MiAddressToPte(x) 164 165 typedef struct _IDTUsageFlags 166 { 167 UCHAR Flags; 168 } IDTUsageFlags; 169 170 typedef struct 171 { 172 KIRQL Irql; 173 UCHAR BusReleativeVector; 174 } IDTUsage; 175 176 typedef struct _HalAddressUsage 177 { 178 struct _HalAddressUsage *Next; 179 CM_RESOURCE_TYPE Type; 180 UCHAR Flags; 181 struct 182 { 183 ULONG Start; 184 ULONG Length; 185 } Element[]; 186 } ADDRESS_USAGE, *PADDRESS_USAGE; 187 188 /* adapter.c */ 189 PADAPTER_OBJECT NTAPI HalpAllocateAdapterEx(ULONG NumberOfMapRegisters,BOOLEAN IsMaster, BOOLEAN Dma32BitAddresses); 190 191 /* sysinfo.c */ 192 VOID 193 NTAPI 194 HalpRegisterVector(IN UCHAR Flags, 195 IN ULONG BusVector, 196 IN ULONG SystemVector, 197 IN KIRQL Irql); 198 199 VOID 200 NTAPI 201 HalpEnableInterruptHandler(IN UCHAR Flags, 202 IN ULONG BusVector, 203 IN ULONG SystemVector, 204 IN KIRQL Irql, 205 IN PVOID Handler, 206 IN KINTERRUPT_MODE Mode); 207 208 /* pic.c */ 209 VOID NTAPI HalpInitializePICs(IN BOOLEAN EnableInterrupts); 210 VOID __cdecl HalpApcInterrupt(VOID); 211 VOID __cdecl HalpDispatchInterrupt(VOID); 212 PHAL_SW_INTERRUPT_HANDLER __cdecl HalpDispatchInterrupt2(VOID); 213 DECLSPEC_NORETURN VOID FASTCALL HalpApcInterrupt2ndEntry(IN PKTRAP_FRAME TrapFrame); 214 DECLSPEC_NORETURN VOID FASTCALL HalpDispatchInterrupt2ndEntry(IN PKTRAP_FRAME TrapFrame); 215 216 /* profil.c */ 217 extern BOOLEAN HalpProfilingStopped; 218 219 /* timer.c */ 220 VOID NTAPI HalpInitializeClock(VOID); 221 VOID __cdecl HalpClockInterrupt(VOID); 222 VOID __cdecl HalpProfileInterrupt(VOID); 223 224 typedef struct _HALP_ROLLOVER 225 { 226 ULONG RollOver; 227 ULONG Increment; 228 } HALP_ROLLOVER, *PHALP_ROLLOVER; 229 230 VOID 231 NTAPI 232 HalpCalibrateStallExecution(VOID); 233 234 /* pci.c */ 235 VOID HalpInitPciBus (VOID); 236 237 /* dma.c */ 238 VOID HalpInitDma (VOID); 239 240 /* Non-generic initialization */ 241 VOID HalpInitPhase0 (PLOADER_PARAMETER_BLOCK LoaderBlock); 242 VOID HalpInitPhase1(VOID); 243 244 VOID 245 NTAPI 246 HalpFlushTLB(VOID); 247 248 // 249 // KD Support 250 // 251 VOID 252 NTAPI 253 HalpCheckPowerButton( 254 VOID 255 ); 256 257 VOID 258 NTAPI 259 HalpRegisterKdSupportFunctions( 260 VOID 261 ); 262 263 NTSTATUS 264 NTAPI 265 HalpSetupPciDeviceForDebugging( 266 IN PVOID LoaderBlock, 267 IN OUT PDEBUG_DEVICE_DESCRIPTOR PciDevice 268 ); 269 270 NTSTATUS 271 NTAPI 272 HalpReleasePciDeviceForDebugging( 273 IN OUT PDEBUG_DEVICE_DESCRIPTOR PciDevice 274 ); 275 276 // 277 // Memory routines 278 // 279 ULONG64 280 NTAPI 281 HalpAllocPhysicalMemory( 282 IN PLOADER_PARAMETER_BLOCK LoaderBlock, 283 IN ULONG64 MaxAddress, 284 IN PFN_NUMBER PageCount, 285 IN BOOLEAN Aligned 286 ); 287 288 PVOID 289 NTAPI 290 HalpMapPhysicalMemory64Vista( 291 IN PHYSICAL_ADDRESS PhysicalAddress, 292 IN PFN_COUNT PageCount, 293 IN BOOLEAN FlushCurrentTLB 294 ); 295 296 VOID 297 NTAPI 298 HalpUnmapVirtualAddressVista( 299 IN PVOID VirtualAddress, 300 IN PFN_COUNT NumberPages, 301 IN BOOLEAN FlushCurrentTLB 302 ); 303 304 PVOID 305 NTAPI 306 HalpMapPhysicalMemory64( 307 IN PHYSICAL_ADDRESS PhysicalAddress, 308 IN PFN_COUNT PageCount 309 ); 310 311 VOID 312 NTAPI 313 HalpUnmapVirtualAddress( 314 IN PVOID VirtualAddress, 315 IN PFN_COUNT NumberPages 316 ); 317 318 /* sysinfo.c */ 319 NTSTATUS 320 NTAPI 321 HaliHandlePCIConfigSpaceAccess( 322 _In_ BOOLEAN IsRead, 323 _In_ ULONG Port, 324 _In_ ULONG Length, 325 _Inout_ PULONG Buffer 326 ); 327 328 NTSTATUS 329 NTAPI 330 HaliQuerySystemInformation( 331 IN HAL_QUERY_INFORMATION_CLASS InformationClass, 332 IN ULONG BufferSize, 333 IN OUT PVOID Buffer, 334 OUT PULONG ReturnedLength 335 ); 336 337 NTSTATUS 338 NTAPI 339 HaliSetSystemInformation( 340 IN HAL_SET_INFORMATION_CLASS InformationClass, 341 IN ULONG BufferSize, 342 IN OUT PVOID Buffer 343 ); 344 345 // 346 // BIOS Routines 347 // 348 BOOLEAN 349 NTAPI 350 HalpBiosDisplayReset( 351 VOID 352 ); 353 354 VOID 355 FASTCALL 356 HalpExitToV86( 357 PKTRAP_FRAME TrapFrame 358 ); 359 360 VOID 361 __cdecl 362 HalpRealModeStart( 363 VOID 364 ); 365 366 // 367 // Processor Halt Routine 368 // 369 VOID 370 NTAPI 371 HaliHaltSystem( 372 VOID 373 ); 374 375 // 376 // CMOS Routines 377 // 378 VOID 379 NTAPI 380 HalpInitializeCmos( 381 VOID 382 ); 383 384 _Requires_lock_held_(HalpSystemHardwareLock) 385 UCHAR 386 NTAPI 387 HalpReadCmos( 388 IN UCHAR Reg 389 ); 390 391 _Requires_lock_held_(HalpSystemHardwareLock) 392 VOID 393 NTAPI 394 HalpWriteCmos( 395 IN UCHAR Reg, 396 IN UCHAR Value 397 ); 398 399 // 400 // Spinlock for protecting CMOS access 401 // 402 _Acquires_lock_(HalpSystemHardwareLock) 403 VOID 404 NTAPI 405 HalpAcquireCmosSpinLock( 406 VOID 407 ); 408 409 _Releases_lock_(HalpSystemHardwareLock) 410 VOID 411 NTAPI 412 HalpReleaseCmosSpinLock( 413 VOID 414 ); 415 416 VOID 417 NTAPI 418 HalpInitializeLegacyPICs( 419 VOID 420 ); 421 422 NTSTATUS 423 NTAPI 424 HalpOpenRegistryKey( 425 IN PHANDLE KeyHandle, 426 IN HANDLE RootKey, 427 IN PUNICODE_STRING KeyName, 428 IN ACCESS_MASK DesiredAccess, 429 IN BOOLEAN Create 430 ); 431 432 VOID 433 NTAPI 434 HalpGetNMICrashFlag( 435 VOID 436 ); 437 438 BOOLEAN 439 NTAPI 440 HalpGetDebugPortTable( 441 VOID 442 ); 443 444 VOID 445 NTAPI 446 HalpReportSerialNumber( 447 VOID 448 ); 449 450 NTSTATUS 451 NTAPI 452 HalpMarkAcpiHal( 453 VOID 454 ); 455 456 VOID 457 NTAPI 458 HalpBuildAddressMap( 459 VOID 460 ); 461 462 VOID 463 NTAPI 464 HalpReportResourceUsage( 465 IN PUNICODE_STRING HalName, 466 IN INTERFACE_TYPE InterfaceType 467 ); 468 469 ULONG 470 NTAPI 471 HalpIs16BitPortDecodeSupported( 472 VOID 473 ); 474 475 NTSTATUS 476 NTAPI 477 HalpQueryAcpiResourceRequirements( 478 OUT PIO_RESOURCE_REQUIREMENTS_LIST *Requirements 479 ); 480 481 VOID 482 FASTCALL 483 KeUpdateSystemTime( 484 IN PKTRAP_FRAME TrapFrame, 485 IN ULONG Increment, 486 IN KIRQL OldIrql 487 ); 488 489 VOID 490 NTAPI 491 HalpInitBusHandlers( 492 VOID 493 ); 494 495 NTSTATUS 496 NTAPI 497 HaliInitPnpDriver( 498 VOID 499 ); 500 501 VOID 502 NTAPI 503 HalpDebugPciDumpBus( 504 IN ULONG i, 505 IN ULONG j, 506 IN ULONG k, 507 IN PPCI_COMMON_CONFIG PciData 508 ); 509 510 VOID 511 NTAPI 512 HalpInitProcessor( 513 IN ULONG ProcessorNumber, 514 IN PLOADER_PARAMETER_BLOCK LoaderBlock 515 ); 516 517 #if defined(SARCH_PC98) 518 BOOLEAN 519 NTAPI 520 HalpDismissIrq08( 521 _In_ KIRQL Irql, 522 _In_ ULONG Irq, 523 _Out_ PKIRQL OldIrql 524 ); 525 526 BOOLEAN 527 NTAPI 528 HalpDismissIrq08Level( 529 _In_ KIRQL Irql, 530 _In_ ULONG Irq, 531 _Out_ PKIRQL OldIrql 532 ); 533 534 VOID 535 NTAPI 536 HalpInitializeClockPc98(VOID); 537 538 extern ULONG PIT_FREQUENCY; 539 #endif /* SARCH_PC98 */ 540 541 #ifdef _M_AMD64 542 543 VOID 544 NTAPI 545 HalInitializeBios( 546 _In_ ULONG Phase, 547 _In_ PLOADER_PARAMETER_BLOCK LoaderBlock 548 ); 549 550 #define KfLowerIrql KeLowerIrql 551 #define KiEnterInterruptTrap(TrapFrame) /* We do all neccessary in asm code */ 552 #define KiEoiHelper(TrapFrame) return /* Just return to the caller */ 553 #define HalBeginSystemInterrupt(Irql, Vector, OldIrql) ((*(OldIrql) = PASSIVE_LEVEL), TRUE) 554 #ifndef CONFIG_SMP 555 /* On UP builds, spinlocks don't exist at IRQL >= DISPATCH */ 556 #define KiAcquireSpinLock(SpinLock) 557 #define KiReleaseSpinLock(SpinLock) 558 #define KfAcquireSpinLock(SpinLock) KfRaiseIrql(DISPATCH_LEVEL); 559 #define KfReleaseSpinLock(SpinLock, OldIrql) KeLowerIrql(OldIrql); 560 #endif // !CONFIG_SMP 561 #endif // _M_AMD64 562 563 extern BOOLEAN HalpNMIInProgress; 564 565 extern ADDRESS_USAGE HalpDefaultIoSpace; 566 567 extern KSPIN_LOCK HalpSystemHardwareLock; 568 569 extern PADDRESS_USAGE HalpAddressUsageList; 570 571 extern LARGE_INTEGER HalpPerfCounter; 572 573 extern KAFFINITY HalpActiveProcessors; 574 575 extern BOOLEAN HalDisableFirmwareMapper; 576 extern PWCHAR HalHardwareIdString; 577 extern PWCHAR HalName; 578 579 extern KAFFINITY HalpDefaultInterruptAffinity; 580 581 extern IDTUsageFlags HalpIDTUsageFlags[MAXIMUM_IDTVECTOR+1]; 582 583 extern const USHORT HalpBuildType; 584