1*516ccad3SJustin Miller/* 2*516ccad3SJustin Miller * PROJECT: ReactOS HAL 3*516ccad3SJustin Miller * LICENSE: GPL-2.0-or-later (https://spdx.org/licenses/GPL-2.0-or-later) 4*516ccad3SJustin Miller * PURPOSE: i386 Application Processor (AP) spinup setup 5*516ccad3SJustin Miller * COPYRIGHT: Copyright 2021 Victor Perevertkin <victor.perevertkin@reactos.org> 6*516ccad3SJustin Miller * Copyright 2021-2023 Justin Miller <justin.miller@reactos.org> 7*516ccad3SJustin Miller */ 8*516ccad3SJustin Miller 9*516ccad3SJustin Miller#include <asm.inc> 10*516ccad3SJustin Miller#include <ks386.inc> 11*516ccad3SJustin Miller 12*516ccad3SJustin Miller#define ZERO_OFFSET(f) (f - _HalpAPEntry16) 13*516ccad3SJustin Miller#define PS(f) (f - _HalpAPEntryData) 14*516ccad3SJustin Miller 15*516ccad3SJustin MillerPUBLIC _HalpAPEntry16 16*516ccad3SJustin MillerPUBLIC _HalpAPEntryData 17*516ccad3SJustin MillerPUBLIC _HalpAPEntry32 18*516ccad3SJustin MillerPUBLIC _HalpAPEntry16End 19*516ccad3SJustin Miller 20*516ccad3SJustin Miller.code16 21*516ccad3SJustin Miller_HalpAPEntry16: 22*516ccad3SJustin Miller cli 23*516ccad3SJustin Miller 24*516ccad3SJustin Miller /* Calculate the flat base address */ 25*516ccad3SJustin Miller mov ebp, cs 26*516ccad3SJustin Miller shl ebp, 4 27*516ccad3SJustin Miller 28*516ccad3SJustin Miller /* Use flat addressing */ 29*516ccad3SJustin Miller xor eax, eax 30*516ccad3SJustin Miller mov ds, eax 31*516ccad3SJustin Miller 32*516ccad3SJustin Miller#ifdef _USE_ML 33*516ccad3SJustin Miller data32 lgdt fword ptr cs:[ZERO_OFFSET(Gdtr)] 34*516ccad3SJustin Miller data32 lidt fword ptr cs:[ZERO_OFFSET(Idtr)] 35*516ccad3SJustin Miller#else 36*516ccad3SJustin Miller data32 lgdt cs:[ZERO_OFFSET(Gdtr)] 37*516ccad3SJustin Miller data32 lidt cs:[ZERO_OFFSET(Idtr)] 38*516ccad3SJustin Miller#endif 39*516ccad3SJustin Miller 40*516ccad3SJustin Miller /* Load temp page table */ 41*516ccad3SJustin Miller mov eax, cs:[ZERO_OFFSET(PageTableRoot)] 42*516ccad3SJustin Miller mov cr3, eax 43*516ccad3SJustin Miller 44*516ccad3SJustin Miller mov eax, cr0 45*516ccad3SJustin Miller or eax, HEX(80000001) /* CR0_PG | CR0_PE */ 46*516ccad3SJustin Miller mov cr0, eax 47*516ccad3SJustin Miller 48*516ccad3SJustin Miller.align 4 49*516ccad3SJustin Miller /* Long jump, 32bit address */ 50*516ccad3SJustin Miller .byte HEX(66) 51*516ccad3SJustin Miller .byte HEX(EA) 52*516ccad3SJustin Miller_HalpAPEntryData: 53*516ccad3SJustin Miller_APEntryJump32Offset: 54*516ccad3SJustin Miller .long 0 55*516ccad3SJustin Miller_APEntryJump32Segment: 56*516ccad3SJustin Miller .long 8 57*516ccad3SJustin MillerSelfPtr: 58*516ccad3SJustin Miller .long 0 59*516ccad3SJustin MillerPageTableRoot: 60*516ccad3SJustin Miller .long 0 61*516ccad3SJustin MillerProcessorState: 62*516ccad3SJustin Miller .long 0 63*516ccad3SJustin MillerGdtr_Pad: 64*516ccad3SJustin Miller .short 0 // Pad 65*516ccad3SJustin MillerGdtr: 66*516ccad3SJustin Miller .short 0 // Limit 67*516ccad3SJustin Miller .long 0 // Base 68*516ccad3SJustin MillerIdtr_Pad: 69*516ccad3SJustin Miller .short 0 // Pad 70*516ccad3SJustin MillerIdtr: 71*516ccad3SJustin Miller .short 0 // Limit 72*516ccad3SJustin Miller .long 0 // Base 73*516ccad3SJustin Miller_HalpAPEntry16End: 74*516ccad3SJustin Miller.endcode16 75*516ccad3SJustin Miller 76*516ccad3SJustin Miller.code32 77*516ccad3SJustin Miller_HalpAPEntry32: 78*516ccad3SJustin Miller /* Set the Ring 0 DS/ES/SS Segment */ 79*516ccad3SJustin Miller mov ax, HEX(10) 80*516ccad3SJustin Miller mov ds, ax 81*516ccad3SJustin Miller mov es, ax 82*516ccad3SJustin Miller mov ss, ax 83*516ccad3SJustin Miller mov gs, ax 84*516ccad3SJustin Miller 85*516ccad3SJustin Miller /* Load ProcessorState pointer */ 86*516ccad3SJustin Miller mov esi, [ebp + ZERO_OFFSET(ProcessorState)] 87*516ccad3SJustin Miller 88*516ccad3SJustin Miller mov eax, [esi + PsContextFrame + CsSegDs] 89*516ccad3SJustin Miller mov ds, eax 90*516ccad3SJustin Miller mov eax, [esi + PsContextFrame + CsSegEs] 91*516ccad3SJustin Miller mov es, eax 92*516ccad3SJustin Miller mov eax, [esi + PsContextFrame + CsSegSs] 93*516ccad3SJustin Miller mov ss, eax 94*516ccad3SJustin Miller mov eax, [esi + PsContextFrame + CsSegFs] 95*516ccad3SJustin Miller mov fs, eax 96*516ccad3SJustin Miller mov eax, [esi + PsContextFrame + CsSegGs] 97*516ccad3SJustin Miller mov gs, eax 98*516ccad3SJustin Miller 99*516ccad3SJustin Miller /* Write CR registers with ProcessorState values */ 100*516ccad3SJustin Miller mov eax, [esi + PsSpecialRegisters + SrCr3] 101*516ccad3SJustin Miller mov cr3, eax 102*516ccad3SJustin Miller mov eax, [esi + PsSpecialRegisters + SrCr4] 103*516ccad3SJustin Miller mov cr4, eax 104*516ccad3SJustin Miller 105*516ccad3SJustin Miller /* Load debug registers */ 106*516ccad3SJustin Miller mov eax, [esi + PsSpecialRegisters + SrKernelDr0] 107*516ccad3SJustin Miller mov dr0, eax 108*516ccad3SJustin Miller mov eax, [esi + PsSpecialRegisters + SrKernelDr1] 109*516ccad3SJustin Miller mov dr1, eax 110*516ccad3SJustin Miller mov eax, [esi + PsSpecialRegisters + SrKernelDr2] 111*516ccad3SJustin Miller mov dr2, eax 112*516ccad3SJustin Miller mov eax, [esi + PsSpecialRegisters + SrKernelDr3] 113*516ccad3SJustin Miller mov dr3, eax 114*516ccad3SJustin Miller mov eax, [esi + PsSpecialRegisters + SrKernelDr6] 115*516ccad3SJustin Miller mov dr6, eax 116*516ccad3SJustin Miller mov eax, [esi + PsSpecialRegisters + SrKernelDr7] 117*516ccad3SJustin Miller mov dr7, eax 118*516ccad3SJustin Miller 119*516ccad3SJustin Miller /* Load TSS */ 120*516ccad3SJustin Miller ltr word ptr [esi + PsSpecialRegisters + SrTr] 121*516ccad3SJustin Miller 122*516ccad3SJustin Miller /* Load AP Stack */ 123*516ccad3SJustin Miller mov esp, [esi + PsContextFrame + CsEsp] 124*516ccad3SJustin Miller 125*516ccad3SJustin Miller /* Load Eip and push it as a "return" address */ 126*516ccad3SJustin Miller mov eax, [esi + PsContextFrame + CsEip] 127*516ccad3SJustin Miller push eax 128*516ccad3SJustin Miller 129*516ccad3SJustin Miller /* Load flags */ 130*516ccad3SJustin Miller mov eax, [esi + PsContextFrame + CsEflags] 131*516ccad3SJustin Miller sahf 132*516ccad3SJustin Miller 133*516ccad3SJustin Miller /* Set up all GP registers */ 134*516ccad3SJustin Miller xor edi, edi 135*516ccad3SJustin Miller xor esi, esi 136*516ccad3SJustin Miller xor ebp, ebp 137*516ccad3SJustin Miller xor ebx, ebx 138*516ccad3SJustin Miller xor edx, edx 139*516ccad3SJustin Miller xor ecx, ecx 140*516ccad3SJustin Miller xor eax, eax 141*516ccad3SJustin Miller 142*516ccad3SJustin Miller /* Jump into the kernel */ 143*516ccad3SJustin Miller ret 144*516ccad3SJustin MillerEND 145