1 /* 2 * PROJECT: ReactOS Kernel 3 * LICENSE: GPL - See COPYING in the top level directory 4 * FILE: ntoskrnl/fstub/halstub.c 5 * PURPOSE: I/O Stub HAL Routines 6 * PROGRAMMERS: Alex Ionescu (alex.ionescu@reactos.org) 7 Pierre Schweitzer (pierre.schweitzer@reactos.org) 8 */ 9 10 /* INCLUDES ******************************************************************/ 11 12 #include <ntoskrnl.h> 13 #define NDEBUG 14 #include <debug.h> 15 16 /* GLOBALS *******************************************************************/ 17 18 HAL_DISPATCH HalDispatchTable = 19 { 20 HAL_DISPATCH_VERSION, 21 xHalQuerySystemInformation, 22 xHalSetSystemInformation, 23 xHalQueryBusSlots, 24 0, 25 xHalExamineMBR, 26 xHalIoAssignDriveLetters, 27 xHalIoReadPartitionTable, 28 xHalIoSetPartitionInformation, 29 xHalIoWritePartitionTable, 30 xHalHandlerForBus, 31 xHalReferenceHandler, 32 xHalReferenceHandler, 33 xHalInitPnpDriver, 34 xHalInitPowerManagement, 35 (pHalGetDmaAdapter) NULL, 36 xHalGetInterruptTranslator, 37 xHalStartMirroring, 38 xHalEndMirroring, 39 xHalMirrorPhysicalMemory, 40 xHalEndOfBoot, 41 xHalMirrorPhysicalMemory 42 }; 43 44 HAL_PRIVATE_DISPATCH HalPrivateDispatchTable = 45 { 46 HAL_PRIVATE_DISPATCH_VERSION, 47 xHalHandlerForBus, 48 (pHalHandlerForConfigSpace)xHalHandlerForBus, 49 xHalLocateHiberRanges, 50 xHalRegisterBusHandler, 51 xHalSetWakeEnable, 52 xHalSetWakeAlarm, 53 xHalTranslateBusAddress, 54 (pHalAssignSlotResources)xHalTranslateBusAddress, 55 xHalHaltSystem, 56 (pHalFindBusAddressTranslation)NULL, 57 (pHalResetDisplay)NULL, 58 xHalAllocateMapRegisters, 59 xKdSetupPciDeviceForDebugging, 60 xKdReleasePciDeviceForDebugging, 61 xKdGetAcpiTablePhase, 62 (pKdCheckPowerButton)xHalReferenceHandler, 63 xHalVectorToIDTEntry, 64 (pKdMapPhysicalMemory64)MatchAll, 65 (pKdUnmapVirtualAddress)xKdUnmapVirtualAddress 66 }; 67 68 /* FUNCTIONS *****************************************************************/ 69 70 UCHAR 71 NTAPI 72 xHalVectorToIDTEntry(IN ULONG Vector) 73 { 74 /* Return the vector */ 75 return (UCHAR)Vector; 76 } 77 78 VOID 79 NTAPI 80 xHalHaltSystem(VOID) 81 { 82 /* Halt execution */ 83 while (TRUE); 84 } 85 86 VOID 87 NTAPI 88 xHalEndOfBoot(VOID) 89 { 90 PAGED_CODE(); 91 92 /* Nothing */ 93 return; 94 } 95 96 VOID 97 NTAPI 98 xHalSetWakeEnable(IN BOOLEAN Enable) 99 { 100 /* Nothing */ 101 return; 102 } 103 104 PBUS_HANDLER 105 FASTCALL 106 xHalHandlerForBus(IN INTERFACE_TYPE InterfaceType, 107 IN ULONG BusNumber) 108 { 109 return NULL; 110 } 111 112 VOID 113 FASTCALL 114 xHalReferenceHandler(IN PBUS_HANDLER BusHandler) 115 { 116 /* Nothing */ 117 return; 118 } 119 120 NTSTATUS 121 NTAPI 122 xHalInitPnpDriver(VOID) 123 { 124 return STATUS_NOT_SUPPORTED; 125 } 126 127 NTSTATUS 128 NTAPI 129 xHalInitPowerManagement(IN PPM_DISPATCH_TABLE PmDriverDispatchTable, 130 OUT PPM_DISPATCH_TABLE *PmHalDispatchTable) 131 { 132 return STATUS_NOT_SUPPORTED; 133 } 134 135 NTSTATUS 136 NTAPI 137 xHalStartMirroring(VOID) 138 { 139 PAGED_CODE(); 140 141 return STATUS_NOT_SUPPORTED; 142 } 143 144 NTSTATUS 145 NTAPI 146 xHalEndMirroring(IN ULONG PassNumber) 147 { 148 return STATUS_NOT_SUPPORTED; 149 } 150 151 NTSTATUS 152 NTAPI 153 xHalMirrorPhysicalMemory(IN PHYSICAL_ADDRESS PhysicalAddress, 154 IN LARGE_INTEGER NumberOfBytes) 155 { 156 return STATUS_NOT_SUPPORTED; 157 } 158 159 NTSTATUS 160 NTAPI 161 xHalQueryBusSlots(IN PBUS_HANDLER BusHandler, 162 IN ULONG BufferSize, 163 OUT PULONG SlotNumbers, 164 OUT PULONG ReturnedLength) 165 { 166 PAGED_CODE(); 167 168 return STATUS_NOT_SUPPORTED; 169 } 170 171 NTSTATUS 172 NTAPI 173 xHalSetSystemInformation(IN HAL_SET_INFORMATION_CLASS InformationClass, 174 IN ULONG BufferSize, 175 IN PVOID Buffer) 176 { 177 PAGED_CODE(); 178 179 return STATUS_INVALID_LEVEL; 180 } 181 182 NTSTATUS 183 NTAPI 184 xHalQuerySystemInformation(IN HAL_QUERY_INFORMATION_CLASS InformationClass, 185 IN ULONG BufferSize, 186 IN OUT PVOID Buffer, 187 OUT PULONG ReturnedLength) 188 { 189 PAGED_CODE(); 190 191 return STATUS_INVALID_LEVEL; 192 } 193 194 VOID 195 NTAPI 196 xHalLocateHiberRanges(IN PVOID MemoryMap) 197 { 198 /* Nothing */ 199 return; 200 } 201 202 NTSTATUS 203 NTAPI 204 xHalRegisterBusHandler(IN INTERFACE_TYPE InterfaceType, 205 IN BUS_DATA_TYPE ConfigSpace, 206 IN ULONG BusNumber, 207 IN INTERFACE_TYPE ParentInterfaceType, 208 IN ULONG ParentBusNumber, 209 IN ULONG ContextSize, 210 IN PINSTALL_BUS_HANDLER InstallCallback, 211 OUT PBUS_HANDLER *BusHandler) 212 { 213 PAGED_CODE(); 214 215 return STATUS_NOT_SUPPORTED; 216 } 217 218 VOID 219 NTAPI 220 xHalSetWakeAlarm(IN ULONGLONG AlartTime, 221 IN PTIME_FIELDS TimeFields) 222 { 223 /* Nothing */ 224 return; 225 } 226 227 BOOLEAN 228 NTAPI 229 xHalTranslateBusAddress(IN INTERFACE_TYPE InterfaceType, 230 IN ULONG BusNumber, 231 IN PHYSICAL_ADDRESS BusAddress, 232 IN OUT PULONG AddressSpace, 233 OUT PPHYSICAL_ADDRESS TranslatedAddress) 234 { 235 KeBugCheckEx(HAL_INITIALIZATION_FAILED, 0, 0, 0, 0); 236 237 return FALSE; 238 } 239 240 NTSTATUS 241 NTAPI 242 xHalAllocateMapRegisters(IN PADAPTER_OBJECT AdapterObject, 243 IN ULONG Unknown, 244 IN ULONG Unknown2, 245 PMAP_REGISTER_ENTRY Registers) 246 { 247 PAGED_CODE(); 248 249 return STATUS_NOT_IMPLEMENTED; 250 } 251 252 NTSTATUS 253 NTAPI 254 xKdSetupPciDeviceForDebugging(IN PVOID LoaderBlock OPTIONAL, 255 IN OUT PDEBUG_DEVICE_DESCRIPTOR PciDevice) 256 { 257 return STATUS_NOT_IMPLEMENTED; 258 } 259 260 NTSTATUS 261 NTAPI 262 xKdReleasePciDeviceForDebugging(IN OUT PDEBUG_DEVICE_DESCRIPTOR PciDevice) 263 { 264 return STATUS_NOT_IMPLEMENTED; 265 } 266 267 PVOID 268 NTAPI 269 xKdGetAcpiTablePhase(IN struct _LOADER_PARAMETER_BLOCK *LoaderBlock, 270 IN ULONG Signature) 271 { 272 return NULL; 273 } 274 275 PVOID 276 NTAPI 277 MatchAll(IN PHYSICAL_ADDRESS PhysicalAddress, 278 IN ULONG NumberPages, 279 IN BOOLEAN FlushCurrentTLB) 280 { 281 return NULL; 282 } 283 284 VOID 285 NTAPI 286 xKdUnmapVirtualAddress(IN PVOID VirtualAddress, 287 IN ULONG NumberPages, 288 IN BOOLEAN FlushCurrentTLB) 289 { 290 /* Nothing */ 291 return; 292 } 293