1 /***********************************************************************************/ 2 /** MIT License **/ 3 /** ----------- **/ 4 /** **/ 5 /** Copyright (c) 2002-2019 Advanced Micro Devices, Inc. **/ 6 /** **/ 7 /** Permission is hereby granted, free of charge, to any person obtaining a copy **/ 8 /** of this Software and associated documentaon files (the "Software"), to deal **/ 9 /** in the Software without restriction, including without limitation the rights **/ 10 /** to use, copy, modify, merge, publish, distribute, sublicense, and/or sell **/ 11 /** copies of the Software, and to permit persons to whom the Software is **/ 12 /** furnished to do so, subject to the following conditions: **/ 13 /** **/ 14 /** The above copyright notice and this permission notice shall be included in **/ 15 /** all copies or substantial portions of the Software. **/ 16 /** **/ 17 /** THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR **/ 18 /** IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, **/ 19 /** FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE **/ 20 /** AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER **/ 21 /** LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, **/ 22 /** OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN **/ 23 /** THE SOFTWARE. **/ 24 /***********************************************************************************/ 25 26 #ifndef LIBM_UTIL_AMD_H_INCLUDED 27 #define LIBM_UTIL_AMD_H_INCLUDED 1 28 29 #define inline __inline 30 31 #include <emmintrin.h> 32 #include <float.h> 33 34 35 #define MULTIPLIER_SP 24 36 #define MULTIPLIER_DP 53 37 38 static const double VAL_2PMULTIPLIER_DP = 9007199254740992.0; 39 static const double VAL_2PMMULTIPLIER_DP = 1.1102230246251565404236316680908e-16; 40 static const float VAL_2PMULTIPLIER_SP = 16777216.0F; 41 static const float VAL_2PMMULTIPLIER_SP = 5.9604645e-8F; 42 43 /* Definitions for double functions on 64 bit machines */ 44 #define SIGNBIT_DP64 0x8000000000000000 45 #define EXPBITS_DP64 0x7ff0000000000000 46 #define MANTBITS_DP64 0x000fffffffffffff 47 #define ONEEXPBITS_DP64 0x3ff0000000000000 48 #define TWOEXPBITS_DP64 0x4000000000000000 49 #define HALFEXPBITS_DP64 0x3fe0000000000000 50 #define IMPBIT_DP64 0x0010000000000000 51 #define QNANBITPATT_DP64 0x7ff8000000000000 52 #define INDEFBITPATT_DP64 0xfff8000000000000 53 #define PINFBITPATT_DP64 0x7ff0000000000000 54 #define NINFBITPATT_DP64 0xfff0000000000000 55 #define EXPBIAS_DP64 1023 56 #define EXPSHIFTBITS_DP64 52 57 #define BIASEDEMIN_DP64 1 58 #define EMIN_DP64 -1022 59 #define BIASEDEMAX_DP64 2046 60 #define EMAX_DP64 1023 61 #define LAMBDA_DP64 1.0e300 62 #define MANTLENGTH_DP64 53 63 #define BASEDIGITS_DP64 15 64 65 66 /* These definitions, used by float functions, 67 are for both 32 and 64 bit machines */ 68 #define SIGNBIT_SP32 0x80000000 69 #define EXPBITS_SP32 0x7f800000 70 #define MANTBITS_SP32 0x007fffff 71 #define ONEEXPBITS_SP32 0x3f800000 72 #define TWOEXPBITS_SP32 0x40000000 73 #define HALFEXPBITS_SP32 0x3f000000 74 #define IMPBIT_SP32 0x00800000 75 #define QNANBITPATT_SP32 0x7fc00000 76 #define INDEFBITPATT_SP32 0xffc00000 77 #define PINFBITPATT_SP32 0x7f800000 78 #define NINFBITPATT_SP32 0xff800000 79 #define EXPBIAS_SP32 127 80 #define EXPSHIFTBITS_SP32 23 81 #define BIASEDEMIN_SP32 1 82 #define EMIN_SP32 -126 83 #define BIASEDEMAX_SP32 254 84 #define EMAX_SP32 127 85 #define LAMBDA_SP32 1.0e30 86 #define MANTLENGTH_SP32 24 87 #define BASEDIGITS_SP32 7 88 89 #define CLASS_SIGNALLING_NAN 1 90 #define CLASS_QUIET_NAN 2 91 #define CLASS_NEGATIVE_INFINITY 3 92 #define CLASS_NEGATIVE_NORMAL_NONZERO 4 93 #define CLASS_NEGATIVE_DENORMAL 5 94 #define CLASS_NEGATIVE_ZERO 6 95 #define CLASS_POSITIVE_ZERO 7 96 #define CLASS_POSITIVE_DENORMAL 8 97 #define CLASS_POSITIVE_NORMAL_NONZERO 9 98 #define CLASS_POSITIVE_INFINITY 10 99 100 #define OLD_BITS_SP32(x) (*((unsigned int *)&x)) 101 #define OLD_BITS_DP64(x) (*((unsigned long long *)&x)) 102 103 /* Alternatives to the above functions which don't have 104 problems when using high optimization levels on gcc */ 105 #define GET_BITS_SP32(x, ux) \ 106 { \ 107 volatile union {float f; unsigned int i;} _bitsy; \ 108 _bitsy.f = (x); \ 109 ux = _bitsy.i; \ 110 } 111 #define PUT_BITS_SP32(ux, x) \ 112 { \ 113 volatile union {float f; unsigned int i;} _bitsy; \ 114 _bitsy.i = (ux); \ 115 x = _bitsy.f; \ 116 } 117 118 #define GET_BITS_DP64(x, ux) \ 119 { \ 120 volatile union {double d; unsigned long long i;} _bitsy; \ 121 _bitsy.d = (x); \ 122 ux = _bitsy.i; \ 123 } 124 #define PUT_BITS_DP64(ux, x) \ 125 { \ 126 volatile union {double d; unsigned long long i;} _bitsy; \ 127 _bitsy.i = (ux); \ 128 x = _bitsy.d; \ 129 } 130 131 132 /* Processor-dependent floating-point status flags */ 133 #define AMD_F_OVERFLOW 0x00000001 134 #define AMD_F_UNDERFLOW 0x00000002 135 #define AMD_F_DIVBYZERO 0x00000004 136 #define AMD_F_INVALID 0x00000008 137 #define AMD_F_INEXACT 0x00000010 138 139 /* Processor-dependent floating-point precision-control flags */ 140 #define AMD_F_EXTENDED 0x00000300 141 #define AMD_F_DOUBLE 0x00000200 142 #define AMD_F_SINGLE 0x00000000 143 144 /* Processor-dependent floating-point rounding-control flags */ 145 #define AMD_F_RC_NEAREST 0x00000000 146 #define AMD_F_RC_DOWN 0x00002000 147 #define AMD_F_RC_UP 0x00004000 148 #define AMD_F_RC_ZERO 0x00006000 149 150 #endif /* LIBM_UTIL_AMD_H_INCLUDED */ 151