xref: /reactos/sdk/lib/crt/math/libm_sse2/pow_special.c (revision ccef43f3)
1 
2 /*******************************************************************************
3 MIT License
4 -----------
5 
6 Copyright (c) 2002-2019 Advanced Micro Devices, Inc.
7 
8 Permission is hereby granted, free of charge, to any person obtaining a copy
9 of this Software and associated documentaon files (the "Software"), to deal
10 in the Software without restriction, including without limitation the rights
11 to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 copies of the Software, and to permit persons to whom the Software is
13 furnished to do so, subject to the following conditions:
14 
15 The above copyright notice and this permission notice shall be included in
16 all copies or substantial portions of the Software.
17 
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
21 AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24 THE SOFTWARE.
25 *******************************************************************************/
26 
27 #include <fpieee.h>
28 #include <excpt.h>
29 #include <float.h>
30 #include <math.h>
31 #include <errno.h>
32 
33 #include "libm_new.h"
34 
35 // these codes and the ones in the related .asm files have to match
36 #define POW_X_ONE_Y_SNAN            1
37 #define POW_X_ZERO_Z_INF            2
38 #define POW_X_NAN                   3
39 #define POW_Y_NAN                   4
40 #define POW_X_NAN_Y_NAN             5
41 #define POW_X_NEG_Y_NOTINT          6
42 #define POW_Z_ZERO                  7
43 #define POW_Z_DENORMAL              8
44 #define POW_Z_INF                   9
45 
46 float _powf_special(float x, float y, float z, U32 code)
47 {
48     switch(code)
49     {
50     case POW_X_ONE_Y_SNAN:
51         {
52             UT64 zm; zm.u64 = 0; zm.f32[0] = z;
53             _handle_errorf("powf", _FpCodePow, zm.u64, 0, AMD_F_INVALID, 0, x, y, 2);
54         }
55         break;
56 
57     case POW_X_ZERO_Z_INF:
58         {
59             UT64 zm; zm.u64 = 0; zm.f32[0] = z;
60             _handle_errorf("powf", _FpCodePow, zm.u64, _SING, AMD_F_DIVBYZERO, ERANGE, x, y, 2);
61         }
62         break;
63 
64     case POW_X_NAN:
65     case POW_Y_NAN:
66     case POW_X_NAN_Y_NAN:
67     case POW_X_NEG_Y_NOTINT:
68         {
69             UT64 zm; zm.u64 = 0; zm.f32[0] = z;
70             _handle_errorf("powf", _FpCodePow, zm.u64, _DOMAIN, AMD_F_INVALID, EDOM, x, y, 2);
71         }
72         break;
73 
74     case POW_Z_ZERO:
75         {
76             UT64 zm; zm.u64 = 0; zm.f32[0] = z;
77             _handle_errorf("powf", _FpCodePow, zm.u64, _UNDERFLOW, AMD_F_INEXACT|AMD_F_UNDERFLOW, ERANGE, x, y, 2);
78         }
79         break;
80 
81     case POW_Z_INF:
82         {
83             UT64 zm; zm.u64 = 0; zm.f32[0] = z;
84             _handle_errorf("powf", _FpCodePow, zm.u64, _OVERFLOW, AMD_F_INEXACT|AMD_F_OVERFLOW, ERANGE, x, y, 2);
85         }
86         break;
87     }
88 
89     return z;
90 }
91 
92 double _pow_special(double x, double y, double z, U32 code)
93 {
94     switch(code)
95     {
96     case POW_X_ZERO_Z_INF:
97         {
98             UT64 zm; zm.f64 = z;
99             _handle_error("pow", _FpCodePow, zm.u64, _SING, AMD_F_DIVBYZERO, ERANGE, x, y, 2);
100         }
101         break;
102 
103     case POW_X_NAN:
104     case POW_Y_NAN:
105     case POW_X_NAN_Y_NAN:
106     case POW_X_NEG_Y_NOTINT:
107         {
108             UT64 zm; zm.f64 = z;
109             _handle_error("pow", _FpCodePow, zm.u64, _DOMAIN, AMD_F_INVALID, EDOM, x, y, 2);
110         }
111         break;
112 
113     case POW_Z_ZERO:
114     case POW_Z_DENORMAL:
115         {
116             UT64 zm; zm.f64 = z;
117             _handle_error("pow", _FpCodePow, zm.u64, _UNDERFLOW, AMD_F_INEXACT|AMD_F_UNDERFLOW, ERANGE, x, y, 2);
118         }
119         break;
120 
121     case POW_Z_INF:
122         {
123             UT64 zm; zm.f64 = z;
124             _handle_error("pow", _FpCodePow, zm.u64, _OVERFLOW, AMD_F_INEXACT|AMD_F_OVERFLOW, ERANGE, x, y, 2);
125         }
126         break;
127     }
128 
129     return z;
130 }
131