17baa34a4Skaashoek /* 27baa34a4Skaashoek * MultiProcessor Specification Version 1.[14]. 3*21a88fd4Skaashoek * 4*21a88fd4Skaashoek * Credit: Plan 9 sources 57baa34a4Skaashoek */ 6*21a88fd4Skaashoek 7*21a88fd4Skaashoek struct MP { /* floating pointer */ 87baa34a4Skaashoek uint8_t signature[4]; /* "_MP_" */ 97baa34a4Skaashoek physaddr_t physaddr; /* physical address of MP configuration table */ 107baa34a4Skaashoek uint8_t length; /* 1 */ 117baa34a4Skaashoek uint8_t specrev; /* [14] */ 127baa34a4Skaashoek uint8_t checksum; /* all bytes must add up to 0 */ 137baa34a4Skaashoek uint8_t type; /* MP system configuration type */ 147baa34a4Skaashoek uint8_t imcrp; 157baa34a4Skaashoek uint8_t reserved[3]; 167baa34a4Skaashoek }; 177baa34a4Skaashoek 18*21a88fd4Skaashoek struct MPCTB { /* configuration table header */ 197baa34a4Skaashoek uint8_t signature[4]; /* "PCMP" */ 207baa34a4Skaashoek uint16_t length; /* total table length */ 217baa34a4Skaashoek uint8_t version; /* [14] */ 227baa34a4Skaashoek uint8_t checksum; /* all bytes must add up to 0 */ 237baa34a4Skaashoek uint8_t product[20]; /* product id */ 247baa34a4Skaashoek uintptr_t oemtable; /* OEM table pointer */ 257baa34a4Skaashoek uint16_t oemlength; /* OEM table length */ 267baa34a4Skaashoek uint16_t entry; /* entry count */ 27*21a88fd4Skaashoek uintptr_t lapicaddr; /* address of local APIC */ 287baa34a4Skaashoek uint16_t xlength; /* extended table length */ 297baa34a4Skaashoek uint8_t xchecksum; /* extended table checksum */ 307baa34a4Skaashoek uint8_t reserved; 317baa34a4Skaashoek }; 327baa34a4Skaashoek 33*21a88fd4Skaashoek struct MPPE { /* processor table entry */ 347baa34a4Skaashoek uint8_t type; /* entry type (0) */ 35*21a88fd4Skaashoek uint8_t apicid; /* local APIC id */ 367baa34a4Skaashoek uint8_t version; /* local APIC verison */ 377baa34a4Skaashoek uint8_t flags; /* CPU flags */ 387baa34a4Skaashoek uint8_t signature[4]; /* CPU signature */ 397baa34a4Skaashoek uint32_t feature; /* feature flags from CPUID instruction */ 407baa34a4Skaashoek uint8_t reserved[8]; 417baa34a4Skaashoek }; 427baa34a4Skaashoek 43*21a88fd4Skaashoek struct MPBE { /* bus table entry */ 447baa34a4Skaashoek uint8_t type; /* entry type (1) */ 457baa34a4Skaashoek uint8_t busno; /* bus id */ 467baa34a4Skaashoek char string[6]; /* bus type string */ 477baa34a4Skaashoek }; 487baa34a4Skaashoek 49*21a88fd4Skaashoek struct MPIOAPIC { /* I/O APIC table entry */ 507baa34a4Skaashoek uint8_t type; /* entry type (2) */ 517baa34a4Skaashoek uint8_t apicno; /* I/O APIC id */ 527baa34a4Skaashoek uint8_t version; /* I/O APIC version */ 537baa34a4Skaashoek uint8_t flags; /* I/O APIC flags */ 547baa34a4Skaashoek uintptr_t addr; /* I/O APIC address */ 557baa34a4Skaashoek }; 567baa34a4Skaashoek 57*21a88fd4Skaashoek struct MPIE { /* interrupt table entry */ 587baa34a4Skaashoek uint8_t type; /* entry type ([34]) */ 597baa34a4Skaashoek uint8_t intr; /* interrupt type */ 607baa34a4Skaashoek uint16_t flags; /* interrupt flag */ 617baa34a4Skaashoek uint8_t busno; /* source bus id */ 627baa34a4Skaashoek uint8_t irq; /* source bus irq */ 637baa34a4Skaashoek uint8_t apicno; /* destination APIC id */ 647baa34a4Skaashoek uint8_t intin; /* destination APIC [L]INTIN# */ 657baa34a4Skaashoek }; 667baa34a4Skaashoek 677baa34a4Skaashoek enum { /* table entry types */ 68*21a88fd4Skaashoek MPPROCESSOR = 0x00, /* one entry per processor */ 69*21a88fd4Skaashoek MPBUS = 0x01, /* one entry per bus */ 70*21a88fd4Skaashoek MPIOAPIC = 0x02, /* one entry per I/O APIC */ 71*21a88fd4Skaashoek MPIOINTR = 0x03, /* one entry per bus interrupt source */ 72*21a88fd4Skaashoek MPLINTR = 0x04, /* one entry per system interrupt source */ 737baa34a4Skaashoek 74*21a88fd4Skaashoek MPSASM = 0x80, 75*21a88fd4Skaashoek MPHIERARCHY = 0x81, 76*21a88fd4Skaashoek MPCBASM = 0x82, 777baa34a4Skaashoek 787baa34a4Skaashoek /* PCMPprocessor and PCMPioapic flags */ 79*21a88fd4Skaashoek MPEN = 0x01, /* enabled */ 80*21a88fd4Skaashoek MPBP = 0x02, /* bootstrap processor */ 817baa34a4Skaashoek 827baa34a4Skaashoek /* PCMPiointr and PCMPlintr flags */ 83*21a88fd4Skaashoek MPPOMASK = 0x03, /* polarity conforms to specifications of bus */ 84*21a88fd4Skaashoek MPHIGH = 0x01, /* active high */ 85*21a88fd4Skaashoek MPLOW = 0x03, /* active low */ 86*21a88fd4Skaashoek MPELMASK = 0x0C, /* trigger mode of APIC input signals */ 87*21a88fd4Skaashoek MPEDGE = 0x04, /* edge-triggered */ 88*21a88fd4Skaashoek MPLEVEL = 0x0C, /* level-triggered */ 897baa34a4Skaashoek 907baa34a4Skaashoek /* PCMPiointr and PCMPlintr interrupt type */ 91*21a88fd4Skaashoek MPINT = 0x00, /* vectored interrupt from APIC Rdt */ 92*21a88fd4Skaashoek MPNMI = 0x01, /* non-maskable interrupt */ 93*21a88fd4Skaashoek MPSMI = 0x02, /* system management interrupt */ 94*21a88fd4Skaashoek MPExtINT = 0x03, /* vectored interrupt from external PIC */ 957baa34a4Skaashoek }; 967baa34a4Skaashoek 977baa34a4Skaashoek /* 987baa34a4Skaashoek * Common bits for 997baa34a4Skaashoek * I/O APIC Redirection Table Entry; 1007baa34a4Skaashoek * Local APIC Local Interrupt Vector Table; 1017baa34a4Skaashoek * Local APIC Inter-Processor Interrupt; 1027baa34a4Skaashoek * Local APIC Timer Vector Table. 1037baa34a4Skaashoek */ 1047baa34a4Skaashoek enum { 105*21a88fd4Skaashoek APIC_FIXED = 0x00000000, /* [10:8] Delivery Mode */ 106*21a88fd4Skaashoek APIC_LOWEST = 0x00000100, /* Lowest priority */ 107*21a88fd4Skaashoek APIC_SMI = 0x00000200, /* System Management Interrupt */ 108*21a88fd4Skaashoek APIC_RR = 0x00000300, /* Remote Read */ 109*21a88fd4Skaashoek APIC_NMI = 0x00000400, 110*21a88fd4Skaashoek APIC_INIT = 0x00000500, /* INIT/RESET */ 111*21a88fd4Skaashoek APIC_STARTUP = 0x00000600, /* Startup IPI */ 112*21a88fd4Skaashoek APIC_ExtINT = 0x00000700, 1137baa34a4Skaashoek 114*21a88fd4Skaashoek APIC_PHYSICAL = 0x00000000, /* [11] Destination Mode (RW) */ 115*21a88fd4Skaashoek APIC_LOGICAL = 0x00000800, 1167baa34a4Skaashoek 117*21a88fd4Skaashoek APIC_DELIVS = 0x00001000, /* [12] Delivery Status (RO) */ 118*21a88fd4Skaashoek APIC_HIGH = 0x00000000, /* [13] Interrupt Input Pin Polarity (RW) */ 119*21a88fd4Skaashoek APIC_LOW = 0x00002000, 120*21a88fd4Skaashoek APIC_RemoteIRR = 0x00004000, /* [14] Remote IRR (RO) */ 121*21a88fd4Skaashoek APIC_EDGE = 0x00000000, /* [15] Trigger Mode (RW) */ 122*21a88fd4Skaashoek APIC_LEVEL = 0x00008000, 123*21a88fd4Skaashoek APIC_IMASK = 0x00010000, /* [16] Interrupt Mask */ 1247baa34a4Skaashoek }; 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