17baa34a4Skaashoek /* 27baa34a4Skaashoek * MultiProcessor Specification Version 1.[14]. 321a88fd4Skaashoek * 421a88fd4Skaashoek * Credit: Plan 9 sources 57baa34a4Skaashoek */ 621a88fd4Skaashoek 7b5f17007Srsc struct mp { /* floating pointer */ 8*29270816Srtm uchar signature[4]; /* "_MP_" */ 9*29270816Srtm void* physaddr; /* physical address of MP configuration table */ 10*29270816Srtm uchar length; /* 1 */ 11*29270816Srtm uchar specrev; /* [14] */ 12*29270816Srtm uchar checksum; /* all bytes must add up to 0 */ 13*29270816Srtm uchar type; /* MP system configuration type */ 14*29270816Srtm uchar imcrp; 15*29270816Srtm uchar reserved[3]; 167baa34a4Skaashoek }; 177baa34a4Skaashoek 18b5f17007Srsc struct mpctb { /* configuration table header */ 19*29270816Srtm uchar signature[4]; /* "PCMP" */ 20*29270816Srtm ushort length; /* total table length */ 21*29270816Srtm uchar version; /* [14] */ 22*29270816Srtm uchar checksum; /* all bytes must add up to 0 */ 23*29270816Srtm uchar product[20]; /* product id */ 24*29270816Srtm uint * oemtable; /* OEM table pointer */ 25*29270816Srtm ushort oemlength; /* OEM table length */ 26*29270816Srtm ushort entry; /* entry count */ 27*29270816Srtm uint * lapicaddr; /* address of local APIC */ 28*29270816Srtm ushort xlength; /* extended table length */ 29*29270816Srtm uchar xchecksum; /* extended table checksum */ 30*29270816Srtm uchar reserved; 317baa34a4Skaashoek }; 327baa34a4Skaashoek 33b5f17007Srsc struct mppe { /* processor table entry */ 34*29270816Srtm uchar type; /* entry type (0) */ 35*29270816Srtm uchar apicid; /* local APIC id */ 36*29270816Srtm uchar version; /* local APIC verison */ 37*29270816Srtm uchar flags; /* CPU flags */ 38*29270816Srtm uchar signature[4]; /* CPU signature */ 39*29270816Srtm uint feature; /* feature flags from CPUID instruction */ 40*29270816Srtm uchar reserved[8]; 417baa34a4Skaashoek }; 427baa34a4Skaashoek 43b5f17007Srsc struct mpbe { /* bus table entry */ 44*29270816Srtm uchar type; /* entry type (1) */ 45*29270816Srtm uchar busno; /* bus id */ 467baa34a4Skaashoek char string[6]; /* bus type string */ 477baa34a4Skaashoek }; 487baa34a4Skaashoek 49b5f17007Srsc struct mpioapic { /* I/O APIC table entry */ 50*29270816Srtm uchar type; /* entry type (2) */ 51*29270816Srtm uchar apicno; /* I/O APIC id */ 52*29270816Srtm uchar version; /* I/O APIC version */ 53*29270816Srtm uchar flags; /* I/O APIC flags */ 54*29270816Srtm uint * addr; /* I/O APIC address */ 557baa34a4Skaashoek }; 567baa34a4Skaashoek 57b5f17007Srsc struct mpie { /* interrupt table entry */ 58*29270816Srtm uchar type; /* entry type ([34]) */ 59*29270816Srtm uchar intr; /* interrupt type */ 60*29270816Srtm ushort flags; /* interrupt flag */ 61*29270816Srtm uchar busno; /* source bus id */ 62*29270816Srtm uchar irq; /* source bus irq */ 63*29270816Srtm uchar apicno; /* destination APIC id */ 64*29270816Srtm uchar intin; /* destination APIC [L]INTIN# */ 657baa34a4Skaashoek }; 667baa34a4Skaashoek 677baa34a4Skaashoek enum { /* table entry types */ 6821a88fd4Skaashoek MPPROCESSOR = 0x00, /* one entry per processor */ 6921a88fd4Skaashoek MPBUS = 0x01, /* one entry per bus */ 7021a88fd4Skaashoek MPIOAPIC = 0x02, /* one entry per I/O APIC */ 7121a88fd4Skaashoek MPIOINTR = 0x03, /* one entry per bus interrupt source */ 7221a88fd4Skaashoek MPLINTR = 0x04, /* one entry per system interrupt source */ 737baa34a4Skaashoek 7421a88fd4Skaashoek MPSASM = 0x80, 7521a88fd4Skaashoek MPHIERARCHY = 0x81, 7621a88fd4Skaashoek MPCBASM = 0x82, 777baa34a4Skaashoek 787baa34a4Skaashoek /* PCMPprocessor and PCMPioapic flags */ 7921a88fd4Skaashoek MPEN = 0x01, /* enabled */ 8021a88fd4Skaashoek MPBP = 0x02, /* bootstrap processor */ 817baa34a4Skaashoek 827baa34a4Skaashoek /* PCMPiointr and PCMPlintr flags */ 8321a88fd4Skaashoek MPPOMASK = 0x03, /* polarity conforms to specifications of bus */ 8421a88fd4Skaashoek MPHIGH = 0x01, /* active high */ 8521a88fd4Skaashoek MPLOW = 0x03, /* active low */ 8621a88fd4Skaashoek MPELMASK = 0x0C, /* trigger mode of APIC input signals */ 8721a88fd4Skaashoek MPEDGE = 0x04, /* edge-triggered */ 8821a88fd4Skaashoek MPLEVEL = 0x0C, /* level-triggered */ 897baa34a4Skaashoek 907baa34a4Skaashoek /* PCMPiointr and PCMPlintr interrupt type */ 9121a88fd4Skaashoek MPINT = 0x00, /* vectored interrupt from APIC Rdt */ 9221a88fd4Skaashoek MPNMI = 0x01, /* non-maskable interrupt */ 9321a88fd4Skaashoek MPSMI = 0x02, /* system management interrupt */ 9421a88fd4Skaashoek MPExtINT = 0x03, /* vectored interrupt from external PIC */ 957baa34a4Skaashoek }; 967baa34a4Skaashoek 977baa34a4Skaashoek /* 987baa34a4Skaashoek * Common bits for 997baa34a4Skaashoek * I/O APIC Redirection Table Entry; 1007baa34a4Skaashoek * Local APIC Local Interrupt Vector Table; 1017baa34a4Skaashoek * Local APIC Inter-Processor Interrupt; 1027baa34a4Skaashoek * Local APIC Timer Vector Table. 1037baa34a4Skaashoek */ 1047baa34a4Skaashoek enum { 10521a88fd4Skaashoek APIC_FIXED = 0x00000000, /* [10:8] Delivery Mode */ 10621a88fd4Skaashoek APIC_LOWEST = 0x00000100, /* Lowest priority */ 10721a88fd4Skaashoek APIC_SMI = 0x00000200, /* System Management Interrupt */ 10821a88fd4Skaashoek APIC_RR = 0x00000300, /* Remote Read */ 10921a88fd4Skaashoek APIC_NMI = 0x00000400, 11021a88fd4Skaashoek APIC_INIT = 0x00000500, /* INIT/RESET */ 11121a88fd4Skaashoek APIC_STARTUP = 0x00000600, /* Startup IPI */ 112bd303ed0Skaashoek APIC_EXTINT = 0x00000700, 1137baa34a4Skaashoek 11421a88fd4Skaashoek APIC_PHYSICAL = 0x00000000, /* [11] Destination Mode (RW) */ 11521a88fd4Skaashoek APIC_LOGICAL = 0x00000800, 1167baa34a4Skaashoek 11721a88fd4Skaashoek APIC_DELIVS = 0x00001000, /* [12] Delivery Status (RO) */ 11821a88fd4Skaashoek APIC_HIGH = 0x00000000, /* [13] Interrupt Input Pin Polarity (RW) */ 11921a88fd4Skaashoek APIC_LOW = 0x00002000, 120bd303ed0Skaashoek APIC_REMOTEIRR = 0x00004000, /* [14] Remote IRR (RO) */ 12121a88fd4Skaashoek APIC_EDGE = 0x00000000, /* [15] Trigger Mode (RW) */ 12221a88fd4Skaashoek APIC_LEVEL = 0x00008000, 12321a88fd4Skaashoek APIC_IMASK = 0x00010000, /* [16] Interrupt Mask */ 1247baa34a4Skaashoek }; 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