131085bb4Srsc // Mutual exclusion spin locks. 231085bb4Srsc 321a88fd4Skaashoek #include "types.h" 421a88fd4Skaashoek #include "defs.h" 5558ab49fSrsc #include "param.h" 621a88fd4Skaashoek #include "x86.h" 7*9aa0337dSFrans Kaashoek #include "memlayout.h" 87837c71bSkaashoek #include "mmu.h" 94e8f237bSrtm #include "proc.h" 104e8f237bSrtm #include "spinlock.h" 1121a88fd4Skaashoek 120e84a0ecSrtm void 13b121486cSRuss Cox initlock(struct spinlock *lk, char *name) 145be0039cSrtm { 15b121486cSRuss Cox lk->name = name; 16b121486cSRuss Cox lk->locked = 0; 1748755214SRuss Cox lk->cpu = 0; 185be0039cSrtm } 195be0039cSrtm 2031085bb4Srsc // Acquire the lock. 2131085bb4Srsc // Loops (spins) until the lock is acquired. 22ab4cedb5Srtm // Holding a lock for a long time may cause 23ab4cedb5Srtm // other CPUs to waste time spinning to acquire it. 2421a88fd4Skaashoek void 25b121486cSRuss Cox acquire(struct spinlock *lk) 2621a88fd4Skaashoek { 27faad047aSRobert Morris pushcli(); // disable interrupts to avoid deadlock. 28b121486cSRuss Cox if(holding(lk)) 290dd42537Srsc panic("acquire"); 300dd42537Srsc 31943fd378Srsc // The xchg is atomic. 32943fd378Srsc // It also serializes, so that reads after acquire are not 33943fd378Srsc // reordered before it. 34b121486cSRuss Cox while(xchg(&lk->locked, 1) != 0) 3565bd8e13Srsc ; 36e7a5b3c5Srsc 3731085bb4Srsc // Record info about lock acquisition for debugging. 3848755214SRuss Cox lk->cpu = cpu; 39b121486cSRuss Cox getcallerpcs(&lk, lk->pcs); 4021a88fd4Skaashoek } 4121a88fd4Skaashoek 4231085bb4Srsc // Release the lock. 4321a88fd4Skaashoek void 44b121486cSRuss Cox release(struct spinlock *lk) 4521a88fd4Skaashoek { 46b121486cSRuss Cox if(!holding(lk)) 470dd42537Srsc panic("release"); 480dd42537Srsc 49b121486cSRuss Cox lk->pcs[0] = 0; 5048755214SRuss Cox lk->cpu = 0; 51e7a5b3c5Srsc 52943fd378Srsc // The xchg serializes, so that reads before release are 53be38c841Srtm // not reordered after it. The 1996 PentiumPro manual (Volume 3, 54be38c841Srtm // 7.2) says reads can be carried out speculatively and in 55be38c841Srtm // any order, which implies we need to serialize here. 56be38c841Srtm // But the 2007 Intel 64 Architecture Memory Ordering White 57be38c841Srtm // Paper says that Intel 64 and IA-32 will not move a load 58be38c841Srtm // after a store. So lock->locked = 0 would work here. 59be38c841Srtm // The xchg being asm volatile ensures gcc emits it after 60be38c841Srtm // the above assignments (and after the critical section). 61b121486cSRuss Cox xchg(&lk->locked, 0); 629fd9f804Srsc 633807c1f2Srsc popcli(); 6421a88fd4Skaashoek } 655af5f6aaSrsc 665af5f6aaSrsc // Record the current call stack in pcs[] by following the %ebp chain. 675af5f6aaSrsc void 685af5f6aaSrsc getcallerpcs(void *v, uint pcs[]) 695af5f6aaSrsc { 705af5f6aaSrsc uint *ebp; 715af5f6aaSrsc int i; 725af5f6aaSrsc 735af5f6aaSrsc ebp = (uint*)v - 2; 745af5f6aaSrsc for(i = 0; i < 10; i++){ 75*9aa0337dSFrans Kaashoek if(ebp == 0 || ebp < (uint*)KERNBASE || ebp == (uint*)0xffffffff) 765af5f6aaSrsc break; 775af5f6aaSrsc pcs[i] = ebp[1]; // saved %eip 785af5f6aaSrsc ebp = (uint*)ebp[0]; // saved %ebp 795af5f6aaSrsc } 805af5f6aaSrsc for(; i < 10; i++) 815af5f6aaSrsc pcs[i] = 0; 825af5f6aaSrsc } 835af5f6aaSrsc 845af5f6aaSrsc // Check whether this cpu is holding the lock. 855af5f6aaSrsc int 865af5f6aaSrsc holding(struct spinlock *lock) 875af5f6aaSrsc { 8848755214SRuss Cox return lock->locked && lock->cpu == cpu; 895af5f6aaSrsc } 905af5f6aaSrsc 91c8919e65Srsc 92ab08960fSrsc // Pushcli/popcli are like cli/sti except that they are matched: 93ab08960fSrsc // it takes two popcli to undo two pushcli. Also, if interrupts 94ab08960fSrsc // are off, then pushcli, popcli leaves them off. 95c8919e65Srsc 96c8919e65Srsc void 973807c1f2Srsc pushcli(void) 98c8919e65Srsc { 99ab08960fSrsc int eflags; 100ab08960fSrsc 10121575761Srsc eflags = readeflags(); 102c8919e65Srsc cli(); 10348755214SRuss Cox if(cpu->ncli++ == 0) 10448755214SRuss Cox cpu->intena = eflags & FL_IF; 105c8919e65Srsc } 106c8919e65Srsc 107c8919e65Srsc void 1083807c1f2Srsc popcli(void) 109c8919e65Srsc { 11021575761Srsc if(readeflags()&FL_IF) 1113807c1f2Srsc panic("popcli - interruptible"); 11248755214SRuss Cox if(--cpu->ncli < 0) 1133807c1f2Srsc panic("popcli"); 11448755214SRuss Cox if(cpu->ncli == 0 && cpu->intena) 115c8919e65Srsc sti(); 116c8919e65Srsc } 117c8919e65Srsc 118