131085bb4Srsc // x86 trap and interrupt constants. 231085bb4Srsc 331085bb4Srsc // Processor-defined: 4a4c03deaSrtm #define T_DIVIDE 0 // divide error 5a4c03deaSrtm #define T_DEBUG 1 // debug exception 6a4c03deaSrtm #define T_NMI 2 // non-maskable interrupt 7a4c03deaSrtm #define T_BRKPT 3 // breakpoint 8a4c03deaSrtm #define T_OFLOW 4 // overflow 9a4c03deaSrtm #define T_BOUND 5 // bounds check 10a4c03deaSrtm #define T_ILLOP 6 // illegal opcode 11a4c03deaSrtm #define T_DEVICE 7 // device not available 12a4c03deaSrtm #define T_DBLFLT 8 // double fault 130cfc7290Srsc // #define T_COPROC 9 // reserved (not used since 486) 14a4c03deaSrtm #define T_TSS 10 // invalid task switch segment 15a4c03deaSrtm #define T_SEGNP 11 // segment not present 16a4c03deaSrtm #define T_STACK 12 // stack exception 17cd08e6e0Srsc #define T_GPFLT 13 // general protection fault 18a4c03deaSrtm #define T_PGFLT 14 // page fault 19f5527388Srsc // #define T_RES 15 // reserved 20a4c03deaSrtm #define T_FPERR 16 // floating point error 21a4c03deaSrtm #define T_ALIGN 17 // aligment check 22a4c03deaSrtm #define T_MCHK 18 // machine check 23a4c03deaSrtm #define T_SIMDERR 19 // SIMD floating point error 24a4c03deaSrtm 25a4c03deaSrtm // These are arbitrarily chosen, but with care not to overlap 26a4c03deaSrtm // processor defined exceptions or interrupt vectors. 27*8b75366cSRuss Cox #define T_SYSCALL 64 // system call 28a4c03deaSrtm #define T_DEFAULT 500 // catchall 29bd303ed0Skaashoek 30*8b75366cSRuss Cox #define T_IRQ0 32 // IRQ 0 corresponds to int T_IRQ 31bd303ed0Skaashoek 32f7017212Skaashoek #define IRQ_TIMER 0 337abf49d2Skaashoek #define IRQ_KBD 1 3474afa70dSrsc #define IRQ_COM1 4 357abf49d2Skaashoek #define IRQ_IDE 14 36bd303ed0Skaashoek #define IRQ_ERROR 19 37bd303ed0Skaashoek #define IRQ_SPURIOUS 31 38*8b75366cSRuss Cox 39