Add some necessary #include's in signal related headers.

<machine/*.h>: Use our __aligned() macro in various cases.

No functional change.

#include <sys/cdefs.h> in a number of headers that use macros from it.

All these are public headers and check some kind of __*_VISIBLE macro
with #if but were not making sure that these macros are a

#include <sys/cdefs.h> in a number of headers that use macros from it.

All these are public headers and check some kind of __*_VISIBLE macro
with #if but were not making sure that these macros are available and
set correctly.

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kernel - Lower VM_MAX_USER_ADDRESS to finalize work-around for Ryzen bug

* Reduce VM_MAX_USER_ADDRESS by 2MB, effectively making the top 2MB of the
user address space unmappable. The user stack n

kernel - Lower VM_MAX_USER_ADDRESS to finalize work-around for Ryzen bug

* Reduce VM_MAX_USER_ADDRESS by 2MB, effectively making the top 2MB of the
user address space unmappable. The user stack now starts 2MB down from
where it did before. Theoretically we only need to reduce the top of
the user address space by 4KB, but doing it by 2MB may be more useful for
future page table optimizations.

* As per AMD, Ryzen has an issue when the instruction pre-fetcher crosses
from canonical to non-canonical address space. This can only occur at
the top of the user stack.

In DragonFlyBSD, the signal trampoline resides at the top of the user stack
and an IRETQ into it can cause a Ryzen box to lockup and destabilize due
to this action. The bug case was, basically two cpu threads on the same
core, one in a cpu-bound loop of some sort while the other takes a normal
UNIX signal (causing the IRETQ into the signal trampoline). The IRETQ
microcode freezes until the cpu-bound loop terminates, preventing the
cpu thread from being able to take any interrupt or IPI whatsoever for
the duration, and the cpu may destabilize afterwords as well.

* The pre-fetcher is somewhat heuristical, so just moving the trampoline
down is no guarantee if the top 4KB of the user stack is mapped or mappable.
It is better to make the boundary unmappable by userland.

* Bug first tracked down by myself in early 2017. AMD validated the bug
and determined that unmapping the boundary page completely solves the
issue.

* Also retain the code which places the signal trampoline in its own page
so we can maintain separate protection settings for the code, and make it
read-only (R+X).

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kernel - Move sigtramp even lower

* Attempt to work around a Ryzen cpu bug by moving sigtramp even lower than
we have already.

Remove advertising header from sys/

Correct BSD License clause numbering from 1-2-4 to 1-2-3.

Some less clear cases taken as it was done of FreeBSD.

<signal.h>: Sanitize the feature tests.

* Generally, in our headers, we don't check the (user-settable)
_POSIX_SOURCE and _ANSI_SOURCE, but instead __XSI_VISIBLE,
__POSIX_VISIBLE and __BSD_VISIB

<signal.h>: Sanitize the feature tests.

* Generally, in our headers, we don't check the (user-settable)
_POSIX_SOURCE and _ANSI_SOURCE, but instead __XSI_VISIBLE,
__POSIX_VISIBLE and __BSD_VISIBLE, which are set by <sys/cdefs.h>
based on what the user chose. Do the same in the CPU specific
signal headers.

* psignal() is now a standard function (per 200809).

* Add missing __restrict qualifiers.

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kernel - Fix signal FP save/restore issues when AVX is enabled

* The kernel was not saving/restoring the full FP context when entering into
or returning from a signal, leading to corrupt FP regist

kernel - Fix signal FP save/restore issues when AVX is enabled

* The kernel was not saving/restoring the full FP context when entering into
or returning from a signal, leading to corrupt FP registers even when
AVX is not used, when AVX is enabled in the kernel.

ANY SIGNAL COULD CORRUPT THE FP STATE.

* Fixed by adjusting the on-user-stack fpsave area sizes and operation.

* This unfortunately changes a number of user visible structures.
ucontext_t, mcontext_t, sigcontext, sigframe.

It is POSSIBLE that most userland use cases will be unaffected, but I'm
not holding my breath.

Major-Sleuthing-by: ftigeot
Testing-by: ftigeot, dillon

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Initial import of binutils 2.22 on the new vendor branch

Future versions of binutils will also reside on this branch rather
than continuing to create new binutils branches for each new version.

rename amd64 architecture to x86_64

The rest of the world seems to call amd64 x86_64. Bite the bullet and
rename all of the architecture files and references. This will
hopefully make pkgsrc build

rename amd64 architecture to x86_64

The rest of the world seems to call amd64 x86_64. Bite the bullet and
rename all of the architecture files and references. This will
hopefully make pkgsrc builds less painful.

Discussed-with: dillon@

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rename amd64 architecture to x86_64

The rest of the world seems to call amd64 x86_64. Bite the bullet and
rename all of the architecture files and references. This will
hopefully make pkgsrc build

rename amd64 architecture to x86_64

The rest of the world seems to call amd64 x86_64. Bite the bullet and
rename all of the architecture files and references. This will
hopefully make pkgsrc builds less painful.

Discussed-with: dillon@

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signal - Introduce si_code codes

* Introduce si_code codes #defines for signals.

* Assign proper si_code for most traps.

* Get rid of x86_64-only si_code code #defines.

* This also fixes build of

signal - Introduce si_code codes

* Introduce si_code codes #defines for signals.

* Assign proper si_code for most traps.

* Get rid of x86_64-only si_code code #defines.

* This also fixes build of pkgsrc devel/boost-libs

Dragonfly-bug: http://bugs.dragonflybsd.org/issue1313

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