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Revision tags: v6.2.1, v6.2.0, v6.3.0, v6.0.1, v6.0.0, v6.0.0rc1, v6.1.0, v5.8.3, v5.8.2, v5.8.1, v5.8.0, v5.9.0, v5.8.0rc1, v5.6.3, v5.6.2, v5.6.1, v5.6.0, v5.6.0rc1, v5.7.0, v5.4.3, v5.4.2, v5.4.1, v5.4.0, v5.5.0, v5.4.0rc1, v5.2.2, v5.2.1, v5.2.0, v5.3.0, v5.2.0rc, v5.0.2, v5.0.1, v5.0.0, v5.0.0rc2, v5.1.0, v5.0.0rc1, v4.8.1, v4.8.0, v4.6.2, v4.9.0, v4.8.0rc, v4.6.1, v4.6.0, v4.6.0rc2, v4.6.0rc, v4.7.0, v4.4.3, v4.4.2, v4.4.1, v4.4.0, v4.5.0, v4.4.0rc, v4.2.4, v4.3.1, v4.2.3, v4.2.1, v4.2.0, v4.0.6, v4.3.0, v4.2.0rc, v4.0.5, v4.0.4 |
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6682d8f0 |
| 16-Feb-2015 |
Sepherosa Ziehau <sephe@dragonflybsd.org> |
memtemp/e5: Don't attach if CLTT is not set by BIOS in chn_temp_cfg
Tested-by: mneumann@
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254817bd |
| 14-Feb-2015 |
Sepherosa Ziehau <sephe@dragonflybsd.org> |
memtemp/e5: Send devctl notify, if DIMM is too hot, and set sensor status
- There is no need to save DIMM external id in dimm softc; use a stack
variable instead.
- White space cleanup.
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94c6fede |
| 13-Feb-2015 |
Michael Neumann <mneumann@ntecs.de> |
ecc/memtemp/e5: Correct E5 v3 DID <-> SLOT
Revert the change in cb830af (revert PCI slot numbers) and instead
modify the PCI device ids. Channel 0/1 was swapped with channel 2/3.
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cb830afb |
| 11-Feb-2015 |
Michael Neumann <mneumann@ntecs.de> |
ecc/memtemp/e5 - Correct E5 v3 PCI slot numbers
The PCI slot numbers for E5 v3 IMC as introduced with commit 0c543cdd were
wrong, at least according to the hardware I am testing with (E5 1620).
Aft
ecc/memtemp/e5 - Correct E5 v3 PCI slot numbers
The PCI slot numbers for E5 v3 IMC as introduced with commit 0c543cdd were
wrong, at least according to the hardware I am testing with (E5 1620).
After this commit and this patch from sephe [1] I can get ecc(4) and
memtemp(4) working on the E5 1600 v3 series:
ecc0: <Intel E5 v3 ECC node0 channel0> [tentative] at device 21.2 on pci255
ecc0: DDR4 ecc0: native DDR
ecc0: DIMM0 8GB, 1x4, density 4GB
ecc0: DIMM0 rank0, corrected error threshold 32767
ecc0: <Intel E5 v3 ECC node0 channel0> [attached!] at device 21.2 on pci255
memtemp0: <Intel E5 v3 memory thermal sensor node0 channel0> [tentative]
at device 21.0 on pci255
memtemp0: <Intel E5 v3 memory thermal sensor node0 channel0> [attached!]
at device 21.0 on pci255
[1]: http://leaf.dragonflybsd.org/~sephe/e5_v3_memtemp_ecc.diff
show more ...
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0c543cdd |
| 08-Feb-2015 |
Sepherosa Ziehau <sephe@dragonflybsd.org> |
ecc/memtemp/e5: Prepare for E5 v3 support
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