re: Leverage Realtek driver's chip/PHY initialization/reset.

It is mainly used to solve all kinds of weirdness, e.g. hanging after
watchdog timeout, and PHY read failure, we have encountered so far

re: Leverage Realtek driver's chip/PHY initialization/reset.

It is mainly used to solve all kinds of weirdness, e.g. hanging after
watchdog timeout, and PHY read failure, we have encountered so far on
these chips.

The DEVMETHODs, ifnet setup, and data path are still ours. miibus(4)
is no longer used, ifmedia(4) is used directly.

NOTE: This change drops the 8139C+ and 8169 w/ external PHY support,
which are deemed to be too old.

Realtek's driver is taken from their website: version 1.92 (2016/10/25).

Tested-by: dillon, zrj

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re: Change CFG1 and CFG5 after flip EECMD

Obtained-from: FreeBSD

re: Update Realtek PHY power management related bits

Obtained-from: FreeBSD

kernel/if_re: Add support for the Realtek 8168H.

It is found in the Intel NUC5CPYH, for example.

Adapted from FreeBSD.

Reported-and-tested-by: Michael Iline <michael.iline@yahoo.com>

re: Add more hardware revision for 10/100 chips

re: Add more hardware revision for 8411 and newer 8168

re: Change the hardware revision mask

This keeps us align w/ Realtek's 8168/8101 Linux driver

re: RealTek8111F found in ASUS C60M1-I

DragonFly-issue: http://bugs.dragonflybsd.org/issue2479

re(4): Add support for the 8105E found in the Acer Aspire One D257.

Submitted-by: Francis Gudin <fgudin@nerim.net>

Initial import of binutils 2.22 on the new vendor branch

Future versions of binutils will also reside on this branch rather
than continuing to create new binutils branches for each new version.

re(4): Correct EEPROM location for certain versions of 8168F/8168E-VL

re(4): Preliminary 8168F support

re(4): Add 8168DP support

Filter out 8139 chips by PCI revid. It looks like certain 8139 does have
same hardware revision (in TXCFG) as 8139C+.

Reported-by: Antonio Huete Jimenez <ahuete.devel@gmail.com>
Obtained-from: Free

Filter out 8139 chips by PCI revid. It looks like certain 8139 does have
same hardware revision (in TXCFG) as 8139C+.

Reported-by: Antonio Huete Jimenez <ahuete.devel@gmail.com>
Obtained-from: FreeBSD

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- In re_stop(), call re_reset(), which is supposed to stop TX/RX engines.
- In re_reset(), don't touch 0x82 (a magic CSR), which seems to be 8110/8169
specific. Write 1 to it on attach path.
Acc

- In re_stop(), call re_reset(), which is supposed to stop TX/RX engines.
- In re_reset(), don't touch 0x82 (a magic CSR), which seems to be 8110/8169
specific. Write 1 to it on attach path.
According-to: RealTek r8169-6.007.00
- For certain chips (looks like all MAC2 chips), RE_CMD_RESET will not stop
TX/RX engines, a seperate command (RE_CMD_STOPREQ) must be issued before
RE_CMD_RESET.
According-to: RealTek r8168-8.008.00

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Add hardware csum offload support for MAC style 2 chips, which include
8102E, 8102EL, 8168C, 8168CP and 8168D.

Obtained-from: RealTek r8101-1.009.00 r8168-8.008.00


Add RE_C_AUTOPAD capability to i

Add hardware csum offload support for MAC style 2 chips, which include
8102E, 8102EL, 8168C, 8168CP and 8168D.

Obtained-from: RealTek r8101-1.009.00 r8168-8.008.00


Add RE_C_AUTOPAD capability to indicate hardware could correctly pad
short ether frames. Turn it on for newer version of 8168B (0x38000000
and 0xb8000000) and MAC style 2 chips; manually padding short UDP packets
for newer version 8168B will result in incorrect UDP csum, while manually
padding short ICMP packets for MAC style 2 chips will result in both
incorrect IP header csum and incorrect IP length (o_O)

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- Adjust PCI latency timer on all types of chips
- Adjust PCI cache line size for 8110/8169 chips
- For certain revision of 8101E, reading MAC address from IDRx may not
work; read from EEPROM inste

- Adjust PCI latency timer on all types of chips
- Adjust PCI cache line size for 8110/8169 chips
- For certain revision of 8101E, reading MAC address from IDRx may not
work; read from EEPROM instead
- Add comment that adjusting config1 and config5 may cause unrecoverible
disaster

Obtained-from: RealTek Linux drivers

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0x28000000 is 8168D according to Realtek r8168-8.008.00 driver

Bring in some PCI register settings from RealTek BSD driver v176. Disable
the PCI register configuration for "style 2 MAC", add comment about it.

- Nuke re_type, add RE_C_8139CP to indicate the chip is 8139C+
- Change hardware revision mask from 0x7cc00000 to 0xfc800000
Obtained-from: Realtek BSD driver v176
- Convert MAC mode to MAC version

- Nuke re_type, add RE_C_8139CP to indicate the chip is 8139C+
- Change hardware revision mask from 0x7cc00000 to 0xfc800000
Obtained-from: Realtek BSD driver v176
- Convert MAC mode to MAC version and save MAC version in softc
Obtained-from: Realtek BSD driver v176
- Add hardware revision 0x34800000(8102E) and 0x28000000(chip name is unknown)
Obtained-from: Realtek BSD driver v176

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Rename some HWREV

Use hardware timer to simulate interrupt moderation. Old devices will no
longer be livelocked when they are receiving on GigE line. Newer devices
also gain well controlled interrupt rate.

If hardw

Use hardware timer to simulate interrupt moderation. Old devices will no
longer be livelocked when they are receiving on GigE line. Newer devices
also gain well controlled interrupt rate.

If hardware supports interrupt moderation (e.g. 8168B, 8168C), you could
also use hardware based interrupt moderation, however, due to lack of
necessary information it does not work as reliably as simulated interrupt
moderation. It is _not_ recommended currently.

By default, PCI-E devices' simulated interrupt moderation timer is set to
75us, while PCI devices' is set to 125us.

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LINKCHG interrupt is still needed

- Nuke interrupt bits definition which don't apply to 8169
- Don't test TX desc unavailable bit in re_intr, since it is never enabled

Add RX interrupt moderation suport for PCI-E GigaE chips.

Interrupt moderation register position is obtained from Realtek's
BSD driver v176.
The meaning of the IM register bits is partially reverse

Add RX interrupt moderation suport for PCI-E GigaE chips.

Interrupt moderation register position is obtained from Realtek's
BSD driver v176.
The meaning of the IM register bits is partially reverse engineered:
RX timer position and unit.

This kind of interrupt moderation does not work on PCI GigaE chips.

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