sys: Remove $FreeBSD$: two-line .h pattern

Remove /^\s*\*\n \*\s+\$FreeBSD\$$\n/

spdx: The BSD-2-Clause-FreeBSD identifier is obsolete, drop -FreeBSD

The SPDX folks have obsoleted the BSD-2-Clause-FreeBSD identifier. Catch
up to that fact and revert to their recommended match of

spdx: The BSD-2-Clause-FreeBSD identifier is obsolete, drop -FreeBSD

The SPDX folks have obsoleted the BSD-2-Clause-FreeBSD identifier. Catch
up to that fact and revert to their recommended match of BSD-2-Clause.

Discussed with: pfg
MFC After: 3 days
Sponsored by: Netflix

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[arswitch] fix up issues on the AR8327.

This correctly dumps the ethernet bridge contents on an AR8327 switch.

Tested:

* AP135 - QCA9550 + AR8327 ethernet switch:

# etherswitchcfg atu dump
[0] c

[arswitch] fix up issues on the AR8327.

This correctly dumps the ethernet bridge contents on an AR8327 switch.

Tested:

* AP135 - QCA9550 + AR8327 ethernet switch:

# etherswitchcfg atu dump
[0] c0:3f:d5:7e:6f:45: portmask 0x00000004
[1] f6:b6:03:96:1e:ba: portmask 0x00000004
[2] 00:03:7f:11:38:4f: portmask 0x00000040
# arp -na
? (192.168.3.170) at 00:03:7f:11:38:4f on arge0 permanent [ethernet]
? (192.168.3.12) at c0:3f:d5:7e:6f:45 on arge0 expires in 1188 seconds [ethernet]
? (192.168.3.1) at f6:b6:03:96:1e:ba on arge0 expires in 1186 seconds [ethernet]

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[arswitch] add initial functionality for AR8327 ATU management.

* Add the bulk of the ATU table read function
* Correct how the ATU function and WAIT bits work

TODO:

* more testing, figure out how

[arswitch] add initial functionality for AR8327 ATU management.

* Add the bulk of the ATU table read function
* Correct how the ATU function and WAIT bits work

TODO:

* more testing, figure out how the multi-vlan table stuff works and push that
up to userspace

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[arswitch] begin tidying up the learning and ATU management, introduce ATU APIs.

* Refactor the initial learning configuration (port learning, address expiry,
handling address moving between ports

[arswitch] begin tidying up the learning and ATU management, introduce ATU APIs.

* Refactor the initial learning configuration (port learning, address expiry,
handling address moving between ports, etc, etc) into a separate HAL routine
* and ensure that it's consistent between switch chips - the AR8216,8316,724x,9331
SoCs all share the same switch code.
* .. the AR8327 needs doing - the defaults seem OK for now
* .. the AR9340 is different but it's also programmed now.

* Add support for flushing a single port worth of ATU entries
* Add support for fetching the ATU table from AR8216 and derived chips

Tested:

* AR9344, Carambola 2

TODO:

* Further testing on other chips
* Add AR9340 support
* Add AR8327 support

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[arswitch] Fix ATU programming on the AR8327 switch.

Doing a flush actually requires setting this bit.

sys/dev: further adoption of SPDX licensing ID tags.

Mainly focus on files that use BSD 2-Clause license, however the tool I
was using misidentified many licenses so this was mostly a manual - error

sys/dev: further adoption of SPDX licensing ID tags.

Mainly focus on files that use BSD 2-Clause license, however the tool I
was using misidentified many licenses so this was mostly a manual - error
prone - task.

The Software Package Data Exchange (SPDX) group provides a specification
to make it easier for automated tools to detect and summarize well known
opensource licenses. We are gradually adopting the specification, noting
that the tags are considered only advisory and do not, in any way,
superceed or replace the license texts.

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arswitch: Ensure the lock is always held when calling arswitch_modifyreg()

arswitch_setled() and a number of _global_setup functions did not acquire the
lock before calling arswitch_modifyreg(). Wit

arswitch: Ensure the lock is always held when calling arswitch_modifyreg()

arswitch_setled() and a number of _global_setup functions did not acquire the
lock before calling arswitch_modifyreg(). With WITNESS enabled this would
instantly panic.

Discovered on a TPLink-3600:
("panic: mutex arswitch not owned at sys/dev/etherswitch/arswitch/arswitch_reg.c:236")

Reviewed by: adrian, kan
Differential Revision: https://reviews.freebsd.org/D9187

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[arswitch] extend the debug support to be configurable at runtime.

* remove the DEBUG ifdef; defining it is too far reaching throughout
the whole system;
* add a bitmask in the softc for controlli

[arswitch] extend the debug support to be configurable at runtime.

* remove the DEBUG ifdef; defining it is too far reaching throughout
the whole system;
* add a bitmask in the softc for controlling debugging;
* .. enable said debugging as a sysctl;
* add bitmaps for register access, reset and vlans.

TODO:

* Now that the debug statements are configurable, we definitely could
do with more debugging
* Move the debugging into the top-level etherswitch driver and have
sub-drivers obey.

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[etherswitch] add in an initial API for controlling per-port LED behaviour.

This is just implemented for the AR8327 for now.

Submitted by: Dan Nelson <dnelson_1901@yahoo.com>

Cleanup unnecessary semicolons from the kernel.

Found with devel/coccinelle.

[mdio] migrate mdiobus out of etherswitch and into a top-level device of its own.

The mdio driver interface is generally useful for devices that require
MDIO without the full MII bus interface. This

[mdio] migrate mdiobus out of etherswitch and into a top-level device of its own.

The mdio driver interface is generally useful for devices that require
MDIO without the full MII bus interface. This lifts the driver/interface
out of etherswitch(4), and adds a mdio(4) man page.

Submitted by: Landon Fuller <landon@landonf.org>
Differential Revision: https://reviews.freebsd.org/D4606

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AR8327: Fix up the ability to configure the vlangroup configuration for the CPU port

I messed up when doing the reset_vlans method - setting vid[0] = 1 here
was making it 'hidden' from configuration

AR8327: Fix up the ability to configure the vlangroup configuration for the CPU port

I messed up when doing the reset_vlans method - setting vid[0] = 1 here
was making it 'hidden' from configuration (as it needed ETHERSWITCH_VID_VALID
as well) and so there was no way to configure vlangroup0.

In per-port VLAN mode, vlangroup0 is for the CPU port (port0).
Now, it normally wouldn't really matter - the CPU port thus sees
all other ports. However there are two CPU ports on the AR8327 and
so port0 (arge0) was seeing all traffic on port6 (arge1).
If you thus tried to use arge1/port6 for anything (eg a WAN port)
in a bridge group then things would very upset very quickly.

Whilst here, add a comment to remind myself that yes, it'd be nice
if we could specify a boot-time switch config.

Tested:

* AP135 reference platform w/ AR8327N switch

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Commit 802.1q configuration support for the AR8327.

This is slightly different to the other switches - the VLAN table
(VTU) programs in the vlan port mapping /and/ the port config
(tagged, untagged,

Commit 802.1q configuration support for the AR8327.

This is slightly different to the other switches - the VLAN table
(VTU) programs in the vlan port mapping /and/ the port config
(tagged, untagged, passthrough, any.)

So:

* Add VTU operations to program the VTU (vlan table)
* abstract out the mirror-disable function so it's .. well, a function.
* setup the port to have a dot1q configuration for dot1q - the
port security is VLAN (not per-port VLAN) and requires an entry
in the VLAN table;
* add set_dot1q / get_dot1q to program the VLAN table;
* since the tagged/untagged ports are now programmed into the VTU,
rather than global - plumb the ports /and/ untagged ports bitmaps
through the arswitch API.

Tested:

* AP135 - QCA9558 SoC + AR8327N switch

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Add per-port vlan support for the AR8327.

All the per-port support is really doing is applying a port visibility
mask to each of the switchports. Everything still look like a single
portgroup (vlan

Add per-port vlan support for the AR8327.

All the per-port support is really doing is applying a port visibility
mask to each of the switchports. Everything still look like a single
portgroup (vlan id 1), but the per-port visibility mask is modified.

Whilst I'm here, also add some initial dot1q support - the pvid stuff
is doing the right thing, but it's not useful without the rest of
the VLAN table programming.

It's enough for me to be able to use the LAN/WAN port distinction
on the AP135, where there isn't (for now!) a dedicated PHY for the
"WAN" port.

Tested:

* AP135, QCA9558 SoC + AR8327 switch

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Fix up support for the AR8327.

* Even though I got the registers around "right", it seems
I'm not tickling the MDIO access correctly for the internal PHY
bus. Some of the switches are fine poki

Fix up support for the AR8327.

* Even though I got the registers around "right", it seems
I'm not tickling the MDIO access correctly for the internal PHY
bus. Some of the switches are fine poking at the external PHY
registers; others aren't. So, enable direct PHY bus access
for the AR8327, and leave the existing code in place for the
others.

* Go and shuffle the register access around. Whilst here,
restore the 2ms delay if changing page.

* Comment out some of the stub printf()s; there's some upcoming
work to add port VLAN support.

Tested:

* AP135 development board
* Carambola2 - AR9331 SoC

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AR8327: Disable energy-efficient ethernet support in the PHYs.

I noticed that openwrt/linux does this, citing "instability", so
until they figure out why I'm going to disable it here as well.

Teste

AR8327: Disable energy-efficient ethernet support in the PHYs.

I noticed that openwrt/linux does this, citing "instability", so
until they figure out why I'm going to disable it here as well.

Tested:

* QCA AP135 - QCA955x SoC + AR8327 switch.

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Bump the port mask on the AR8327 ethernet switch from 0x3f to 0x7f.

So, it turns out that the AR8327 has 7 ports internally:

* GMAC0 / external (CPU) MAC0
* GMAC1 / port1 -> GMAC5 / port5: external

Bump the port mask on the AR8327 ethernet switch from 0x3f to 0x7f.

So, it turns out that the AR8327 has 7 ports internally:

* GMAC0 / external (CPU) MAC0
* GMAC1 / port1 -> GMAC5 / port5: external switch port PHYs
* GMAC6 / external (CPU) MAC1

Now, depending upon how things are wired up, the second CPU port (MAC1)
can be wired to either the switch (port6), or through port5's PHY, bypassing
the GMAC+switch entirely. Ie, it can pretend to be a boring PHY, saving
system designers from having to include a separate PHY for a "WAN" port.

Here's the rub - the AP135 board (QCA955x SoC) hooks up arge0 to
the second CPU port on the AR8327, but it's hooked up as RGMII.
So, in order to hook it up to the rest of the switch, it isn't configured
as a separate PHY - OpenWRT has it setup as connected via RGMII to
GMAC6 and (I'm guessing) it's set to be a WAN port by configuring up
port-based VLANs or something.

Thus, with a port mask of 0x3f, GMAC6 was never allowed to receive traffic
from any other port. It could transmit fine, but not receive anything.

So, now it works enough for me to continue doing board bootstrapping.
Note, this isn't enough to make the QCA955x + AR8327 work - there's
a bunch of uncommitted work to both the platform SoC (interrupt handling,
ethernet, etc) and the ethernet switch (register access space, setup, etc)
that needs to happen. However, this particular change is also relevant to
other SoCs, like the AR934x and AR7161, both of which can be glued to
this switch.

Tested:

* AP135 development board

TODO:

* Figure out whether I can somehow abuse another port mode to have this
be a pass-through PHY, or whether I should just create some more boot
time hints to explicitly set up port-based isolation so this works
in a more useful way by default.

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Revert r268543.

We should probably fix sys/gpio.h instead.

Move iic.h to sys/ so that it's automatically installed in /usr/include/sys.

This lets us call iic(4) ioctls without needing the kernel source code
and follows the same model of GPIO.

MFC after: 3

Move iic.h to sys/ so that it's automatically installed in /usr/include/sys.

This lets us call iic(4) ioctls without needing the kernel source code
and follows the same model of GPIO.

MFC after: 3 weeks

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Add a description here.

Set all of the ports into the same vlangroup; there's only one vlangroup
(pvid=1) and we already configure them to send to other ports.

Setting pvid=portnum would mean that there were separate vlang

Set all of the ports into the same vlangroup; there's only one vlangroup
(pvid=1) and we already configure them to send to other ports.

Setting pvid=portnum would mean that there were separate vlangroups
for each ports, but 'leaking' into other ports. The result? All port
traffic flooded to all other port traffic.

Tested:

* DB120, AR9344 + AR8327 switch

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Add ATU flush support.

The OpenWRT AR8xxx switch support flushes the ATU (address translation
unit) after each port link 'up' status change. I've modified this to
just flush on any port transition.

Add ATU flush support.

The OpenWRT AR8xxx switch support flushes the ATU (address translation
unit) after each port link 'up' status change. I've modified this to
just flush on any port transition.

Whilst here, bump the number of ports on the AR8327 to 6, rather than
the default of 5. It's DB120 specific; I'll go and make this configurable
later.

There's some debugging code in here still; I am still debugging whether
this is or isn't working fully.

Tested:

* DB120, AR9344 + AR8327 switch

Obtained from: OpenWRT

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(I think!) make the AR8327 switch correctly handle traffic.

This patch does four things:

* it globally disables mirroring;
* it globally sets the mirroring on each port to be disabled;
* the initia

(I think!) make the AR8327 switch correctly handle traffic.

This patch does four things:

* it globally disables mirroring;
* it globally sets the mirroring on each port to be disabled;
* the initial port setup now programs a portmask for the port to allow
transmission (forwarding) to all other ports bar itself;
* the vlan setup path now programs the portmask for the port to
allow transmission (forwarding) to all other ports bar itself.

Before this, I hard-coded the portmask to 0x3f which would mean all
ports (bar port 6, which currently isn't hooked up to anything.)
This means that traffic would be duplicated back out the port it
received it. I bet this wasn't .. optimal.

In any case, this _seems_ to make DHCP from my macosx laptop
work through this access point. I'll do some further testing
to ensure it's actually working correctly on all my devices.

Tested:

* DB120, AR8327 switch

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Remove now dead code.