Revision tags: v5.18-rc5, v5.18-rc4, v5.18-rc3, v5.18-rc2, v5.18-rc1, v5.17, v5.17-rc8, v5.17-rc7, v5.17-rc6, v5.17-rc5, v5.17-rc4, v5.17-rc3, v5.17-rc2, v5.17-rc1, v5.16, v5.16-rc8, v5.16-rc7, v5.16-rc6, v5.16-rc5, v5.16-rc4, v5.16-rc3, v5.16-rc2, v5.16-rc1, v5.15, v5.15-rc7, v5.15-rc6, v5.15-rc5, v5.15-rc4, v5.15-rc3, v5.15-rc2, v5.15-rc1, v5.14, v5.14-rc7, v5.14-rc6, v5.14-rc5, v5.14-rc4, v5.14-rc3, v5.14-rc2, v5.14-rc1, v5.13, v5.13-rc7, v5.13-rc6, v5.13-rc5, v5.13-rc4, v5.13-rc3, v5.13-rc2, v5.13-rc1, v5.12, v5.12-rc8, v5.12-rc7, v5.12-rc6, v5.12-rc5, v5.12-rc4, v5.12-rc3, v5.12-rc2, v5.12-rc1-dontuse, v5.11, v5.11-rc7, v5.11-rc6, v5.11-rc5, v5.11-rc4, v5.11-rc3, v5.11-rc2, v5.11-rc1, v5.10, v5.10-rc7, v5.10-rc6 |
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#
05cdf457 |
| 26-Nov-2020 |
Michal Simek <michal.simek@xilinx.com> |
microblaze: Remove noMMU code
This configuration is obsolete and likely none is really using it. That's why remove it to simplify code.
Note about CONFIG_MMU in hw_exception_handler.S is left inten
microblaze: Remove noMMU code
This configuration is obsolete and likely none is really using it. That's why remove it to simplify code.
Note about CONFIG_MMU in hw_exception_handler.S is left intentionally for better comment understanding.
Cc: Mike Rapoport <rppt@kernel.org> Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Mike Rapoport <rppt@linux.ibm.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/43486cab370e0c0a79860120b71e0caac75a7e44.1606397528.git.michal.simek@xilinx.com
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Revision tags: v5.10-rc5, v5.10-rc4, v5.10-rc3, v5.10-rc2, v5.10-rc1, v5.9, v5.9-rc8, v5.9-rc7, v5.9-rc6, v5.9-rc5, v5.9-rc4, v5.9-rc3, v5.9-rc2, v5.9-rc1, v5.8, v5.8-rc7, v5.8-rc6, v5.8-rc5, v5.8-rc4, v5.8-rc3, v5.8-rc2, v5.8-rc1, v5.7, v5.7-rc7, v5.7-rc6, v5.7-rc5, v5.7-rc4, v5.7-rc3, v5.7-rc2, v5.7-rc1, v5.6, v5.6-rc7, v5.6-rc6, v5.6-rc5, v5.6-rc4, v5.6-rc3, v5.6-rc2, v5.6-rc1, v5.5, v5.5-rc7, v5.5-rc6, v5.5-rc5, v5.5-rc4, v5.5-rc3, v5.5-rc2, v5.5-rc1, v5.4, v5.4-rc8, v5.4-rc7, v5.4-rc6, v5.4-rc5, v5.4-rc4, v5.4-rc3, v5.4-rc2, v5.4-rc1, v5.3, v5.3-rc8, v5.3-rc7, v5.3-rc6, v5.3-rc5, v5.3-rc4, v5.3-rc3, v5.3-rc2, v5.3-rc1, v5.2, v5.2-rc7, v5.2-rc6, v5.2-rc5, v5.2-rc4, v5.2-rc3, v5.2-rc2, v5.2-rc1, v5.1, v5.1-rc7, v5.1-rc6, v5.1-rc5, v5.1-rc4 |
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#
62fa3bc5 |
| 03-Apr-2019 |
Michal Simek <michal.simek@xilinx.com> |
microblaze: Align comments with register usage
Trivial patch.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Revision tags: v5.1-rc3, v5.1-rc2, v5.1-rc1, v5.0, v5.0-rc8, v5.0-rc7, v5.0-rc6, v5.0-rc5, v5.0-rc4, v5.0-rc3, v5.0-rc2, v5.0-rc1, v4.20, v4.20-rc7, v4.20-rc6, v4.20-rc5, v4.20-rc4, v4.20-rc3, v4.20-rc2, v4.20-rc1, v4.19, v4.19-rc8, v4.19-rc7, v4.19-rc6, v4.19-rc5, v4.19-rc4, v4.19-rc3, v4.19-rc2, v4.19-rc1, v4.18, v4.18-rc8, v4.18-rc7, v4.18-rc6, v4.18-rc5, v4.18-rc4, v4.18-rc3, v4.18-rc2, v4.18-rc1, v4.17, v4.17-rc7, v4.17-rc6, v4.17-rc5, v4.17-rc4, v4.17-rc3, v4.17-rc2, v4.17-rc1, v4.16, v4.16-rc7, v4.16-rc6, v4.16-rc5, v4.16-rc4, v4.16-rc3, v4.16-rc2, v4.16-rc1 |
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#
22648c98 |
| 08-Feb-2018 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
microblaze: Increase max dtb size to 64K from 32K
This patch increases max dtb size to 64K from 32K. This fixes the issue of kernel hang with larger dtb of size greater than 32KB.
Signed-off-by: S
microblaze: Increase max dtb size to 64K from 32K
This patch increases max dtb size to 64K from 32K. This fixes the issue of kernel hang with larger dtb of size greater than 32KB.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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#
9fe37714 |
| 29-Jul-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
microblaze: delete wrong comment about machine_early_init
machine_early_init is defined in arch/microblaze/kernel/setup.c I do not see mach-* directory for MicroBlaze.
Signed-off-by: Masahiro Yamad
microblaze: delete wrong comment about machine_early_init
machine_early_init is defined in arch/microblaze/kernel/setup.c I do not see mach-* directory for MicroBlaze.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Revision tags: v4.15, v4.15-rc9, v4.15-rc8, v4.15-rc7, v4.15-rc6, v4.15-rc5, v4.15-rc4, v4.15-rc3, v4.15-rc2, v4.15-rc1, v4.14, v4.14-rc8, v4.14-rc7, v4.14-rc6, v4.14-rc5, v4.14-rc4, v4.14-rc3, v4.14-rc2, v4.14-rc1, v4.13, v4.13-rc7, v4.13-rc6, v4.13-rc5, v4.13-rc4, v4.13-rc3, v4.13-rc2, v4.13-rc1, v4.12, v4.12-rc7, v4.12-rc6, v4.12-rc5, v4.12-rc4, v4.12-rc3, v4.12-rc2, v4.12-rc1, v4.11, v4.11-rc8, v4.11-rc7, v4.11-rc6, v4.11-rc5, v4.11-rc4, v4.11-rc3, v4.11-rc2, v4.11-rc1, v4.10, v4.10-rc8, v4.10-rc7, v4.10-rc6, v4.10-rc5, v4.10-rc4, v4.10-rc3, v4.10-rc2, v4.10-rc1, v4.9, v4.9-rc8, v4.9-rc7, v4.9-rc6, v4.9-rc5, v4.9-rc4, v4.9-rc3, v4.9-rc2, v4.9-rc1, v4.8, v4.8-rc8, v4.8-rc7, v4.8-rc6, v4.8-rc5, v4.8-rc4, v4.8-rc3, v4.8-rc2, v4.8-rc1, v4.7, v4.7-rc7, v4.7-rc6, v4.7-rc5, v4.7-rc4, v4.7-rc3, v4.7-rc2, v4.7-rc1, v4.6, v4.6-rc7, v4.6-rc6, v4.6-rc5, v4.6-rc4, v4.6-rc3, v4.6-rc2, v4.6-rc1, v4.5, v4.5-rc7, v4.5-rc6, v4.5-rc5, v4.5-rc4, v4.5-rc3, v4.5-rc2, v4.5-rc1, v4.4, v4.4-rc8, v4.4-rc7, v4.4-rc6, v4.4-rc5, v4.4-rc4, v4.4-rc3, v4.4-rc2, v4.4-rc1, v4.3, v4.3-rc7, v4.3-rc6, v4.3-rc5, v4.3-rc4, v4.3-rc3, v4.3-rc2, v4.3-rc1, v4.2, v4.2-rc8, v4.2-rc7, v4.2-rc6, v4.2-rc5, v4.2-rc4, v4.2-rc3, v4.2-rc2, v4.2-rc1, v4.1, v4.1-rc8, v4.1-rc7, v4.1-rc6, v4.1-rc5, v4.1-rc4, v4.1-rc3, v4.1-rc2, v4.1-rc1, v4.0, v4.0-rc7, v4.0-rc6, v4.0-rc5, v4.0-rc4, v4.0-rc3, v4.0-rc2, v4.0-rc1, v3.19, v3.19-rc7, v3.19-rc6, v3.19-rc5, v3.19-rc4, v3.19-rc3, v3.19-rc2, v3.19-rc1, v3.18, v3.18-rc7, v3.18-rc6, v3.18-rc5, v3.18-rc4, v3.18-rc3, v3.18-rc2, v3.18-rc1, v3.17, v3.17-rc7, v3.17-rc6, v3.17-rc5, v3.17-rc4, v3.17-rc3, v3.17-rc2, v3.17-rc1, v3.16, v3.16-rc7, v3.16-rc6, v3.16-rc5, v3.16-rc4, v3.16-rc3, v3.16-rc2, v3.16-rc1, v3.15 |
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#
225fba21 |
| 04-Jun-2014 |
Antonio Ospite <ao2@ao2.it> |
microblaze: Fix typo in head.S s/substract/subtract/
Signed-off-by: Antonio Ospite <ao2@ao2.it> Cc: Michal Simek <monstr@monstr.eu> Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com> Signed-off-by:
microblaze: Fix typo in head.S s/substract/subtract/
Signed-off-by: Antonio Ospite <ao2@ao2.it> Cc: Michal Simek <monstr@monstr.eu> Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Revision tags: v3.15-rc8, v3.15-rc7, v3.15-rc6, v3.15-rc5, v3.15-rc4, v3.15-rc3, v3.15-rc2, v3.15-rc1, v3.14, v3.14-rc8, v3.14-rc7, v3.14-rc6, v3.14-rc5, v3.14-rc4, v3.14-rc3, v3.14-rc2 |
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#
a49f56ee |
| 08-Feb-2014 |
Edgar E. Iglesias <edgar.iglesias@gmail.com> |
microblaze: Fix a typo when disabling stack protection
Correct a typo causing the stack protector to be left enabled. 0xFFFFFFF -> 0xFFFFFFFF
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx
microblaze: Fix a typo when disabling stack protection
Correct a typo causing the stack protector to be left enabled. 0xFFFFFFF -> 0xFFFFFFFF
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Tested-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Revision tags: v3.14-rc1, v3.13, v3.13-rc8, v3.13-rc7, v3.13-rc6, v3.13-rc5, v3.13-rc4, v3.13-rc3, v3.13-rc2, v3.13-rc1, v3.12, v3.12-rc7, v3.12-rc6, v3.12-rc5, v3.12-rc4, v3.12-rc3, v3.12-rc2, v3.12-rc1, v3.11, v3.11-rc7 |
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#
34b9c07a |
| 23-Aug-2013 |
Michal Simek <michal.simek@xilinx.com> |
microblaze: Disable stack protection from bootloader
Microblaze without MMU can use stack protection in bootloader and kernel should clear this setting ASAP.
Signed-off-by: Michal Simek <michal.sim
microblaze: Disable stack protection from bootloader
Microblaze without MMU can use stack protection in bootloader and kernel should clear this setting ASAP.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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#
7f15a256 |
| 06-Nov-2013 |
Michal Simek <michal.simek@xilinx.com> |
microblaze: Calculate kernel pad automatically
The kernel needs to setup the first two tlbs with pad which is used for early page allocation which is used by mapin_ram() to allocate tables for lowme
microblaze: Calculate kernel pad automatically
The kernel needs to setup the first two tlbs with pad which is used for early page allocation which is used by mapin_ram() to allocate tables for lowmem memory before memory initialisation is done. Calculate pad directly from lowmem size.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Revision tags: v3.11-rc6, v3.11-rc5, v3.11-rc4, v3.11-rc3, v3.11-rc2, v3.11-rc1, v3.10, v3.10-rc7, v3.10-rc6, v3.10-rc5, v3.10-rc4, v3.10-rc3, v3.10-rc2, v3.10-rc1 |
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#
4323cd48 |
| 02-May-2013 |
Michal Simek <michal.simek@xilinx.com> |
microblaze: Do not use r6 in head.S
r6 stores pointer to ramdisk and shouldn't be used before it is passed to machine_early_init.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Revision tags: v3.9, v3.9-rc8, v3.9-rc7, v3.9-rc6, v3.9-rc5, v3.9-rc4, v3.9-rc3, v3.9-rc2, v3.9-rc1, v3.8, v3.8-rc7, v3.8-rc6, v3.8-rc5, v3.8-rc4, v3.8-rc3, v3.8-rc2, v3.8-rc1, v3.7, v3.7-rc8, v3.7-rc7, v3.7-rc6, v3.7-rc5, v3.7-rc4, v3.7-rc3, v3.7-rc2, v3.7-rc1, v3.6, v3.6-rc7, v3.6-rc6, v3.6-rc5, v3.6-rc4, v3.6-rc3, v3.6-rc2 |
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#
fcc1c0ff |
| 16-Aug-2012 |
Michal Simek <monstr@monstr.eu> |
microblaze: Fix bug with passing command line
When u-boot passes control over to Linux it places the Linux command line between to the end of __init_end. When space between __init_end and __bss_star
microblaze: Fix bug with passing command line
When u-boot passes control over to Linux it places the Linux command line between to the end of __init_end. When space between __init_end and __bss_start is not COMMAND_LINE_SIZE then the part of cmdline can be lost. In extreme case if __init_end == __bss_start u-boot can't pass any cmdline to Linux kernel.
This patch fix this issue by copying cmd line directly to cmd_line char array which is placed in data section.
Reported-by: David Mc Andrew <david.mcandrew@xilinx.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
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Revision tags: v3.6-rc1, v3.5, v3.5-rc7, v3.5-rc6, v3.5-rc5, v3.5-rc4, v3.5-rc3, v3.5-rc2, v3.5-rc1, v3.4, v3.4-rc7, v3.4-rc6, v3.4-rc5, v3.4-rc4, v3.4-rc3, v3.4-rc2, v3.4-rc1, v3.3, v3.3-rc7, v3.3-rc6, v3.3-rc5, v3.3-rc4, v3.3-rc3, v3.3-rc2, v3.3-rc1, v3.2, v3.2-rc7, v3.2-rc6, v3.2-rc5, v3.2-rc4, v3.2-rc3, v3.2-rc2, v3.2-rc1, v3.1, v3.1-rc10, v3.1-rc9, v3.1-rc8, v3.1-rc7, v3.1-rc6, v3.1-rc5, v3.1-rc4, v3.1-rc3, v3.1-rc2, v3.1-rc1, v3.0, v3.0-rc7, v3.0-rc6, v3.0-rc5, v3.0-rc4, v3.0-rc3, v3.0-rc2, v3.0-rc1, v2.6.39, v2.6.39-rc7, v2.6.39-rc6, v2.6.39-rc5, v2.6.39-rc4, v2.6.39-rc3, v2.6.39-rc2, v2.6.39-rc1, v2.6.38, v2.6.38-rc8, v2.6.38-rc7, v2.6.38-rc6, v2.6.38-rc5, v2.6.38-rc4, v2.6.38-rc3, v2.6.38-rc2, v2.6.38-rc1, v2.6.37, v2.6.37-rc8, v2.6.37-rc7, v2.6.37-rc6, v2.6.37-rc5, v2.6.37-rc4, v2.6.37-rc3, v2.6.37-rc2, v2.6.37-rc1, v2.6.36, v2.6.36-rc8, v2.6.36-rc7, v2.6.36-rc6, v2.6.36-rc5, v2.6.36-rc4, v2.6.36-rc3, v2.6.36-rc2, v2.6.36-rc1, v2.6.35, v2.6.35-rc6, v2.6.35-rc5, v2.6.35-rc4, v2.6.35-rc3, v2.6.35-rc2, v2.6.35-rc1, v2.6.34, v2.6.34-rc7, v2.6.34-rc6, v2.6.34-rc5, v2.6.34-rc4, v2.6.34-rc3, v2.6.34-rc2, v2.6.34-rc1, v2.6.33, v2.6.33-rc8 |
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#
e02db0aa |
| 08-Feb-2010 |
Michal Simek <monstr@monstr.eu> |
microblaze: Handle TLB skip size dynamically
This patch fix the problem with rootfs on JFFS2 with early printk console turned on.
The origin version used TLB63 for temporary early printk mapping. T
microblaze: Handle TLB skip size dynamically
This patch fix the problem with rootfs on JFFS2 with early printk console turned on.
The origin version used TLB63 for temporary early printk mapping. The code expect that kernel is not able to use all 64 TLB entries till early printk console is remapped by ioremap. After that temporary mapping on TLB63 is silently lost. This expectation give the opportunity to have early console pretty early.
Microblaze systems with JFFS2 rootfs with early printk console turned on used more than 64 TLB entries before kernel can remap early console. Based on that kernel does access to bad area because early printk mapping is rewritten.
This patch introduces tlb_skip variable which dynamically stores number of skipped TLB entries from the TLB0. skip_tlb=2 means that TLB0 and TLB1 should be skipped.
MICROBLAZE_TLB_SKIP defines how many TLB is skipped at the kernel start. They can be used for user purpose.
TLB 63 is used for temporary LMB mapping (MICROBLAZE_LMB_TLB_ID).
Also clean TLBLO when kernel starts.
For specific kernel sizes kernel can use just one TLB. Detect this case and use the second TLB for general purpose.
Change _tlbia function to flush TLB entries from tlb_skip to TLB_SIZE.
Export tlb_skip size through debugfs.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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#
95b0f9ea |
| 08-Feb-2010 |
Michal Simek <monstr@monstr.eu> |
microblaze: Improve TLB calculation for small systems
Systems with small amount of memory need to be handled differently. Linux can't allocate the whole 32MB with two TLBs because then there is no M
microblaze: Improve TLB calculation for small systems
Systems with small amount of memory need to be handled differently. Linux can't allocate the whole 32MB with two TLBs because then there is no MMU protection.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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#
3a1d2676 |
| 13-Jul-2011 |
Michal Simek <monstr@monstr.eu> |
microblaze: Extend space for compiled-in FDT to 32kB
Signed-off-by: Michal Simek <monstr@monstr.eu>
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#
173701d7 |
| 09-Nov-2011 |
Michal Simek <monstr@monstr.eu> |
microblaze: Clear all MSR flags on the first kernel instruction
The main reason is bug because of dynamic TLB allocation. U-BOOT didn't disable dcache and then writing to physical address from ASM w
microblaze: Clear all MSR flags on the first kernel instruction
The main reason is bug because of dynamic TLB allocation. U-BOOT didn't disable dcache and then writing to physical address from ASM wan't visible for reading through MMU. Disabling caches and clearing all flags from previous code is good to do so.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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#
cd341577 |
| 01-Feb-2011 |
Michal Simek <monstr@monstr.eu> |
microblaze: Do not use "la" pseudo instruction - use addik instead
"la" pseudo instruction is only translation to "addik". Use directly "addik" which is described in the MB reference guide.
Signed-
microblaze: Do not use "la" pseudo instruction - use addik instead
"la" pseudo instruction is only translation to "addik". Use directly "addik" which is described in the MB reference guide.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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#
495162df |
| 31-Jan-2011 |
Michal Simek <monstr@monstr.eu> |
microblaze: Optimize BE/LE bootup detecting
Save 0x1 word to rodata section and remove online value loading if DTB is passed from bootloader. It saves two asm instructions in bootup.
Signed-off-by:
microblaze: Optimize BE/LE bootup detecting
Save 0x1 word to rodata section and remove online value loading if DTB is passed from bootloader. It saves two asm instructions in bootup.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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#
0eb6aaf5 |
| 04-Feb-2011 |
Michal Simek <monstr@monstr.eu> |
microblaze: Fix msr instruction detection
Fix msr instructions detection. The current code just use msrclr for loading msr content and compare it with proper MSR content. If msrclr is not implemente
microblaze: Fix msr instruction detection
Fix msr instructions detection. The current code just use msrclr for loading msr content and compare it with proper MSR content. If msrclr is not implemented r8 contains pc address. Previous code wanted to use MSR carry bit but if msrclr wasn't implemented carry wasn't cleared.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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#
026a2078 |
| 26-Jan-2011 |
Michal Simek <monstr@monstr.eu> |
microblaze: Fix DTB passing from bootloader
Little endian system needs to check OF_DT_HEADER but it is swapped because it is in big-endian. Microblaze LE provides lwr instruction which loads magic n
microblaze: Fix DTB passing from bootloader
Little endian system needs to check OF_DT_HEADER but it is swapped because it is in big-endian. Microblaze LE provides lwr instruction which loads magic number in BIG endian format which can be compared.
There is used the fact that if you write 0x1 as word and load it as byte then you get for big-endian zero and 1 for little-endian.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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#
ba9c4f88 |
| 13-May-2010 |
Steven J. Magnani <steve@digidescorp.com> |
microblaze: Allow PAGE_SIZE configuration
Allow developer to configure memory page size at compile time. Larger pages can improve performance on some workloads.
Based on PowerPC code.
Signed-off-b
microblaze: Allow PAGE_SIZE configuration
Allow developer to configure memory page size at compile time. Larger pages can improve performance on some workloads.
Based on PowerPC code.
Signed-off-by: Steven J. Magnani <steve@digidescorp.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
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7a0248e8 |
| 10-Apr-2010 |
Steven J. Magnani <steve@digidescorp.com> |
microblaze: Quiet section mismatch warnings
_start is located in .text, which causes mismatch warnings with machine_early_init() and start_kernel() in .init.text.
Signed-off-by: Steven J. Magnani <
microblaze: Quiet section mismatch warnings
_start is located in .text, which causes mismatch warnings with machine_early_init() and start_kernel() in .init.text.
Signed-off-by: Steven J. Magnani <steve@digidescorp.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
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3f218935 |
| 24-Mar-2010 |
Michal Simek <monstr@monstr.eu> |
microblaze: head.S typo fix
I forget to change register name in comments.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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0691c97d |
| 24-Mar-2010 |
Michal Simek <monstr@monstr.eu> |
microblaze: Use MICROBLAZE_TLB_SIZE in asm code
TLB size was hardcoded in asm code. This patch brings ability to change TLB size only in one place. (mmu.h).
Signed-off-by: Michal Simek <monstr@mons
microblaze: Use MICROBLAZE_TLB_SIZE in asm code
TLB size was hardcoded in asm code. This patch brings ability to change TLB size only in one place. (mmu.h).
Signed-off-by: Michal Simek <monstr@monstr.eu>
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ee68f174 |
| 15-Mar-2010 |
Michal Simek <monstr@monstr.eu> |
microblaze: Support systems without lmb bram
When the system has no lmb bram, main memory should be start from zero because of microblaze vectors.
DTS fragment could look like: DDR2_SDRAM: memory@
microblaze: Support systems without lmb bram
When the system has no lmb bram, main memory should be start from zero because of microblaze vectors.
DTS fragment could look like: DDR2_SDRAM: memory@0 { device_type = "memory"; reg = < 0x0 0x10000000 >; } ;
Then you have to setup CONFIG_KERNEL_BASE_ADDR=0 which caused that kernel physical start address will be zero. On reset vector place will be jump to 0x100 and on 0x100 starts kernel text.
You have to solve how to load the kernel before cpu starts. Tested with XMD.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Revision tags: v2.6.33-rc7 |
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137d0795 |
| 04-Feb-2010 |
Michal Simek <monstr@monstr.eu> |
microblaze: Change temp register for cmdline
For copy was used r7 register when CONFIG_CMDLINE_BOOL option is enabled. But r7 stores pointer to fdt that's why machine_early_init not detect compiled-
microblaze: Change temp register for cmdline
For copy was used r7 register when CONFIG_CMDLINE_BOOL option is enabled. But r7 stores pointer to fdt that's why machine_early_init not detect compiled-in DTB.
I also moved kernel PID setup to have TLB init in one block
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Revision tags: v2.6.33-rc6, v2.6.33-rc5, v2.6.33-rc4, v2.6.33-rc3, v2.6.33-rc2, v2.6.33-rc1, v2.6.32, v2.6.32-rc8, v2.6.32-rc7, v2.6.32-rc6, v2.6.32-rc5 |
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d8678b58 |
| 15-Oct-2009 |
Grant Likely <grant.likely@secretlab.ca> |
of: add common header for flattened device tree representation
Add a common header file for working with the flattened device tree data structure and merge the shared data tags used by Microblaze an
of: add common header for flattened device tree representation
Add a common header file for working with the flattened device tree data structure and merge the shared data tags used by Microblaze and PowerPC
Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: David S. Miller <davem@davemloft.net> Acked-by: Wolfram Sang <w.sang@pengutronix.de> Acked-by: Michal Simek <monstr@monstr.eu> Acked-by: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com> Acked-by: Stephen Rothwell <sfr@canb.auug.org.au>
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