MIPS: Add MAC2008 Support

MAC2008 means the processor implemented IEEE754 style Fused MADD
instruction. It was introduced in Release3 but removed in Release5.

The toolchain support of MAC2008 have

MIPS: Add MAC2008 Support

MAC2008 means the processor implemented IEEE754 style Fused MADD
instruction. It was introduced in Release3 but removed in Release5.

The toolchain support of MAC2008 have never landed except for Loongson
processors.

This patch aimed to disabled the MAC2008 if it's optional. For
MAC2008 only processors, we corrected math-emu behavior to align
with actual hardware behavior.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
[paulburton@kernel.org: Fixup MIPSr2-r5 check in cpu_set_fpu_2008.]
Signed-off-by: Paul Burton <paulburton@kernel.org>
Cc: linux-mips@vger.kernel.org
Cc: chenhc@lemote.com
Cc: paul.burton@mips.com
Cc: linux-kernel@vger.kernel.org

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treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 397

Based on 1 normalized pattern(s):

this program is free software you can distribute it and or modify it
under the terms of the

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 397

Based on 1 normalized pattern(s):

this program is free software you can distribute it and or modify it
under the terms of the gnu general public license version 2 as
published by the free software foundation this program is
distributed in the hope it will be useful but without any warranty
without even the implied warranty of merchantability or fitness for
a particular purpose see the gnu general public license for more
details you should have received a copy of the gnu general public
license along with this program if not write to the free software
foundation inc 51 franklin st fifth floor boston ma 02110 1301 usa

extracted by the scancode license scanner the SPDX license identifier

GPL-2.0-only

has been chosen to replace the boilerplate/reference in 33 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190531081038.563233189@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

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MIPS: math-emu: Use preferred flavor of unsigned integer declarations

Fix occurences of unsigned integer variable declarations that are
not preferred by standards of checkpatch scripts. This removes

MIPS: math-emu: Use preferred flavor of unsigned integer declarations

Fix occurences of unsigned integer variable declarations that are
not preferred by standards of checkpatch scripts. This removes a
significant number of checkpatch warnings for files in math-emu
directory (several files become completely warning-free), and thus
makes easier to spot (now and in the future) other, perhaps more
significant, checkpatch errors and warnings.

Signed-off-by: Aleksandar Markovic <aleksandar.markovic@mips.com>
Reviewed-by: James Hogan <jhogan@kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Douglas Leung <douglas.leung@mips.com>
Cc: Goran Ferenc <goran.ferenc@mips.com>
Cc: "Maciej W. Rozycki" <macro@imgtec.com>
Cc: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Miodrag Dinic <miodrag.dinic@mips.com>
Cc: Paul Burton <paul.burton@mips.com>
Cc: Petar Jovanovic <petar.jovanovic@mips.com>
Cc: Raghu Gandham <raghu.gandham@mips.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/17582/
Signed-off-by: James Hogan <jhogan@kernel.org>

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MIPS: math-emu: RINT.<D|S>: Fix several problems by reimplementation

Reimplement RINT.<D|S> kernel emulation so that all RINT.<D|S>
specifications are met.

For the sake of simplicity, let's analyze

MIPS: math-emu: RINT.<D|S>: Fix several problems by reimplementation

Reimplement RINT.<D|S> kernel emulation so that all RINT.<D|S>
specifications are met.

For the sake of simplicity, let's analyze RINT.S only. Prior to
this patch, RINT.S emulation was essentially implemented as (in
pseudocode) <output> = ieee754sp_flong(ieee754sp_tlong(<input>)),
where ieee754sp_tlong() and ieee754sp_flong() are functions
providing conversion from double to integer, and from integer
to double, respectively. On surface, this implementation looks
correct, but actually fails in many cases. Following problems
were detected:

1. NaN and infinity cases will not be handled properly. The
function ieee754sp_flong() never returns NaN nor infinity.
2. For RINT.S, for all inputs larger than LONG_MAX, and smaller
than FLT_MAX, the result will be wrong, and the overflow
exception will be erroneously set. A similar problem for
negative inputs exists as well.
3. For some rounding modes, for some negative inputs close to zero,
the return value will be zero, and should be -zero. This is
because ieee754sp_flong() never returns -zero.

This patch removes the problems above by implementing dedicated
functions for RINT.<D|S> emulation.

The core of the new function functionality is adapted version of
the core of the function ieee754sp_tlong(). However, there are many
details that are implemented to match RINT.<D|S> specification. It
should be said that the functionality of ieee754sp_tlong() actually
closely corresponds to CVT.L.S instruction, and it is used while
emulating CVT.L.S. However, RINT.S and CVT.L.S instructions differ
in many aspects. This patch fulfills missing support for RINT.<D|S>.

Signed-off-by: Miodrag Dinic <miodrag.dinic@imgtec.com>
Signed-off-by: Goran Ferenc <goran.ferenc@imgtec.com>
Signed-off-by: Aleksandar Markovic <aleksandar.markovic@imgtec.com>
Cc: David S. Miller <davem@davemloft.net>
Cc: Douglas Leung <douglas.leung@imgtec.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Hans Verkuil <hans.verkuil@cisco.com>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: Maciej W. Rozycki <macro@imgtec.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Mauro Carvalho Chehab <mchehab@kernel.org>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Petar Jovanovic <petar.jovanovic@imgtec.com>
Cc: Raghu Gandham <raghu.gandham@imgtec.com>
Cc: Randy Dunlap <rdunlap@infradead.org>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/17141/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

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MIPS: math-emu: Add IEEE Std 754-2008 NaN encoding emulation

Implement IEEE Std 754-2008 NaN encoding wired to the state of the
FCSR.NAN2008 bit. Make the interpretation of the quiet bit in NaN dat

MIPS: math-emu: Add IEEE Std 754-2008 NaN encoding emulation

Implement IEEE Std 754-2008 NaN encoding wired to the state of the
FCSR.NAN2008 bit. Make the interpretation of the quiet bit in NaN data
as follows:

* in the legacy mode originally defined by the MIPS architecture the
value of 1 denotes an sNaN whereas the value of 0 denotes a qNaN,

* in the 2008 mode introduced with revision 5 of the MIPS architecture
the value of 0 denotes an sNaN whereas the value of 1 denotes a qNaN,
following the definition of the preferred NaN encoding introduced with
IEEE Std 754-2008.

In the 2008 mode, following the requirement of the said standard, quiet
an sNaN where needed by setting the quiet bit to 1 and leaving all the
NaN payload bits unchanged.

Update format conversion operations according to the rules set by IEEE
Std 754-2008 and the MIPS architecture. Specifically:

* propagate NaN payload bits through conversions between floating-point
formats such that as much information as possible is preserved and
specifically a conversion from a narrower format to a wider format and
then back to the original format does not change a qNaN payload in any
way,

* conversions from a floating-point to an integer format where the
source is a NaN, infinity or a value that would convert to an integer
outside the range of the result format produce, under the default
exception handling, the respective values defined by the MIPS
architecture.

In full FPU emulation set the FIR.HAS2008 bit to 1, however do not make
any further FCSR bits writable.

Signed-off-by: Maciej W. Rozycki <macro@imgtec.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Matthew Fortune <Matthew.Fortune@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/11477/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

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MIPS: math-emu: Add support for the MIPS R6 MAX{, A} FPU instruction

MIPS R6 introduced the following instruction:
Scalar Floating-Point Maximum and
Scalar Floating-Point argument with Maximum Absol

MIPS: math-emu: Add support for the MIPS R6 MAX{, A} FPU instruction

MIPS R6 introduced the following instruction:
Scalar Floating-Point Maximum and
Scalar Floating-Point argument with Maximum Absolute Value
MAX.fmt writes the maximum value of the inputs fs and ft to the
destination fd.
MAXA.fmt takes input arguments fs and ft and writes the argument with
the maximum absolute value to the destination fd.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10961/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

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MIPS: math-emu: Add support for the MIPS R6 MIN{, A} FPU instruction

MIPS R6 introduced the following instruction:
Scalar Floating-Point Minimum and
Scalar Floating-Point argument with Minimum Absol

MIPS: math-emu: Add support for the MIPS R6 MIN{, A} FPU instruction

MIPS R6 introduced the following instruction:
Scalar Floating-Point Minimum and
Scalar Floating-Point argument with Minimum Absolute Value

MIN.fmt writes the minimum value of the inputs fs and ft to the
destination fd.
MINA.fmt takes input arguments fs and ft and writes the argument with
the minimum absolute value to the destination fd.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10960/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

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MIPS: math-emu: Add support for the MIPS R6 CLASS FPU instruction

MIPS R6 introduced the following instruction:
Stores in fd a bit mask reflecting the floating-point class of the
floating point scal

MIPS: math-emu: Add support for the MIPS R6 CLASS FPU instruction

MIPS R6 introduced the following instruction:
Stores in fd a bit mask reflecting the floating-point class of the
floating point scalar value fs.

CLASS.fmt: FPR[fd] = class(FPR[fs])

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10959/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

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MIPS: math-emu: Add support for the MIPS R6 MSUBF FPU instruction

MIPS R6 introduced the following instruction:
Floating Point Fused Multiply Subtract:
MSUBF.fmt To perform a fused multiply-subtract

MIPS: math-emu: Add support for the MIPS R6 MSUBF FPU instruction

MIPS R6 introduced the following instruction:
Floating Point Fused Multiply Subtract:
MSUBF.fmt To perform a fused multiply-subtract of FP values.

MSUBF.fmt: FPR[fd] = FPR[fd] - (FPR[fs] x FPR[ft])

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10957/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

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MIPS: math-emu: Add support for the MIPS R6 MADDF FPU instruction

MIPS R6 introduced the following instruction:
Floating Point Fused Multiply Add:
MADDF.fmt To perform a fused multiply-add of FP val

MIPS: math-emu: Add support for the MIPS R6 MADDF FPU instruction

MIPS R6 introduced the following instruction:
Floating Point Fused Multiply Add:
MADDF.fmt To perform a fused multiply-add of FP values.

MADDF.fmt: FPR[fd] = FPR[fd] + (FPR[fs] x FPR[ft])

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10956/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

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MIPS: math-emu: Define IEEE 754-2008 feature control bits

Define IEEE 754-2008 feature control bits: FIR.HAS2008, FCSR.ABS2008 and
FCSR.NAN2008, and update the `_ieee754_csr' structure accordingly.

MIPS: math-emu: Define IEEE 754-2008 feature control bits

Define IEEE 754-2008 feature control bits: FIR.HAS2008, FCSR.ABS2008 and
FCSR.NAN2008, and update the `_ieee754_csr' structure accordingly.

For completeness define FIR.UFRP too.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9709/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

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MIPS: math-emu: Remove dead comparison helpers

None of the comparison helpers in ieee754.h is used, remove them.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.or

MIPS: math-emu: Remove dead comparison helpers

None of the comparison helpers in ieee754.h is used, remove them.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9691/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

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MIPS: ieee754.h: Supplement comments for special values

Add the remaining missing comments for IEEE 754 special value array
indices. Reindent macro definitions for consistency.

Signed-off-by: Maci

MIPS: ieee754.h: Supplement comments for special values

Add the remaining missing comments for IEEE 754 special value array
indices. Reindent macro definitions for consistency.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9671/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

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MIPS: ieee754.h: Correct comments for special values

IEEE754_SPCVAL_NMIN denotes the index into the special value array where
the closest to zero negative normal number expressible is stored.
Simila

MIPS: ieee754.h: Correct comments for special values

IEEE754_SPCVAL_NMIN denotes the index into the special value array where
the closest to zero negative normal number expressible is stored.
Similarly IEEE754_SPCVAL_NMIND denotes such index for the closest to
zero negative subnormal number expressible. Make comments match that.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9670/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

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MIPS: math-emu: Switch to using the MIPS rounding modes.

Previously math-emu was using the IEEE-754 constants internally. These
were differing by having the constants for rounding to +/- infinity
s

MIPS: math-emu: Switch to using the MIPS rounding modes.

Previously math-emu was using the IEEE-754 constants internally. These
were differing by having the constants for rounding to +/- infinity
switched, so a conversion was necessary. This would be entirely
avoidable if the MIPS constants were used throughout, so get rid of
the bloat.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

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MIPS: math-emu: Nuke alternative names for IEEE-754 rounding modes.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

MIPS: math-emu: Cleanup coding style.

o Only define variables in the outermost block
o One empty line at most
o Format comments as per CodingStyle
o Update FSF address in licensing term comment

MIPS: math-emu: Cleanup coding style.

o Only define variables in the outermost block
o One empty line at most
o Format comments as per CodingStyle
o Update FSF address in licensing term comment
o Spell FPU and MIPS in all capitals.
o Remove ####-type of lines in comments.
o Try to make things a bit most consistent between sp_*.c / dp_*.c files.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

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MIPS: math-emu: Cleanup definition of structs describe sp/dp floats.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

MIPS: math-emu: Get rid of the useless parts of exception handling.

All it really did was throw a printk for no obvious reason.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

MIPS: math-emu: Remove unused code.

Shrinks the FPU emulator by 4528 bytes.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

MIPS: math-emu: Inline ieee754dp_finite and ieee754dp_finite().

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

MIPS: math-emu: Cleanup stdarg usage including apparently bogus comment.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

MIPS: math-emu: Cleanup ieee754si_indef() / ieee754di_indef().

LONG_LONG_MAX is a symbol defined in <limits.h> which may not be available
so better rely on something provided by a kernel header. Wh

MIPS: math-emu: Cleanup ieee754si_indef() / ieee754di_indef().

LONG_LONG_MAX is a symbol defined in <limits.h> which may not be available
so better rely on something provided by a kernel header. While at it,
turn these function-like macros into inline functions.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

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MIPS: math-emu: Get rid of unuable extended precision support.

No usable functionality and nothig does ever define IEEE854_XP anyway.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

MIPS: math-emu: Turn macros into functions where possible.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>