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53cd65a9 |
| 28-Dec-2023 |
Randy Dunlap <rdunlap@infradead.org> |
drm/i915/gt: reconcile Excess struct member kernel-doc warnings
Document nested struct members with full names as described in Documentation/doc-guide/kernel-doc.rst.
intel_gsc.h:34: warning: Exces
drm/i915/gt: reconcile Excess struct member kernel-doc warnings
Document nested struct members with full names as described in Documentation/doc-guide/kernel-doc.rst.
intel_gsc.h:34: warning: Excess struct member 'gem_obj' description in 'intel_gsc'
Also add missing field member descriptions.
Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Cc: intel-gfx@lists.freedesktop.org Cc: Jonathan Corbet <corbet@lwn.net> Cc: dri-devel@lists.freedesktop.org Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Andi Shyti <andi.shyti@linux.intel.com> Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com> Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20231228234946.12405-1-rdunlap@infradead.org (cherry picked from commit cd1d91115ff1929ec346d85f512ef260ddf8131e) Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
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7416cbbc |
| 10-Feb-2023 |
Andi Shyti <andi.shyti@linux.intel.com> |
drm/i915/gt: Rename dev_priv to i915 for private data naming consistency
It has become common practice to refer to the drm_i915_private structures as "i915". However, there are still instances where
drm/i915/gt: Rename dev_priv to i915 for private data naming consistency
It has become common practice to refer to the drm_i915_private structures as "i915". However, there are still instances where they are referred to as "dev_priv". This inconsistency can make grepping for information more difficult and does not maintain a cohesive style throughout the code.
Rename all the "dev_priv" structures in the gt/* directory to "i915".
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com> Reviewed-by: Nirmoy Das <nirmoy.das@intel.com> Acked-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230210150344.1066991-1-andi.shyti@linux.intel.com
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b5917a10 |
| 07-Sep-2022 |
Tomas Winkler <tomas.winkler@intel.com> |
drm/i915/gsc: allocate extended operational memory in LMEM
GSC requires more operational memory than available on chip. Reserve 4M of LMEM for GSC operation. The memory is provided to the GSC as str
drm/i915/gsc: allocate extended operational memory in LMEM
GSC requires more operational memory than available on chip. Reserve 4M of LMEM for GSC operation. The memory is provided to the GSC as struct resource to the auxiliary data of the child device.
Cc: Alan Previn <alan.previn.teres.alexis@intel.com> Cc: Matthew Auld <matthew.auld@intel.com> Signed-off-by: Tomas Winkler <tomas.winkler@intel.com> Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by: Alan Previn <alan.previn.teres.alexis@intel.com> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220907215113.1596567-16-tomas.winkler@intel.com Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
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1e3dc1d8 |
| 19-Apr-2022 |
Tomas Winkler <tomas.winkler@intel.com> |
drm/i915/gsc: add gsc as a mei auxiliary device
GSC is a graphics system controller, it provides a chassis controller for graphics discrete cards.
There are two MEI interfaces in GSC: HECI1 and HEC
drm/i915/gsc: add gsc as a mei auxiliary device
GSC is a graphics system controller, it provides a chassis controller for graphics discrete cards.
There are two MEI interfaces in GSC: HECI1 and HECI2.
Both interfaces are on the BAR0 at offsets 0x00258000 and 0x00259000. GSC is a GT Engine (class 4: instance 6). HECI1 interrupt is signaled via bit 15 and HECI2 via bit 14 in the interrupt register.
This patch exports GSC as auxiliary device for mei driver to bind to for HECI2 interface and prepares for HECI1 interface as it will follow up soon.
CC: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Tomas Winkler <tomas.winkler@intel.com> Signed-off-by: Vitaly Lubart <vitaly.lubart@intel.com> Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com> Acked-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220419193314.526966-2-daniele.ceraolospurio@intel.com
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