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1677293e |
| 05-Mar-2024 |
Robert Marko <robimarko@gmail.com> |
net: phy: qca807x: fix compilation when CONFIG_GPIOLIB is not set
Kernel bot has discovered that if CONFIG_GPIOLIB is not set compilation will fail.
Upon investigation the issue is that qca807x_gpi
net: phy: qca807x: fix compilation when CONFIG_GPIOLIB is not set
Kernel bot has discovered that if CONFIG_GPIOLIB is not set compilation will fail.
Upon investigation the issue is that qca807x_gpio() is guarded by a preprocessor check but then it is called under if (IS_ENABLED(CONFIG_GPIOLIB)) in the probe call so the compiler will error out since qca807x_gpio() has not been declared if CONFIG_GPIOLIB has not been set.
Fixes: d1cb613efbd3 ("net: phy: qcom: add support for QCA807x PHY Family") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202403031332.IGAbZzwq-lkp@intel.com/ Signed-off-by: Robert Marko <robimarko@gmail.com> Reviewed-by: Simon Horman <horms@kernel.org> Tested-by: Simon Horman <horms@kernel.org> # build-tested Link: https://lore.kernel.org/r/20240305142113.795005-1-robimarko@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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3be0d950 |
| 12-Feb-2024 |
Robert Marko <robimarko@gmail.com> |
net: phy: qca807x: move interface mode check to .config_init_once
Currently, we are checking whether the PHY package mode matches the individual PHY interface modes at PHY package probe time, but at
net: phy: qca807x: move interface mode check to .config_init_once
Currently, we are checking whether the PHY package mode matches the individual PHY interface modes at PHY package probe time, but at that time we only know the PHY package mode and not the individual PHY interface modes as of_get_phy_mode() that populates it will only get called once the netdev to which PHY-s are attached to is being probed and thus this check will always fail and return -EINVAL.
So, lets move this check to .config_init_once as at that point individual PHY interface modes should be populated.
Fixes: d1cb613efbd3 ("net: phy: qcom: add support for QCA807x PHY Family") Signed-off-by: Robert Marko <robimarko@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20240212115043.1725918-1-robimarko@gmail.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
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f508a226 |
| 06-Feb-2024 |
Christian Marangi <ansuelsmth@gmail.com> |
net: phy: qca807x: add support for configurable LED
QCA8072/5 have up to 2 LEDs attached for PHY.
LEDs can be configured to be ON/hw blink or be set to HW control.
Hw blink mode is set to blink at
net: phy: qca807x: add support for configurable LED
QCA8072/5 have up to 2 LEDs attached for PHY.
LEDs can be configured to be ON/hw blink or be set to HW control.
Hw blink mode is set to blink at 4Hz or 250ms.
PHY can support both copper (TP) or fiber (FIBRE) kind and supports different HW control modes based on the port type.
HW control modes supported for netdev trigger for copper ports are: - LINK_10 - LINK_100 - LINK_1000 - TX - RX - FULL_DUPLEX - HALF_DUPLEX
HW control modes supported for netdev trigger for fiber ports are: - LINK_100 - LINK_1000 - TX - RX - FULL_DUPLEX - HALF_DUPLEX
LED support conflicts with GPIO controller feature and must be disabled if gpio-controller is used for the PHY.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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d1cb613e |
| 06-Feb-2024 |
Robert Marko <robert.marko@sartura.hr> |
net: phy: qcom: add support for QCA807x PHY Family
This adds driver for the Qualcomm QCA8072 and QCA8075 PHY-s.
They are 2 or 5 port IEEE 802.3 clause 22 compliant 10BASE-Te, 100BASE-TX and 1000BAS
net: phy: qcom: add support for QCA807x PHY Family
This adds driver for the Qualcomm QCA8072 and QCA8075 PHY-s.
They are 2 or 5 port IEEE 802.3 clause 22 compliant 10BASE-Te, 100BASE-TX and 1000BASE-T PHY-s.
They feature 2 SerDes, one for PSGMII or QSGMII connection with MAC, while second one is SGMII for connection to MAC or fiber.
Both models have a combo port that supports 1000BASE-X and 100BASE-FX fiber.
PHY package can be configured in 3 mode following this table:
First Serdes mode Second Serdes mode Option 1 PSGMII for copper Disabled ports 0-4 Option 2 PSGMII for copper 1000BASE-X / 100BASE-FX ports 0-4 Option 3 QSGMII for copper SGMII for ports 0-3 copper port 4
Each PHY inside of QCA807x series has 4 digitally controlled output only pins that natively drive LED-s. But some vendors used these to driver generic LED-s controlled by userspace, so lets enable registering each PHY as GPIO controller and add driver for it.
These are commonly used in Qualcomm IPQ40xx, IPQ60xx and IPQ807x boards.
Co-developed-by: Christian Marangi <ansuelsmth@gmail.com> Signed-off-by: Robert Marko <robert.marko@sartura.hr> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
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