#
b11c76db |
| 21-Mar-2023 |
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> |
PCI: aardvark: Convert to platform remove callback returning void
The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error
PCI: aardvark: Convert to platform remove callback returning void
The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void.
Trivially convert this driver from always returning zero in the remove callback to the void returning variant.
Link: https://lore.kernel.org/linux-pci/20230321193208.366561-2-u.kleine-koenig@pengutronix.de Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
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#
7ccb9667 |
| 14-Nov-2022 |
Dmitry Torokhov <dmitry.torokhov@gmail.com> |
PCI: aardvark: Switch to using devm_gpiod_get_optional()
Switch the driver to the generic version of gpiod API (and away from OF-specific variant), so that we can stop exporting devm_gpiod_get_from_
PCI: aardvark: Switch to using devm_gpiod_get_optional()
Switch the driver to the generic version of gpiod API (and away from OF-specific variant), so that we can stop exporting devm_gpiod_get_from_of_node().
Link: https://lore.kernel.org/r/Y3KMEZFv6dpxA+Gv@google.com Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Pali Rohár <pali@kernel.org>
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a080f9ad |
| 11-Jul-2022 |
Pali Rohár <pali@kernel.org> |
PCI: aardvark: Add support for PCI Bridge Subsystem Vendor ID on emulated bridge
Register with Subsystem Device/Vendor ID is at offset 0x2c.
Export it via the emulated bridge to enable support for
PCI: aardvark: Add support for PCI Bridge Subsystem Vendor ID on emulated bridge
Register with Subsystem Device/Vendor ID is at offset 0x2c.
Export it via the emulated bridge to enable support for the Subsystem Device/Vendor ID - by reading it in the PCI controller config space and storing it in the emulated bridge control structures, so that it is exposed in the respective PCI capability.
After this change Subsystem ID is visible in lspci output at line:
Capabilities: [40] Subsystem
Link: https://lore.kernel.org/r/20220711225915.13896-1-pali@kernel.org Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
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#
658aea35 |
| 24-Aug-2022 |
Pali Rohár <pali@kernel.org> |
PCI: pci-bridge-emul: Set position of PCI capabilities to real HW value
mvebu and aardvark HW have PCIe capabilities on different offset in PCI config space. Extend pci-bridge-emul.c code to allow s
PCI: pci-bridge-emul: Set position of PCI capabilities to real HW value
mvebu and aardvark HW have PCIe capabilities on different offset in PCI config space. Extend pci-bridge-emul.c code to allow setting custom driver custom value where PCIe capabilities starts.
With this change PCIe capabilities of both drivers are reported at the same location as where they are reported by U-Boot - in their real HW offset.
Link: https://lore.kernel.org/r/20220824112124.21675-1-pali@kernel.org Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
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bcdb6fd4 |
| 24-May-2022 |
Pali Rohár <pali@kernel.org> |
PCI: aardvark: Fix reporting Slot capabilities on emulated bridge
Slot capabilities are currently not reported because emulated bridge does not report the PCI_EXP_FLAGS_SLOT flag.
Set PCI_EXP_FLAGS
PCI: aardvark: Fix reporting Slot capabilities on emulated bridge
Slot capabilities are currently not reported because emulated bridge does not report the PCI_EXP_FLAGS_SLOT flag.
Set PCI_EXP_FLAGS_SLOT to let the kernel know that PCI_EXP_SLT* registers are supported.
Move setting of PCI_EXP_SLTCTL register from "dynamic" pcie_conf_read function to static buffer as it is only statically filled the PCI_EXP_SLTSTA_PDS flag and dynamic read callback is not needed for this register.
Set Presence State Bit to 1 since there is no support for unplugging the card and there is currently no platform able to detect presence of a card - in such a case the bit needs to be set to 1.
Finally correctly set Physical Slot Number to 1 since there is only one port and zero value is reserved for ports within the same silicon as Root Port which is not our case for Aardvark HW.
Link: https://lore.kernel.org/r/20220524132827.8837-3-kabel@kernel.org Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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1326b496 |
| 24-May-2022 |
Pali Rohár <pali@kernel.org> |
PCI: aardvark: Add support for AER registers on emulated bridge
Aardvark controller supports Advanced Error Reporting configuration registers.
Export these registers on the emulated root bridge via
PCI: aardvark: Add support for AER registers on emulated bridge
Aardvark controller supports Advanced Error Reporting configuration registers.
Export these registers on the emulated root bridge via new .read_ext() and .write_ext() methods.
Note that in the Advanced Error Reporting Capability header the offset to the next Extended Capability header is set, but it is not documented in Armada 3700 Functional Specification. Since this change adds support only for Advanced Error Reporting, explicitly clear PCI_EXT_CAP_NEXT bits in AER capability header.
Now the pcieport driver correctly detects AER support and allows PCIe AER driver to start receiving ERR interrupts. Kernel log now says:
pcieport 0000:00:00.0: AER: enabled with IRQ 52
Link: https://lore.kernel.org/r/20220524132827.8837-2-kabel@kernel.org Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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a3b69dd0 |
| 15-May-2022 |
Pali Rohár <pali@kernel.org> |
Revert "PCI: aardvark: Rewrite IRQ code to chained IRQ handler"
This reverts commit 1571d67dc190e50c6c56e8f88cdc39f7cc53166e.
This commit broke support for setting interrupt affinity. It looks like
Revert "PCI: aardvark: Rewrite IRQ code to chained IRQ handler"
This reverts commit 1571d67dc190e50c6c56e8f88cdc39f7cc53166e.
This commit broke support for setting interrupt affinity. It looks like that it is related to the chained IRQ handler. Revert this commit until issue with setting interrupt affinity is fixed.
Fixes: 1571d67dc190 ("PCI: aardvark: Rewrite IRQ code to chained IRQ handler") Link: https://lore.kernel.org/r/20220515125815.30157-1-pali@kernel.org Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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9a4556da |
| 03-Feb-2022 |
Pali Rohár <pali@kernel.org> |
Revert "PCI: aardvark: Fix initialization with old Marvell's Arm Trusted Firmware"
This reverts commit b0c6ae0f8948a2be6bf4e8b4bbab9ca1343289b6.
Armada 3720 phy driver (phy-mvebu-a3700-comphy.c) do
Revert "PCI: aardvark: Fix initialization with old Marvell's Arm Trusted Firmware"
This reverts commit b0c6ae0f8948a2be6bf4e8b4bbab9ca1343289b6.
Armada 3720 phy driver (phy-mvebu-a3700-comphy.c) does not return -EOPNOTSUPP from phy_power_on() callback anymore.
So remove dead code which handles -EOPNOTSUPP return value.
Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Behún <kabel@kernel.org> Acked-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Link: https://lore.kernel.org/r/20220203214444.1508-6-kabel@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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#
904b10fb |
| 14-Feb-2022 |
Pali Rohár <pali@kernel.org> |
PCI: Add defines for normal and subtractive PCI bridges
Add these PCI class codes to pci_ids.h:
PCI_CLASS_BRIDGE_PCI_NORMAL PCI_CLASS_BRIDGE_PCI_SUBTRACTIVE
Use these defines in all kernel cod
PCI: Add defines for normal and subtractive PCI bridges
Add these PCI class codes to pci_ids.h:
PCI_CLASS_BRIDGE_PCI_NORMAL PCI_CLASS_BRIDGE_PCI_SUBTRACTIVE
Use these defines in all kernel code for describing PCI class codes for normal and subtractive PCI bridges.
[bhelgaas: similar change in pci-mvebu.c] Link: https://lore.kernel.org/r/20220214114109.26809-1-pali@kernel.org Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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92f4ffec |
| 10-Jan-2022 |
Marek Behún <kabel@kernel.org> |
PCI: aardvark: Update comment about link going down after link-up
Update the comment about what happens when link goes down after we have checked for link-up. If a PIO request is done while link-dow
PCI: aardvark: Update comment about link going down after link-up
Update the comment about what happens when link goes down after we have checked for link-up. If a PIO request is done while link-down, we have a serious problem.
Link: https://lore.kernel.org/r/20220110015018.26359-23-kabel@kernel.org Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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0c36ab43 |
| 10-Jan-2022 |
Marek Behún <kabel@kernel.org> |
PCI: aardvark: Drop __maybe_unused from advk_pcie_disable_phy()
This function is now always used in driver remove method, drop the __maybe_unused attribute.
Link: https://lore.kernel.org/r/20220110
PCI: aardvark: Drop __maybe_unused from advk_pcie_disable_phy()
This function is now always used in driver remove method, drop the __maybe_unused attribute.
Link: https://lore.kernel.org/r/20220110015018.26359-22-kabel@kernel.org Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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befa7100 |
| 10-Jan-2022 |
Pali Rohár <pali@kernel.org> |
PCI: aardvark: Don't mask irq when mapping
By default, all Legacy INTx interrupts are masked, so there is no need to mask this interrupt during irq_map() callback.
Link: https://lore.kernel.org/r/2
PCI: aardvark: Don't mask irq when mapping
By default, all Legacy INTx interrupts are masked, so there is no need to mask this interrupt during irq_map() callback.
Link: https://lore.kernel.org/r/20220110015018.26359-21-kabel@kernel.org Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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b08e5b53 |
| 10-Jan-2022 |
Pali Rohár <pali@kernel.org> |
PCI: aardvark: Remove irq_mask_ack() callback for INTx interrupts
Callback for irq_mask_ack() is the same as for irq_mask(). As there is no special handling for irq_ack(), there is no need to define
PCI: aardvark: Remove irq_mask_ack() callback for INTx interrupts
Callback for irq_mask_ack() is the same as for irq_mask(). As there is no special handling for irq_ack(), there is no need to define irq_mask_ack() too.
Link: https://lore.kernel.org/r/20220110015018.26359-20-kabel@kernel.org Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Marc Zyngier <maz@kernel.org>
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#
815bc313 |
| 10-Jan-2022 |
Pali Rohár <pali@kernel.org> |
PCI: aardvark: Use separate INTA interrupt for emulated root bridge
Emulated root bridge currently provides only one Legacy INTA interrupt which is used for reporting PCIe PME and ERR events and han
PCI: aardvark: Use separate INTA interrupt for emulated root bridge
Emulated root bridge currently provides only one Legacy INTA interrupt which is used for reporting PCIe PME and ERR events and handled by kernel PCIe PME and AER drivers.
Aardvark HW reports these PME and ERR events separately, so there is no need to mix real INTA interrupt and emulated INTA interrupt for PCIe PME and AER drivers.
Register a new advk-RP (as in Root Port) irq chip and a new irq domain for emulated root bridge and use this new separate irq domain for providing INTA interrupt from emulated root bridge for PME and ERR events.
The real INTA interrupt from real devices is now separate.
A custom map_irq callback function on PCI host bridge structure is used to allocate IRQ mapping for emulated root bridge from new irq domain. Original callback of_irq_parse_and_map_pci() is used for all other devices as before.
Link: https://lore.kernel.org/r/20220110015018.26359-19-kabel@kernel.org Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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#
273ddd86 |
| 10-Jan-2022 |
Pali Rohár <pali@kernel.org> |
PCI: aardvark: Fix support for PME requester on emulated bridge
Enable aardvark PME interrupt unconditionally by unmasking it and read PME requester ID to emulated bridge config space immediately af
PCI: aardvark: Fix support for PME requester on emulated bridge
Enable aardvark PME interrupt unconditionally by unmasking it and read PME requester ID to emulated bridge config space immediately after receiving interrupt.
PME requester ID is stored in the PCIE_MSG_LOG_REG register, which contains the last inbound message. So when new inbound message is received by HW (including non-PM), the content in PCIE_MSG_LOG_REG register is replaced by a new value.
PCIe specification mandates that subsequent PMEs are kept pending until the PME Status Register bit is cleared by software by writing a 1b.
Support for masking/unmasking PME interrupt on emulated bridge via PCI_EXP_RTCTL_PMEIE bit is now implemented only in emulated bridge config space, to ensure that we do not miss any aardvark PME interrupt.
Reading of PCI_EXP_RTCAP and PCI_EXP_RTSTA registers is simplified as final value is now always stored into emulated bridge config space by the interrupt handler, so there is no need to implement support for these registers in read_pcie callback.
Clearing of W1C bit PCI_EXP_RTSTA_PME is now also simplified as it is done by pci-bridge-emul.c code for emulated bridge config space. So there is no need to implement support for clearing this bit in write_pcie callback.
Link: https://lore.kernel.org/r/20220110015018.26359-18-kabel@kernel.org Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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#
0fc75d87 |
| 10-Jan-2022 |
Pali Rohár <pali@kernel.org> |
PCI: aardvark: Add support for PME interrupts
Currently enabling PCI_EXP_RTSTA_PME bit in PCI_EXP_RTCTL register does nothing. This is because PCIe PME driver expects to receive PCIe interrupt defin
PCI: aardvark: Add support for PME interrupts
Currently enabling PCI_EXP_RTSTA_PME bit in PCI_EXP_RTCTL register does nothing. This is because PCIe PME driver expects to receive PCIe interrupt defined in PCI_EXP_FLAGS_IRQ register, but aardvark hardware does not trigger PCIe INTx/MSI interrupt for PME event, rather it triggers custom aardvark interrupt which this driver is not processing yet.
Fix this issue by handling PME interrupt in advk_pcie_handle_int() and chaining it to PCIe interrupt 0 with generic_handle_domain_irq() (since aardvark sets PCI_EXP_FLAGS_IRQ to zero). With this change PCIe PME driver finally starts receiving PME interrupt.
Link: https://lore.kernel.org/r/20220110015018.26359-17-kabel@kernel.org Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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#
7122bcb3 |
| 10-Jan-2022 |
Pali Rohár <pali@kernel.org> |
PCI: aardvark: Optimize writing PCI_EXP_RTCTL_PMEIE and PCI_EXP_RTSTA_PME on emulated bridge
To optimize advk_pci_bridge_emul_pcie_conf_write() code, touch PCIE_ISR0_REG and PCIE_ISR0_MASK_REG regis
PCI: aardvark: Optimize writing PCI_EXP_RTCTL_PMEIE and PCI_EXP_RTSTA_PME on emulated bridge
To optimize advk_pci_bridge_emul_pcie_conf_write() code, touch PCIE_ISR0_REG and PCIE_ISR0_MASK_REG registers only when it is really needed, when processing PCI_EXP_RTCTL_PMEIE and PCI_EXP_RTSTA_PME bits.
Link: https://lore.kernel.org/r/20220110015018.26359-16-kabel@kernel.org Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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#
735f5ae4 |
| 10-Jan-2022 |
Pali Rohár <pali@kernel.org> |
PCI: aardvark: Fix reading PCI_EXP_RTSTA_PME bit on emulated bridge
The emulated bridge returns incorrect value for PCI_EXP_RTSTA register during readout in advk_pci_bridge_emul_pcie_conf_read() fun
PCI: aardvark: Fix reading PCI_EXP_RTSTA_PME bit on emulated bridge
The emulated bridge returns incorrect value for PCI_EXP_RTSTA register during readout in advk_pci_bridge_emul_pcie_conf_read() function: the correct bit is BIT(16), but we are setting BIT(23), because the code does *value = (isr0 & PCIE_MSG_PM_PME_MASK) << 16 where PCIE_MSG_PM_PME_MASK is BIT(7).
The code should probably have been something like *value = (!!(isr0 & PCIE_MSG_PM_PME_MASK)) << 16, but we are better of using an if() and using the proper macro for this bit.
Link: https://lore.kernel.org/r/20220110015018.26359-15-kabel@kernel.org Fixes: 8a3ebd8de328 ("PCI: aardvark: Implement emulated root PCI bridge config space") Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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#
3ebfefa3 |
| 10-Jan-2022 |
Pali Rohár <pali@kernel.org> |
PCI: aardvark: Add support for ERR interrupt on emulated bridge
ERR interrupt is triggered when corresponding bit is unmasked in both ISR0 and PCI_EXP_DEVCTL registers. Unmasking ERR bits in PCI_EXP
PCI: aardvark: Add support for ERR interrupt on emulated bridge
ERR interrupt is triggered when corresponding bit is unmasked in both ISR0 and PCI_EXP_DEVCTL registers. Unmasking ERR bits in PCI_EXP_DEVCTL register is not enough. This means that currently the ERR interrupt is never triggered.
Unmask ERR bits in ISR0 register at driver probe time. ERR interrupt is not triggered until ERR bits are unmasked also in PCI_EXP_DEVCTL register, which is done by AER driver. So it is safe to unconditionally unmask all ERR bits in aardvark probe.
Aardvark HW sets PCI_ERR_ROOT_AER_IRQ to zero and when corresponding bits in ISR0 and PCI_EXP_DEVCTL are enabled, the HW triggers a generic interrupt on GIC. Chain this interrupt to PCIe interrupt 0 with generic_handle_domain_irq() to allow processing of ERR interrupts.
Link: https://lore.kernel.org/r/20220110015018.26359-14-kabel@kernel.org Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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#
754e4498 |
| 10-Jan-2022 |
Pali Rohár <pali@kernel.org> |
PCI: aardvark: Enable MSI-X support
According to PCI 3.0 specification, sending both MSI and MSI-X interrupts is done by DWORD memory write operation to doorbell message address. The write operation
PCI: aardvark: Enable MSI-X support
According to PCI 3.0 specification, sending both MSI and MSI-X interrupts is done by DWORD memory write operation to doorbell message address. The write operation for MSI has zero upper 16 bits and the MSI interrupt number in the lower 16 bits, while the write operation for MSI-X contains a 32-bit value from MSI-X table.
Since the driver only uses interrupt numbers from range 0..31, the upper 16 bits of the DWORD memory write operation to doorbell message address are zero even for MSI-X interrupts. Thus we can enable MSI-X interrupts.
Testing proves that kernel can correctly receive MSI-X interrupts from PCIe cards which supports both MSI and MSI-X interrupts.
Link: https://lore.kernel.org/r/20220110015018.26359-13-kabel@kernel.org Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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46ad3dc4 |
| 10-Jan-2022 |
Pali Rohár <pali@kernel.org> |
PCI: aardvark: Fix setting MSI address
MSI address for receiving MSI interrupts needs to be correctly set before enabling processing of MSI interrupts.
Move code for setting PCIE_MSI_ADDR_LOW_REG a
PCI: aardvark: Fix setting MSI address
MSI address for receiving MSI interrupts needs to be correctly set before enabling processing of MSI interrupts.
Move code for setting PCIE_MSI_ADDR_LOW_REG and PCIE_MSI_ADDR_HIGH_REG from advk_pcie_init_msi_irq_domain() to advk_pcie_setup_hw(), before enabling PCIE_CORE_CTRL2_MSI_ENABLE.
After this we can remove the now unused member msi_msg, which was used only for MSI doorbell address. MSI address can be any address which cannot be used to DMA to. So change it to the address of the main struct advk_pcie.
Link: https://lore.kernel.org/r/20220110015018.26359-12-kabel@kernel.org Fixes: 8c39d710363c ("PCI: aardvark: Add Aardvark PCI host controller driver") Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Marc Zyngier <maz@kernel.org> Cc: stable@vger.kernel.org # f21a8b1b6837 ("PCI: aardvark: Move to MSI handling using generic MSI support")
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e77d9c90 |
| 10-Jan-2022 |
Pali Rohár <pali@kernel.org> |
PCI: aardvark: Add support for masking MSI interrupts
We should not unmask MSIs at setup, but only when kernel asks for them to be unmasked.
At setup, mask all MSIs, and implement IRQ chip callback
PCI: aardvark: Add support for masking MSI interrupts
We should not unmask MSIs at setup, but only when kernel asks for them to be unmasked.
At setup, mask all MSIs, and implement IRQ chip callbacks for masking and unmasking particular MSIs.
Link: https://lore.kernel.org/r/20220110015018.26359-11-kabel@kernel.org Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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#
4689c091 |
| 10-Jan-2022 |
Pali Rohár <pali@kernel.org> |
PCI: aardvark: Refactor unmasking summary MSI interrupt
Refactor the masking of ISR0/1 Sources and unmasking of summary MSI interrupt so that it corresponds to the comments: - first mask all ISR0/1
PCI: aardvark: Refactor unmasking summary MSI interrupt
Refactor the masking of ISR0/1 Sources and unmasking of summary MSI interrupt so that it corresponds to the comments: - first mask all ISR0/1 - then unmask all MSIs - then unmask summary MSI interrupt
Link: https://lore.kernel.org/r/20220110015018.26359-10-kabel@kernel.org Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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#
222af785 |
| 10-Jan-2022 |
Marek Behún <kabel@kernel.org> |
PCI: aardvark: Use dev_fwnode() instead of of_node_to_fwnode(dev->of_node)
Use simple dev_fwnode(dev) instead of struct device_node *node = dev->of_node; of_node_to_fwnode(node) especially sin
PCI: aardvark: Use dev_fwnode() instead of of_node_to_fwnode(dev->of_node)
Use simple dev_fwnode(dev) instead of struct device_node *node = dev->of_node; of_node_to_fwnode(node) especially since the node variable is not used elsewhere in the function.
Link: https://lore.kernel.org/r/20220110015018.26359-9-kabel@kernel.org Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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26bcd54e |
| 10-Jan-2022 |
Marek Behún <kabel@kernel.org> |
PCI: aardvark: Make msi_domain_info structure a static driver structure
Make Aardvark's msi_domain_info structure into a private driver structure. Domain info is same for every potential instatinati
PCI: aardvark: Make msi_domain_info structure a static driver structure
Make Aardvark's msi_domain_info structure into a private driver structure. Domain info is same for every potential instatination of a controller.
Link: https://lore.kernel.org/r/20220110015018.26359-8-kabel@kernel.org Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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