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9ccc1318 |
| 23-Oct-2023 |
Jianjun Wang <jianjun.wang@mediatek.com> |
PCI: mediatek-gen3: Fix translation window size calculation
When using the fls() helper, the translation table should be a power of two; otherwise, the resulting value will not be correct.
For exam
PCI: mediatek-gen3: Fix translation window size calculation
When using the fls() helper, the translation table should be a power of two; otherwise, the resulting value will not be correct.
For example, given fls(0x3e00000) - 1 = 25, the PCIe translation window size will be set to 0x2000000 instead of the expected size 0x3e00000.
Fix the translation window by splitting the MMIO space into multiple tables if its size is not a power of two.
[kwilczynski: commit log] Link: https://lore.kernel.org/linux-pci/20231023081423.18559-1-jianjun.wang@mediatek.com Fixes: d3bf75b579b9 ("PCI: mediatek-gen3: Add MediaTek Gen3 driver for MT8192") Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com> Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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22626c46 |
| 21-Mar-2023 |
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> |
PCI: mediatek-gen3: Convert to platform remove callback returning void
The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do
PCI: mediatek-gen3: Convert to platform remove callback returning void
The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void.
Trivially convert this driver from always returning zero in the remove callback to the void returning variant.
Link: https://lore.kernel.org/linux-pci/20230321193208.366561-11-u.kleine-koenig@pengutronix.de Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
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034fdac0 |
| 05-May-2022 |
Felix Fietkau <nbd@nbd.name> |
PCI: mediatek-gen3: Change driver name to mtk-pcie-gen3
driver_register() will refuse to register another driver with the same name. This change allows pcie-mediatek-gen3 to coexist with pcie-mediat
PCI: mediatek-gen3: Change driver name to mtk-pcie-gen3
driver_register() will refuse to register another driver with the same name. This change allows pcie-mediatek-gen3 to coexist with pcie-mediatek built into the kernel.
Link: https://lore.kernel.org/r/20220505083907.86598-1-nbd@nbd.name Fixes: d3bf75b579b9 ("PCI: mediatek-gen3: Add MediaTek Gen3 driver for MT8192") Signed-off-by: Felix Fietkau <nbd@nbd.name> Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Jianjun Wang <jianjun.wang@mediatek.com>
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19b7858c |
| 19-Jul-2022 |
Bjorn Helgaas <bhelgaas@google.com> |
PCI: Convert to new *_PM_OPS macros
Replace SET_*_PM_OPS with *_PM_OPS, which which have the advantage that the compiler always sees the PM callbacks as referenced, so they don't need to be wrapped
PCI: Convert to new *_PM_OPS macros
Replace SET_*_PM_OPS with *_PM_OPS, which which have the advantage that the compiler always sees the PM callbacks as referenced, so they don't need to be wrapped with "#ifdef CONFIG_PM_SLEEP" or tagged with "__maybe_unused" to avoid "defined but not used" warnings.
See 1a3c7bb08826 ("PM: core: Add new *_PM_OPS macros, deprecate old ones").
Link: https://lore.kernel.org/r/20220719215108.1583108-1-helgaas@kernel.org Tested-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Pali Rohár <pali@kernel.org> # pci-mvebu.c Reviewed-by: Arnd Bergmann <arnd@arndb.de>
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28fc842e |
| 29-Mar-2022 |
Jianjun Wang <jianjun.wang@mediatek.com> |
PCI: mediatek-gen3: Print LTSSM state when PCIe link down
Print current LTSSM state when PCIe link down instead of the register value to make it easier to get the link status.
Link: https://lore.ke
PCI: mediatek-gen3: Print LTSSM state when PCIe link down
Print current LTSSM state when PCIe link down instead of the register value to make it easier to get the link status.
Link: https://lore.kernel.org/r/20220329030715.7975-1-jianjun.wang@mediatek.com Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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#
bf038503 |
| 01-Jun-2022 |
Miaoqian Lin <linmq006@gmail.com> |
PCI: mediatek-gen3: Fix refcount leak in mtk_pcie_init_irq_domains()
of_get_child_by_name() returns a node pointer with refcount incremented, so we should use of_node_put() on it when we don't need
PCI: mediatek-gen3: Fix refcount leak in mtk_pcie_init_irq_domains()
of_get_child_by_name() returns a node pointer with refcount incremented, so we should use of_node_put() on it when we don't need it anymore.
Add missing of_node_put() to avoid refcount leak.
Fixes: 814cceebba9b ("PCI: mediatek-gen3: Add INTx support") Link: https://lore.kernel.org/r/20220601041259.56185-1-linmq006@gmail.com Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Miles Chen <miles.chen@mediatek.com> Acked-by: Jianjun Wang <jianjun.wang@mediatek.com>
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1d565935 |
| 04-Apr-2022 |
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> |
PCI: mediatek-gen3: Assert resets to ensure expected init state
The controller may have been left out of reset by the bootloader, in which case, before the powerup sequence, the controller will be f
PCI: mediatek-gen3: Assert resets to ensure expected init state
The controller may have been left out of reset by the bootloader, in which case, before the powerup sequence, the controller will be found preconfigured with values that were set before booting the kernel: this produces a controller failure, with the result of a failure during the mtk_pcie_startup_port() sequence as the PCIe link never gets up.
To ensure that we get a clean start in an expected state, assert both the PHY and MAC resets before executing the controller power-up sequence.
Link: https://lore.kernel.org/r/20220404144858.92390-1-angelogioacchino.delregno@collabora.com Fixes: d3bf75b579b9 ("PCI: mediatek-gen3: Add MediaTek Gen3 driver for MT8192") Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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904b10fb |
| 14-Feb-2022 |
Pali Rohár <pali@kernel.org> |
PCI: Add defines for normal and subtractive PCI bridges
Add these PCI class codes to pci_ids.h:
PCI_CLASS_BRIDGE_PCI_NORMAL PCI_CLASS_BRIDGE_PCI_SUBTRACTIVE
Use these defines in all kernel cod
PCI: Add defines for normal and subtractive PCI bridges
Add these PCI class codes to pci_ids.h:
PCI_CLASS_BRIDGE_PCI_NORMAL PCI_CLASS_BRIDGE_PCI_SUBTRACTIVE
Use these defines in all kernel code for describing PCI class codes for normal and subtractive PCI bridges.
[bhelgaas: similar change in pci-mvebu.c] Link: https://lore.kernel.org/r/20220214114109.26809-1-pali@kernel.org Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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ccd36795 |
| 07-Jan-2022 |
Krzysztof Wilczyński <kw@linux.com> |
PCI: Correct misspelled words
Fix a number of misspelled words, and while at it, correct two phrases used to indicate a status of an operation where words used have been cleverly truncated and thus
PCI: Correct misspelled words
Fix a number of misspelled words, and while at it, correct two phrases used to indicate a status of an operation where words used have been cleverly truncated and thus always trigger a spellchecking error while performing a static code analysis over the PCI tree.
[bhelgaas: reverse sense of quirk ternary] Link: https://lore.kernel.org/r/20220107225942.121484-1-kw@linux.com Signed-off-by: Krzysztof Wilczyński <kw@linux.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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d5a4835b |
| 23-Dec-2021 |
Fan Fei <ffclaire1224@gmail.com> |
PCI: mediatek-gen3: Rename mtk_pcie_port to mtk_gen3_pcie
Rename struct mtk_pcie_port to mtk_gen3_pcie to match the convention of <driver>_pcie. No functional change intended.
Link: https://lore.ke
PCI: mediatek-gen3: Rename mtk_pcie_port to mtk_gen3_pcie
Rename struct mtk_pcie_port to mtk_gen3_pcie to match the convention of <driver>_pcie. No functional change intended.
Link: https://lore.kernel.org/r/20211223011054.1227810-15-helgaas@kernel.org Signed-off-by: Fan Fei <ffclaire1224@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Ryder Lee <ryder.lee@mediatek.com> Cc: Jianjun Wang <jianjun.wang@mediatek.com>
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ab344fd4 |
| 15-Oct-2021 |
Jianjun Wang <jianjun.wang@mediatek.com> |
PCI: mediatek-gen3: Disable DVFSRC voltage request
When the DVFSRC (dynamic voltage and frequency scaling resource collector) feature is not implemented, the PCIe hardware will assert a voltage requ
PCI: mediatek-gen3: Disable DVFSRC voltage request
When the DVFSRC (dynamic voltage and frequency scaling resource collector) feature is not implemented, the PCIe hardware will assert a voltage request signal when exit from the L1 PM Substates to request a specific Vcore voltage, but cannot receive the voltage ready signal, which will cause the link to fail to exit the L1 PM Substates.
Disable DVFSRC voltage request by default, we need to find a common way to enable it in the future.
Link: https://lore.kernel.org/r/20211015063602.29058-1-jianjun.wang@mediatek.com Fixes: d3bf75b579b9 ("PCI: mediatek-gen3: Add MediaTek Gen3 driver for MT8192") Tested-by: Qizhong Cheng <qizhong.cheng@mediatek.com> Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Tzung-Bi Shih <tzungbi@google.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
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#
d21faba1 |
| 02-Aug-2021 |
Marc Zyngier <maz@kernel.org> |
PCI: Bulk conversion to generic_handle_domain_irq()
Wherever possible, replace constructs that match either generic_handle_irq(irq_find_mapping()) or generic_handle_irq(irq_linear_revmap()) to a sin
PCI: Bulk conversion to generic_handle_domain_irq()
Wherever possible, replace constructs that match either generic_handle_irq(irq_find_mapping()) or generic_handle_irq(irq_linear_revmap()) to a single call to generic_handle_domain_irq().
Link: https://lore.kernel.org/r/20210802162630.2219813-4-maz@kernel.org Signed-off-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
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#
3a2e476d |
| 11-May-2021 |
Zou Wei <zou_wei@huawei.com> |
PCI: mediatek-gen3: Add missing MODULE_DEVICE_TABLE
This patch adds missing MODULE_DEVICE_TABLE definition which generates correct modalias for automatic loading of this driver when it is built as a
PCI: mediatek-gen3: Add missing MODULE_DEVICE_TABLE
This patch adds missing MODULE_DEVICE_TABLE definition which generates correct modalias for automatic loading of this driver when it is built as an external module.
Link: https://lore.kernel.org/r/1620717091-108691-1-git-send-email-zou_wei@huawei.com Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Zou Wei <zou_wei@huawei.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Krzysztof Wilczyński <kw@linux.com>
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#
d537dc12 |
| 20-Apr-2021 |
Jianjun Wang <jianjun.wang@mediatek.com> |
PCI: mediatek-gen3: Add system PM support
Add suspend_noirq and resume_noirq callback functions to implement PM system suspend and resume hooks for the MediaTek Gen3 PCIe controller.
When the syste
PCI: mediatek-gen3: Add system PM support
Add suspend_noirq and resume_noirq callback functions to implement PM system suspend and resume hooks for the MediaTek Gen3 PCIe controller.
When the system suspends, trigger the PCIe link to enter the L2 state and pull down the PERST# pin, gating the clocks of the MAC layer, and then power-off the physical layer to provide power-saving.
When the system resumes, the PCIe link should be re-established and the related control register values should be restored.
Link: https://lore.kernel.org/r/20210420061723.989-7-jianjun.wang@mediatek.com Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Ryder Lee <ryder.lee@mediatek.com>
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#
1bdafba5 |
| 20-Apr-2021 |
Jianjun Wang <jianjun.wang@mediatek.com> |
PCI: mediatek-gen3: Add MSI support
Add MSI support for MediaTek Gen3 PCIe controller.
This PCIe controller supports up to 256 MSI vectors, the MSI hardware block diagram is as follows:
PCI: mediatek-gen3: Add MSI support
Add MSI support for MediaTek Gen3 PCIe controller.
This PCIe controller supports up to 256 MSI vectors, the MSI hardware block diagram is as follows:
+-----+ | GIC | +-----+ ^ | port->irq | +-+-+-+-+-+-+-+-+ |0|1|2|3|4|5|6|7| (PCIe intc) +-+-+-+-+-+-+-+-+ ^ ^ ^ | | ... | +-------+ +------+ +-----------+ | | | +-+-+---+--+--+ +-+-+---+--+--+ +-+-+---+--+--+ |0|1|...|30|31| |0|1|...|30|31| |0|1|...|30|31| (MSI sets) +-+-+---+--+--+ +-+-+---+--+--+ +-+-+---+--+--+ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ | | | | | | | | | | | | (MSI vectors) | | | | | | | | | | | |
(MSI SET0) (MSI SET1) ... (MSI SET7)
With 256 MSI vectors supported, the MSI vectors are composed of 8 sets, each set has its own address for MSI message, and supports 32 MSI vectors to generate interrupt.
Link: https://lore.kernel.org/r/20210420061723.989-6-jianjun.wang@mediatek.com Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Marc Zyngier <maz@kernel.org> Acked-by: Ryder Lee <ryder.lee@mediatek.com>
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#
814cceeb |
| 20-Apr-2021 |
Jianjun Wang <jianjun.wang@mediatek.com> |
PCI: mediatek-gen3: Add INTx support
Add INTx support for MediaTek Gen3 PCIe controller.
Link: https://lore.kernel.org/r/20210420061723.989-5-jianjun.wang@mediatek.com Signed-off-by: Jianjun Wang <
PCI: mediatek-gen3: Add INTx support
Add INTx support for MediaTek Gen3 PCIe controller.
Link: https://lore.kernel.org/r/20210420061723.989-5-jianjun.wang@mediatek.com Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Marc Zyngier <maz@kernel.org> Acked-by: Ryder Lee <ryder.lee@mediatek.com>
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#
d3bf75b5 |
| 20-Apr-2021 |
Jianjun Wang <jianjun.wang@mediatek.com> |
PCI: mediatek-gen3: Add MediaTek Gen3 driver for MT8192
MediaTek's PCIe host controller has three generation HWs, the new generation HW is an individual bridge, it supports Gen3 speed and compatible
PCI: mediatek-gen3: Add MediaTek Gen3 driver for MT8192
MediaTek's PCIe host controller has three generation HWs, the new generation HW is an individual bridge, it supports Gen3 speed and compatible with Gen2, Gen1 speed.
Add support for new Gen3 controller which can be found on MT8192.
Link: https://lore.kernel.org/r/20210420061723.989-4-jianjun.wang@mediatek.com Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Ryder Lee <ryder.lee@mediatek.com>
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