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ecc79ab9 |
| 19-Mar-2024 |
Geert Uytterhoeven <geert+renesas@glider.be> |
ARM: dts: renesas: r8a73a4: Add TMU nodes
Add device nodes for the Timer Units (TMU) on the R-Mobile APE6 SoC, and the clocks serving them.
Note that TMU channels 1 and 2 are not added, as their in
ARM: dts: renesas: r8a73a4: Add TMU nodes
Add device nodes for the Timer Units (TMU) on the R-Mobile APE6 SoC, and the clocks serving them.
Note that TMU channels 1 and 2 are not added, as their interrupts are not wired to the interrupt controller for the AP-System Core (INTC-SYS), only to the interrupt controller for the AP-Realtime Core (INTC-RT).
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/1a60832f3ba37afb4a5791f4e5db4610ab31beb3.1710864964.git.geert+renesas@glider.be
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2874c5fd |
| 27-May-2019 |
Thomas Gleixner <tglx@linutronix.de> |
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152
Based on 1 normalized pattern(s):
this program is free software you can redistribute it and or modify it under the terms of th
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152
Based on 1 normalized pattern(s):
this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-or-later
has been chosen to replace the boilerplate/reference in 3029 file(s).
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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c11333cc |
| 06-Mar-2017 |
Geert Uytterhoeven <geert+renesas@glider.be> |
ARM: dts: r8a73a4: Add INTC-SYS clock to device tree
Link the ARM GIC to the INTC-SYS module clock and the C4 power domain, so it can be power managed using that clock in the future.
Note that curr
ARM: dts: r8a73a4: Add INTC-SYS clock to device tree
Link the ARM GIC to the INTC-SYS module clock and the C4 power domain, so it can be power managed using that clock in the future.
Note that currently the GIC-400 driver doesn't support module clocks nor Runtime PM, so this must be handled as a critical clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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1c2a7eb7 |
| 18-Mar-2015 |
Geert Uytterhoeven <geert+renesas@glider.be> |
ARM: shmobile: r8a73a4: Add IRQC clock to device tree
Link the external IRQ controllers irqc0 and irqc1 to the IRQC module clock, so they can be power managed using that clock.
Signed-off-by: Geert
ARM: shmobile: r8a73a4: Add IRQC clock to device tree
Link the external IRQ controllers irqc0 and irqc1 to the IRQC module clock, so they can be power managed using that clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> [horms: corrected typo in changelog to refer to r8a73a4] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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bdba0101 |
| 20-Jan-2015 |
Ulrich Hecht <ulrich.hecht+renesas@gmail.com> |
ARM: shmobile: r8a73a4: Add CPG register bits header
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <l
ARM: shmobile: r8a73a4: Add CPG register bits header
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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