History log of /netbsd/sys/arch/arm/altera/cycv_reg.h (Results 1 – 2 of 2)
Revision Date Author Comments
# e4a950e6 18-Oct-2018 skrll <skrll@NetBSD.org>

Provide generic start code that assumes the MMU is off and caches are
disabled as per the linux booting protocol for ARMv6 and ARMv7 boards.
u-boot image type should be changed to 'linux' for correct

Provide generic start code that assumes the MMU is off and caches are
disabled as per the linux booting protocol for ARMv6 and ARMv7 boards.
u-boot image type should be changed to 'linux' for correct behaviour.

The new start code builds a minimal "bootstrap" L1PT with cached access
disabled and uses the same table for all processors. AP startup is
performed in less steps and more code is written in C.

The bootstrap tables and stack are placed into an (orphaned) section
"_init_memory" which is given to uvm when it is no longer used.

Various kernels have been converted to use this code and tested. Some
boards were provided by TNF. Thanks!

The GENERIC kernel now boots on boards using the TEGRA, SUNXI and EXYNOS
kernels. The GENERIC kernel will also work on RPI2 using u-boot.

Thanks to martin@ and aymeric@ for testing on parallella and nanosoc
respectively

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# e24a29a8 19-Sep-2018 aymeric <aymeric@NetBSD.org>

Add support for the DE0 NanoSoC board.

It's Cyclone V based and thus includes a dual-core Cortex A9 @925MHz.
Most standard peripherals are supported (USB, SDCard, Ethernet) and
no unusual peripheral

Add support for the DE0 NanoSoC board.

It's Cyclone V based and thus includes a dual-core Cortex A9 @925MHz.
Most standard peripherals are supported (USB, SDCard, Ethernet) and
no unusual peripheral is supported yet (FPGA, GPIO, ...)

show more ...