Convert some assignments into KASSERTs.

l_md is zeroised by lwp_create with

memset(&l2->l_startzero, 0, sizeof(*l2) -
offsetof(lwp_t, l_startzero));

Remove unnecessary include of <sys/malloc.h>.

Revert previous:

http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/arch/mips/mips/vm_machdep.c#rev1.163

> cpu_uarea_alloc: For ILP32, do not try to allocate physical memory above
> pmap_limits.avail_end.

Revert previous:

http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/arch/mips/mips/vm_machdep.c#rev1.163

> cpu_uarea_alloc: For ILP32, do not try to allocate physical memory above
> pmap_limits.avail_end.
>
> Fix NULL dereference in uvm_pglistalloc_contig_aggressive().

"high" argument larger than pmap_limits.avail_end is just legal for
uvm_pglistalloc(); uvm_pglistalloc_contig_aggressive() and friends
allocate memory between uvm_physseg_get_avail_start() and
uvm_physseg_get_avail_end().

It turned out that the NULL dereference took place as PHYS_TO_VM_PAGE()
aka uvm_phys_to_vm_page() returns NULL for a valid pa. I've not figured
out why...

Thanks chs@ for correcting my misunderstanding.

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cpu_uarea_alloc: For ILP32, do not try to allocate physical memory above
pmap_limits.avail_end.

Fix NULL dereference in uvm_pglistalloc_contig_aggressive().

Use a 16kB USPACE (and larger kernel stack) for LP64 kernels. Invert
the logic for setting the USPACE size. Define a desired USPACE size
(16kB for LP64, 8kB otherwise) then divide by PAGE_SIZE to g

Use a 16kB USPACE (and larger kernel stack) for LP64 kernels. Invert
the logic for setting the USPACE size. Define a desired USPACE size
(16kB for LP64, 8kB otherwise) then divide by PAGE_SIZE to get UPAGES.

Fixes random segmap lossage, since the uarea usually sits immediately
above the segmap for a process. Thanks to mrg@, skrll@ and dholland@
for testing, debugging and general help tracking down this problem.

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Add a comment

Move all non-emulation-specific coredump code into the coredump module,
and remove all #ifdef COREDUMP conditional compilation. Now, the
coredump module is completely separated from the emulation mo

Move all non-emulation-specific coredump code into the coredump module,
and remove all #ifdef COREDUMP conditional compilation. Now, the
coredump module is completely separated from the emulation modules, and
they can all be independently loaded and unloaded.

Welcome to 9.99.18 !

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KASSERT Fires for MIPS1, disable.

Fix non-DIAGNOSTIC build

Add a KASSERT

Make cpu_uarea_{alloc,free} conditional on PMAP_{,UN}MAP_POOLPAGE and
use PMAP_{,UN}_POOLPAGE to ensure cache aliases are handled correctly
and for all the pages used.

Allow cpu_uarea_alloc to return NULL for non-system LWPs in the non-_LP64
case. That way TLB mapped KVA can be found by uarea_poolpage_alloc.

Improve comment wording.

Sign extended uarea va appropriately for mips_dcache_inv_range

Initialise md_upte for the new lwp
KASSERT that we're always direct mapped when we expect to be

Fixup the #if to reflect when we can have non-direct mappable USPACE

Fix up uarea page mapping compile conditional - we only need code if
USPACE is > PAGE_SIZE.

For LP64 and N32 make sure KX is set in the trapframe as well.

KASSERT for KX in __mips_n32 as well.

Trailing whitespace

Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch

Add struct pmap_limits and pm_{min,max}addr from uvm/pmap/map.h and use it to
store avail_start, avail_end, virtual_start, and virtual_end.
Remove iospace and let emips just bump pmap_limits.virtual_

Add struct pmap_limits and pm_{min,max}addr from uvm/pmap/map.h and use it to
store avail_start, avail_end, virtual_start, and virtual_end.
Remove iospace and let emips just bump pmap_limits.virtual_start to get the
VA space it needs.
pmap_segtab.c is almost identical to uvm/pmap/pmap_segtab.c now. It won't
be long until we switch to the uvm/pmap one.

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Convert a KASSERT to KASSERTMSG

Fix a logic inversion introduced with the matt-nb5-mips64 for
pmap_{zero,copy}_page cache alias handing. The check previously used
PG_MD_UNCACHED_P, where it now uses PG_MD_CACHED_P, when considering

Fix a logic inversion introduced with the matt-nb5-mips64 for
pmap_{zero,copy}_page cache alias handing. The check previously used
PG_MD_UNCACHED_P, where it now uses PG_MD_CACHED_P, when considering if
a cache invalidation is required.

Additionally flush the cache for the uarea va to avoid potential (future)
cache aliases in cpu_uarea_free when handing pages back to uvm for later
use.

ok matt@

Hopefully this addresses the instability reported in the following PRs:

PR/44900 - R5000/Rm5200 mips ports are broken
PR/46170 - NetBSD/cobalt 6.0_BETA does not boot
PR/46890 - upcoming NetBSD 6.0 release is very unstable / unusable on cobalt qube 2
PR/48628 - cobalt and hpcmips ports are dead

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Remove COMPAT_SA / KERN_SA. Welcome to 6.99.3!
Approved by core@.