few more typos in the word "register", mainly s/resister/register/.
In one comment I assume that it was meant to be pull-up resistor.

Use unsigned to avoid undefined behavior. Found by kUBSan.

Move to 2-clause license. Approved by HAYAKAWA Koichi (copyright holder).

On cardbus configuration reads, check for a master abort in the cbb
and return all-ones explicitely.
Since pccbb.c rev. 1.151 the cbb is set to translate cardbus master
aborts which makes that the PC

On cardbus configuration reads, check for a master abort in the cbb
and return all-ones explicitely.
Since pccbb.c rev. 1.151 the cbb is set to translate cardbus master
aborts which makes that the PCI configuration read on the primary bus
returns random junk. This can cause the probing code to get confused.
The issue was reported by KIYOHARA Takashi and Jonathan A. Kollasch,
the patch was tested by KIYOHARA Takashi.

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Improve Cardbus performance, error handling, and error reporting.

Let the TI1420 PCI-Cardbus bridge do burst reads from the primary
(PCI) bus. This ought to improve Tx performance on Cardbus NICs.

Improve Cardbus performance, error handling, and error reporting.

Let the TI1420 PCI-Cardbus bridge do burst reads from the primary
(PCI) bus. This ought to improve Tx performance on Cardbus NICs.
This optimization may apply to other TI bridges, but I only have
a datasheet for the TI1420. :-/

Activate PCI Parity Error and System Error reporting on PCI-Cardbus
bridges.

To avoid data destruction, set the Master Abort mode to 1. Stops
the bridge from silently discarding writes from the secondary bus
to the primary bus (Cardbus writes to PCI). Also, stops the bridge
from fulfilling a read by a bus master on the secondary bus that
failed on the primary bus with 0xffffffff (Cardbus reads from PCI).
Now the bus will indicate an error condition (SERR) instead of
silently destroying/corrupting data.

Forward system error indications from the secondary to the primary
bus. Detect parity errors on the secondary.

Set a Cardbus card's Latency Timer to something reasonable, according
to the Cardbus card's Minimum Grant and the bandwidth available on
the PCI bus. Restore the Latency Timer when re-enabling a card
(e.g., after power reactivation).

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Make pccbb(4) use more PCI configuration register definitions,
especially the Bridge Control Register definition, instead of
rolling its own.

As we read/modify/write configuration registers, use a v

Make pccbb(4) use more PCI configuration register definitions,
especially the Bridge Control Register definition, instead of
rolling its own.

As we read/modify/write configuration registers, use a variable
that is named for the register we're r/m/w'ing, instead of using
the variable 'reg' over and over. This helps both a human reader
verify that we're not reading register X, modifying it, and writing
back to register Y (oops); the compiler can help a little by warning
that a variable is used before it is initialized.

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For Ricoh 5c47x class controllers, restore the "misc control" PCI config
register on resume.

Fix a typo in register definitions: looks like somebody copied the
CB_SOCKET_STAT_3VSOCK definition to CB_SOCKET_STAT_XVSOCK and
CB_SOCKET_STAT_YVSOCK definitions without updating the numbers.

It do

Fix a typo in register definitions: looks like somebody copied the
CB_SOCKET_STAT_3VSOCK definition to CB_SOCKET_STAT_XVSOCK and
CB_SOCKET_STAT_YVSOCK definitions without updating the numbers.

It doesn't look like CB_SOCKET_STAT_XVSOCK and CB_SOCKET_STAT_YVSOCK
are used anywhere, so this will not make any functional difference.

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merge ktrace-lwp.

Power up the card without OE enabled to avoid letting SanDisks enter
True IDE mode. Hinted at by Charles Hannum a while back. This lets
my PCI-Cardbus adapter read SanDisk CF cards much more reliab

Power up the card without OE enabled to avoid letting SanDisks enter
True IDE mode. Hinted at by Charles Hannum a while back. This lets
my PCI-Cardbus adapter read SanDisk CF cards much more reliably.

Also bring in a few defines from FreeBSD for some more TI registers and such.

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Add some register definitions for TI PCI12XX and Toshiba ToPIC.
Add ToPIC97 and ToPIC100 chip initialisation routine.
Add more TI PCI12XX chip initialisation.

Turn off the damned TI `VCC protection' bit.

Add CB_BCR_RESET_ENABLE in bridge control resister's bit definition.

add %b strings for sockevent and sockstate registers

Maintainance the name of Ricoh PCI-CardBus bridges.

add NetBSD ID tag.

This is the first check-in of CardBus driver. CardBus driver contains
CardBus bus stub, YENTA PCI-CardBus bridge (cbb), 3Com 3C575TX driver
(ex) and Intel fxp driver.

TODO:
o Conform to the KNF m

This is the first check-in of CardBus driver. CardBus driver contains
CardBus bus stub, YENTA PCI-CardBus bridge (cbb), 3Com 3C575TX driver
(ex) and Intel fxp driver.

TODO:
o Conform to the KNF more strictly.
o Be unified with pcmcia code as much as possible.
o Add more drivers for CardBus card, such as APA-1480 or USB card.

The affected files are listed below.

sys/arch/i386/conf/files.i386
sys/arch/macppc/conf/files.macppc
sys/conf/files
sys/dev/ic/elinkxl.c
sys/dev/ic/elinkxlvar.h
sys/dev/ic/i82365.c
sys/dev/ic/i82365var.h
sys/dev/isa/i82365_isasubr.c
sys/dev/pci/files.pci
sys/dev/pcmcia/pcmcia.c
sys/dev/pcmcia/pcmciachip.h

The added files are listed below.

sys/arch/i386/conf/CARDBUS
sys/arch/i386/include/rbus_machdep.h
sys/arch/i386/i386/rbus_machdep.c
sys/arch/macppc/include/rbus_machdep.h
sys/arch/macppc/macppc/rbus_machdep.c
sys/dev/cardbus/if_ex_cardbus.c
sys/dev/cardbus/Makefile.cardbusdevs
sys/dev/cardbus/cardbus.c
sys/dev/cardbus/cardbus_map.c
sys/dev/cardbus/cardbusdevs
sys/dev/cardbus/cardbusdevs.h
sys/dev/cardbus/cardbusdevs_data.h
sys/dev/cardbus/cardbusvar.h
sys/dev/cardbus/cardslot.c
sys/dev/cardbus/cardslotvar.h
sys/dev/cardbus/devlist2h.awk
sys/dev/cardbus/files.cardbus
sys/dev/cardbus/if_fxp_cardbus.c
sys/dev/cardbus/pccardcis.h
sys/dev/cardbus/rbus.c
sys/dev/cardbus/rbus.h
sys/dev/pci/pccbb.c
sys/dev/pci/pccbbreg.h
sys/dev/pci/pccbbvar.h

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